tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_pwr.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l1xx_hal_pwr.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    5-September-2014
   7   * @brief   Header file of PWR HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32L1xx_HAL_PWR_H
  40 #define __STM32L1xx_HAL_PWR_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32l1xx_hal_def.h"
  48
  49 /** @addtogroup STM32L1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup PWR
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58
  59 /** @defgroup PWR_Exported_Types PWR Exported Types
  60   * @{
  61   */
  62
  63 /**
  64   * @brief  PWR PVD configuration structure definition
  65   */
  66 typedef struct
  67 {
  68   uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
  69                             This parameter can be a value of @ref PWR_PVD_detection_level */
  70
  71   uint32_t Mode;      /*!< Mode: Specifies the operating mode for the selected pins.
  72                            This parameter can be a value of @ref PWR_PVD_Mode */
  73 }PWR_PVDTypeDef;
  74
  75 /**
  76   * @}
  77   */
  78
  79 /* Exported constants --------------------------------------------------------*/
  80
  81 /** @defgroup PWR_Exported_Constants PWR Exported Constants
  82   * @{
  83   */
  84
  85 /** @defgroup PWR_register_alias_address PWR Register alias address
  86   * @{
  87   */
  88 /* ------------- PWR registers bit address in the alias region ---------------*/
  89 #define PWR_OFFSET               (PWR_BASE - PERIPH_BASE)
  90 #define PWR_CR_OFFSET            0x00
  91 #define PWR_CSR_OFFSET           0x04
  92 #define PWR_CR_OFFSET_BB         (PWR_OFFSET + PWR_CR_OFFSET)
  93 #define PWR_CSR_OFFSET_BB        (PWR_OFFSET + PWR_CSR_OFFSET)
  94 /**
  95   * @}
  96   */
  97
  98 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
  99   * @{
 100   */
 101 /* --- CR Register ---*/
 102 /* Alias word address of LPSDSR bit */
 103 #define LPSDSR_BIT_NUMBER        POSITION_VAL(PWR_CR_LPSDSR)
 104 #define CR_LPSDSR_BB             ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4)))
 105
 106 /* Alias word address of DBP bit */
 107 #define DBP_BIT_NUMBER           POSITION_VAL(PWR_CR_DBP)
 108 #define CR_DBP_BB                ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4)))
 109
 110 /* Alias word address of LPRUN bit */
 111 #define LPRUN_BIT_NUMBER         POSITION_VAL(PWR_CR_LPRUN)
 112 #define CR_LPRUN_BB              ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4)))
 113
 114 /* Alias word address of PVDE bit */
 115 #define PVDE_BIT_NUMBER          POSITION_VAL(PWR_CR_PVDE)
 116 #define CR_PVDE_BB               ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4)))
 117
 118 /* Alias word address of FWU bit */
 119 #define FWU_BIT_NUMBER           POSITION_VAL(PWR_CR_FWU)
 120 #define CR_FWU_BB                ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4)))
 121
 122 /* Alias word address of ULP bit */
 123 #define ULP_BIT_NUMBER           POSITION_VAL(PWR_CR_ULP)
 124 #define CR_ULP_BB                ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4)))
 125 /**
 126   * @}
 127   */
 128
 129 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
 130   * @{
 131   */
 132
 133 /* --- CSR Register ---*/
 134 /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */
 135 #define CSR_EWUP_BB(VAL)         ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4)))
 136 /**
 137   * @}
 138   */
 139
 140 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
 141   * @{
 142   */
 143 #define PWR_PVDLEVEL_0                  PWR_CR_PLS_LEV0
 144 #define PWR_PVDLEVEL_1                  PWR_CR_PLS_LEV1
 145 #define PWR_PVDLEVEL_2                  PWR_CR_PLS_LEV2
 146 #define PWR_PVDLEVEL_3                  PWR_CR_PLS_LEV3
 147 #define PWR_PVDLEVEL_4                  PWR_CR_PLS_LEV4
 148 #define PWR_PVDLEVEL_5                  PWR_CR_PLS_LEV5
 149 #define PWR_PVDLEVEL_6                  PWR_CR_PLS_LEV6
 150 #define PWR_PVDLEVEL_7                  PWR_CR_PLS_LEV7  /* External input analog voltage
 151                                                             (Compare internally to VREFINT) */
 152 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
 153                                  ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
 154                                  ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
 155                                  ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
 156 /**
 157   * @}
 158   */
 159
 160 /** @defgroup PWR_PVD_Mode PWR PVD Mode
 161   * @{
 162   */
 163 #define PWR_PVD_MODE_NORMAL                 ((uint32_t)0x00000000)   /*!< basic mode is used */
 164 #define PWR_PVD_MODE_IT_RISING              ((uint32_t)0x00010001)   /*!< External Interrupt Mode with Rising edge trigger detection */
 165 #define PWR_PVD_MODE_IT_FALLING             ((uint32_t)0x00010002)   /*!< External Interrupt Mode with Falling edge trigger detection */
 166 #define PWR_PVD_MODE_IT_RISING_FALLING      ((uint32_t)0x00010003)   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
 167 #define PWR_PVD_MODE_EVENT_RISING           ((uint32_t)0x00020001)   /*!< Event Mode with Rising edge trigger detection */
 168 #define PWR_PVD_MODE_EVENT_FALLING          ((uint32_t)0x00020002)   /*!< Event Mode with Falling edge trigger detection */
 169 #define PWR_PVD_MODE_EVENT_RISING_FALLING   ((uint32_t)0x00020003)   /*!< Event Mode with Rising/Falling edge trigger detection */
 170
 171 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
 172                               ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
 173                               ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
 174                               ((MODE) == PWR_PVD_MODE_NORMAL))
 175 /**
 176   * @}
 177   */
 178
 179 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
 180   * @{
 181   */
 182 #define PWR_MAINREGULATOR_ON           ((uint32_t)0x00000000)
 183 #define PWR_LOWPOWERREGULATOR_ON       PWR_CR_LPSDSR
 184
 185 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
 186                                      ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
 187 /**
 188   * @}
 189   */
 190
 191 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
 192   * @{
 193   */
 194 #define PWR_SLEEPENTRY_WFI             ((uint8_t)0x01)
 195 #define PWR_SLEEPENTRY_WFE             ((uint8_t)0x02)
 196 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
 197 /**
 198   * @}
 199   */
 200
 201 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
 202   * @{
 203   */
 204 #define PWR_STOPENTRY_WFI              ((uint8_t)0x01)
 205 #define PWR_STOPENTRY_WFE              ((uint8_t)0x02)
 206 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
 207 /**
 208   * @}
 209   */
 210
 211 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
 212   * @{
 213   */
 214
 215 #define PWR_REGULATOR_VOLTAGE_SCALE1       PWR_CR_VOS_0
 216 #define PWR_REGULATOR_VOLTAGE_SCALE2       PWR_CR_VOS_1
 217 #define PWR_REGULATOR_VOLTAGE_SCALE3       PWR_CR_VOS
 218
 219 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
 220                                              ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
 221                                              ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
 222 /**
 223   * @}
 224   */
 225
 226 /** @defgroup PWR_Flag PWR Flag
 227   * @{
 228   */
 229 #define PWR_FLAG_WU                    PWR_CSR_WUF
 230 #define PWR_FLAG_SB                    PWR_CSR_SBF
 231 #define PWR_FLAG_PVDO                  PWR_CSR_PVDO
 232 #define PWR_FLAG_VREFINTRDY            PWR_CSR_VREFINTRDYF
 233 #define PWR_FLAG_VOS                   PWR_CSR_VOSF
 234 #define PWR_FLAG_REGLP                 PWR_CSR_REGLPF
 235
 236 /**
 237   * @}
 238   */
 239
 240 /**
 241   * @}
 242   */
 243
 244 /* Exported macro ------------------------------------------------------------*/
 245 /** @defgroup PWR_Exported_Macro PWR Exported Macro
 246   * @{
 247   */
 248
 249 /** @brief  macros configure the main internal regulator output voltage.
 250   * @param  __REGULATOR__: specifies the regulator output voltage to achieve
 251   *         a tradeoff between performance and power consumption when the device does
 252   *         not operate at the maximum frequency (refer to the datasheets for more details).
 253   *          This parameter can be one of the following values:
 254   *            @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
 255   *                                                System frequency up to 32 MHz.
 256   *            @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
 257   *                                                System frequency up to 16 MHz.
 258   *            @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
 259   *                                                System frequency up to 4.2 MHz
 260   * @retval None
 261   */
 262 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
 263
 264 /** @brief  Check PWR flag is set or not.
 265   * @param  __FLAG__: specifies the flag to check.
 266   *           This parameter can be one of the following values:
 267   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
 268   *                  was received from the WKUP pin or from the RTC alarm (Alarm B),
 269   *                  RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
 270   *                  An additional wakeup event is detected if the WKUP pin is enabled
 271   *                  (by setting the EWUP bit) when the WKUP pin level is already high.
 272   *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
 273   *                  resumed from StandBy mode.
 274   *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
 275   *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
 276   *                  For this reason, this bit is equal to 0 after Standby or reset
 277   *                  until the PVDE bit is set.
 278   *            @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
 279   *                 This bit indicates the state of the internal voltage reference, VREFINT.
 280   *            @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
 281   *                 the internal regulator to be ready after the voltage range is changed.
 282   *                 The VOSF bit indicates that the regulator has reached the voltage level
 283   *                 defined with bits VOS of PWR_CR register.
 284   *            @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
 285   *                 mode, this bit stays at 1 until the regulator is ready in main mode.
 286   *                 A polling on this bit is recommended to wait for the regulator main mode.
 287   *                 This bit is reset by hardware when the regulator is ready.
 288   * @retval The new state of __FLAG__ (TRUE or FALSE).
 289   */
 290 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
 291
 292 /** @brief  Clear the PWR's pending flags.
 293   * @param  __FLAG__: specifies the flag to clear.
 294   *          This parameter can be one of the following values:
 295   *            @arg PWR_FLAG_WU: Wake Up flag
 296   *            @arg PWR_FLAG_SB: StandBy flag
 297   */
 298 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |=  (__FLAG__) << 2)
 299
 300 #define PWR_EXTI_LINE_PVD  ((uint32_t)0x00010000)  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
 301
 302 /**
 303   * @brief Enable interrupt on PVD Exti Line 16.
 304   * @retval None.
 305   */
 306 #define __HAL_PWR_PVD_EXTI_ENABLE_IT()      (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
 307
 308 /**
 309   * @brief Disable interrupt on PVD Exti Line 16.
 310   * @retval None.
 311   */
 312 #define __HAL_PWR_PVD_EXTI_DISABLE_IT()     (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
 313
 314 /**
 315   * @brief Enable event on PVD Exti Line 16.
 316   * @retval None.
 317   */
 318 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
 319
 320 /**
 321   * @brief Disable event on PVD Exti Line 16.
 322   * @retval None.
 323   */
 324 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
 325
 326 /**
 327   * @brief  PVD EXTI line configuration: clear falling edge trigger and set rising edge.
 328   * @retval None.
 329   */
 330 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER()   EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
 331                                                   EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
 332
 333 /**
 334   * @brief  PVD EXTI line configuration: set falling edge trigger.
 335   * @retval None.
 336   */
 337 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER()  EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
 338
 339 /**
 340   * @brief  PVD EXTI line configuration: set rising edge trigger.
 341   * @retval None.
 342   */
 343 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER()   EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
 344
 345 /**
 346   * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
 347   * @retval EXTI PVD Line Status.
 348   */
 349 #define __HAL_PWR_PVD_EXTI_GET_FLAG()       (EXTI->PR & (PWR_EXTI_LINE_PVD))
 350
 351 /**
 352   * @brief Clear the PVD EXTI flag.
 353   * @retval None.
 354   */
 355 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()     (EXTI->PR = (PWR_EXTI_LINE_PVD))
 356
 357 /**
 358   * @brief Generate a Software interrupt on selected EXTI line.
 359   * @retval None.
 360   */
 361 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()  (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
 362 /**
 363   * @}
 364   */
 365
 366 /* Include PWR HAL Extension module */
 367 #include "stm32l1xx_hal_pwr_ex.h"
 368
 369 /* Exported functions --------------------------------------------------------*/
 370
 371 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
 372   * @{
 373   */
 374
 375 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
 376   * @{
 377   */
 378
 379 /* Initialization and de-initialization functions *******************************/
 380 void HAL_PWR_DeInit(void);
 381 void HAL_PWR_EnableBkUpAccess(void);
 382 void HAL_PWR_DisableBkUpAccess(void);
 383
 384 /**
 385   * @}
 386   */
 387
 388 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
 389   * @{
 390   */
 391
 392 /* Peripheral Control functions  ************************************************/
 393 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
 394 void HAL_PWR_EnablePVD(void);
 395 void HAL_PWR_DisablePVD(void);
 396
 397 /* WakeUp pins configuration functions ****************************************/
 398 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
 399 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
 400
 401 /* Low Power modes configuration functions ************************************/
 402 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
 403 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
 404 void HAL_PWR_EnterSTANDBYMode(void);
 405
 406 void HAL_PWR_PVD_IRQHandler(void);
 407 void HAL_PWR_PVDCallback(void);
 408 /**
 409   * @}
 410   */
 411
 412 /**
 413   * @}
 414   */
 415
 416 /**
 417   * @}
 418   */
 419
 420 /**
 421   * @}
 422   */
 423
 424 #ifdef __cplusplus
 425 }
 426 #endif
 427
 428
 429 #endif /* __STM32L1xx_HAL_PWR_H */
 430
 431 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/