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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32L1 / stm32l1xx_hal_sd.h
1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_sd.h
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief Header file of SD HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_HAL_SD_H
40 #define __STM32L1xx_HAL_SD_H
41
42 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
43
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47
48 /* Includes ------------------------------------------------------------------*/
49 #include "stm32l1xx_ll_sdmmc.h"
50
51 /** @addtogroup STM32L1xx_HAL_Driver
52 * @{
53 */
54
55 /** @addtogroup SD
56 * @{
57 */
58
59 /* Exported types ------------------------------------------------------------*/
60 /** @defgroup SD_Exported_Types SD Exported Types
61 * @{
62 */
63
64 #define SD_InitTypeDef SDIO_InitTypeDef
65 #define SD_TypeDef SDIO_TypeDef
66
67 /**
68 * @brief SDIO Handle Structure definition
69 */
70 typedef struct
71 {
72 SD_TypeDef *Instance; /*!< SDIO register base address */
73
74 SD_InitTypeDef Init; /*!< SD required parameters */
75
76 HAL_LockTypeDef Lock; /*!< SD locking object */
77
78 uint32_t CardType; /*!< SD card type */
79
80 uint32_t RCA; /*!< SD relative card address */
81
82 uint32_t CSD[4]; /*!< SD card specific data table */
83
84 uint32_t CID[4]; /*!< SD card identification number table */
85
86 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
87
88 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
89
90 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
91
92 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
93
94 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
95
96 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
97
98 }SD_HandleTypeDef;
99
100 /**
101 * @brief Card Specific Data: CSD Register
102 */
103 typedef struct
104 {
105 __IO uint8_t CSDStruct; /*!< CSD structure */
106 __IO uint8_t SysSpecVersion; /*!< System specification version */
107 __IO uint8_t Reserved1; /*!< Reserved */
108 __IO uint8_t TAAC; /*!< Data read access time 1 */
109 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
110 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
111 __IO uint16_t CardComdClasses; /*!< Card command classes */
112 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
113 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
114 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
115 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
116 __IO uint8_t DSRImpl; /*!< DSR implemented */
117 __IO uint8_t Reserved2; /*!< Reserved */
118 __IO uint32_t DeviceSize; /*!< Device Size */
119 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
120 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
121 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
122 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
123 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
124 __IO uint8_t EraseGrSize; /*!< Erase group size */
125 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
126 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
127 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
128 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
129 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
130 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
131 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
132 __IO uint8_t Reserved3; /*!< Reserved */
133 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
134 __IO uint8_t FileFormatGrouop; /*!< File format group */
135 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
136 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
137 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
138 __IO uint8_t FileFormat; /*!< File format */
139 __IO uint8_t ECC; /*!< ECC code */
140 __IO uint8_t CSD_CRC; /*!< CSD CRC */
141 __IO uint8_t Reserved4; /*!< Always 1 */
142
143 }HAL_SD_CSDTypedef;
144
145 /**
146 * @brief Card Identification Data: CID Register
147 */
148 typedef struct
149 {
150 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
151 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
152 __IO uint32_t ProdName1; /*!< Product Name part1 */
153 __IO uint8_t ProdName2; /*!< Product Name part2 */
154 __IO uint8_t ProdRev; /*!< Product Revision */
155 __IO uint32_t ProdSN; /*!< Product Serial Number */
156 __IO uint8_t Reserved1; /*!< Reserved1 */
157 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
158 __IO uint8_t CID_CRC; /*!< CID CRC */
159 __IO uint8_t Reserved2; /*!< Always 1 */
160
161 }HAL_SD_CIDTypedef;
162
163 /**
164 * @brief SD Card Status returned by ACMD13
165 */
166 typedef struct
167 {
168 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
169 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
170 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
171 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
172 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
173 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
174 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
175 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
176 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
177 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
178
179 }HAL_SD_CardStatusTypedef;
180
181 /**
182 * @brief SD Card information structure
183 */
184 typedef struct
185 {
186 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
187 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
188 uint64_t CardCapacity; /*!< Card capacity */
189 uint32_t CardBlockSize; /*!< Card block size */
190 uint16_t RCA; /*!< SD relative card address */
191 uint8_t CardType; /*!< SD card type */
192
193 }HAL_SD_CardInfoTypedef;
194
195 /**
196 * @brief SD Error status enumeration Structure definition
197 */
198 typedef enum
199 {
200 /**
201 * @brief SD specific error defines
202 */
203 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
204 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
205 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
206 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
207 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
208 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
209 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
210 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
211 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
212 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
213 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
214 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
215 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
216 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
217 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
218 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
219 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
220 SD_CC_ERROR = (18), /*!< Internal card controller error */
221 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
222 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
223 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
224 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
225 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
226 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
227 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
228 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
229 SD_INVALID_VOLTRANGE = (27),
230 SD_ADDR_OUT_OF_RANGE = (28),
231 SD_SWITCH_ERROR = (29),
232 SD_SDIO_DISABLED = (30),
233 SD_SDIO_FUNCTION_BUSY = (31),
234 SD_SDIO_FUNCTION_FAILED = (32),
235 SD_SDIO_UNKNOWN_FUNCTION = (33),
236
237 /**
238 * @brief Standard error defines
239 */
240 SD_INTERNAL_ERROR = (34),
241 SD_NOT_CONFIGURED = (35),
242 SD_REQUEST_PENDING = (36),
243 SD_REQUEST_NOT_APPLICABLE = (37),
244 SD_INVALID_PARAMETER = (38),
245 SD_UNSUPPORTED_FEATURE = (39),
246 SD_UNSUPPORTED_HW = (40),
247 SD_ERROR = (41),
248 SD_OK = (0)
249
250 }HAL_SD_ErrorTypedef;
251
252 /**
253 * @brief SD Transfer state enumeration structure
254 */
255 typedef enum
256 {
257 SD_TRANSFER_OK = 0, /*!< Transfer success */
258 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
259 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
260
261 }HAL_SD_TransferStateTypedef;
262
263 /**
264 * @brief SD Card State enumeration structure
265 */
266 typedef enum
267 {
268 SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
269 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
270 SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
271 SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
272 SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
273 SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
274 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
275 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
276 SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
277
278 }HAL_SD_CardStateTypedef;
279
280 /**
281 * @brief SD Operation enumeration structure
282 */
283 typedef enum
284 {
285 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
286 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
287 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
288 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
289
290 }HAL_SD_OperationTypedef;
291
292 /**
293 * @}
294 */
295
296 /* Exported constants --------------------------------------------------------*/
297 /** @defgroup SD_Exported_Constants SD Exported Constants
298 * @{
299 */
300
301 /**
302 * @brief SD Commands Index
303 */
304 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
305 #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
306 #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
307 #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
308 #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
309 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
310 operating condition register (OCR) content in the response on the CMD line. */
311 #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
312 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
313 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
314 and asks the card whether card supports voltage. */
315 #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
316 #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
317 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
318 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
319 #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
320 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
321 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
322 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
323 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
324 for SDHS and SDXC. */
325 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
326 fixed 512 bytes in case of SDHC and SDXC. */
327 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
328 STOP_TRANSMISSION command. */
329 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
330 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
331 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
332 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
333 fixed 512 bytes in case of SDHC and SDXC. */
334 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
335 #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
336 #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
337 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
338 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
339 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
340 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
341 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
342 #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
343 system set by switch function command (CMD6). */
344 #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
345 Reserved for each command system set by switch function command (CMD6). */
346 #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
347 #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
348 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
349 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
350 the SET_BLOCK_LEN command. */
351 #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
352 than a standard command. */
353 #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
354 for general purpose/application specific commands. */
355 #define SD_CMD_NO_CMD ((uint8_t)64)
356
357 /**
358 * @brief Following commands are SD Card Specific commands.
359 * SDIO_APP_CMD should be sent before sending these commands.
360 */
361 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
362 widths are given in SCR register. */
363 #define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
364 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
365 32bit+CRC data block. */
366 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
367 send its operating condition register (OCR) content in the response on the CMD line. */
368 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
369 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
370 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
371 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
372
373 /**
374 * @brief Following commands are SD Card Specific security commands.
375 * SD_CMD_APP_CMD should be sent before sending these commands.
376 */
377 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
378 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
379 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
380 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
381 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
382 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
383 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
384 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
385 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
386 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
387 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
388
389 /**
390 * @brief Supported SD Memory Cards
391 */
392 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
393 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
394 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
395 #define MULTIMEDIA_CARD ((uint32_t)0x00000003)
396 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
397 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
398 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
399 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
400 /**
401 * @}
402 */
403
404 /* Exported macro ------------------------------------------------------------*/
405 /** @defgroup SD_Exported_macros SD Exported Macros
406 * @brief macros to handle interrupts and specific clock configurations
407 * @{
408 */
409
410 /**
411 * @brief Enable the SD device.
412 * @retval None
413 */
414 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
415
416 /**
417 * @brief Disable the SD device.
418 * @retval None
419 */
420 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
421
422 /**
423 * @brief Enable the SDIO DMA transfer.
424 * @retval None
425 */
426 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
427
428 /**
429 * @brief Disable the SDIO DMA transfer.
430 * @retval None
431 */
432 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
433
434 /**
435 * @brief Enable the SD device interrupt.
436 * @param __HANDLE__: SD Handle
437 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
438 * This parameter can be one or a combination of the following values:
439 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
440 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
441 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
442 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
443 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
444 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
445 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
446 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
447 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
448 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
449 * bus mode interrupt
450 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
451 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
452 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
453 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
454 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
455 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
456 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
457 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
458 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
459 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
460 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
461 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
462 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
463 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
464 * @retval None
465 */
466 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
467
468 /**
469 * @brief Disable the SD device interrupt.
470 * @param __HANDLE__: SD Handle
471 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
472 * This parameter can be one or a combination of the following values:
473 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
474 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
475 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
476 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
477 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
478 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
479 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
480 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
481 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
482 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
483 * bus mode interrupt
484 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
485 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
486 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
487 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
488 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
489 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
490 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
491 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
492 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
493 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
494 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
495 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
496 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
497 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
498 * @retval None
499 */
500 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
501
502 /**
503 * @brief Check whether the specified SD flag is set or not.
504 * @param __HANDLE__: SD Handle
505 * @param __FLAG__: specifies the flag to check.
506 * This parameter can be one of the following values:
507 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
508 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
509 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
510 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
511 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
512 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
513 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
514 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
515 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
516 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
517 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
518 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
519 * @arg SDIO_FLAG_TXACT: Data transmit in progress
520 * @arg SDIO_FLAG_RXACT: Data receive in progress
521 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
522 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
523 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
524 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
525 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
526 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
527 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
528 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
529 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
530 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
531 * @retval The new state of SD FLAG (SET or RESET).
532 */
533 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
534
535 /**
536 * @brief Clear the SD's pending flags.
537 * @param __HANDLE__: SD Handle
538 * @param __FLAG__: specifies the flag to clear.
539 * This parameter can be one or a combination of the following values:
540 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
541 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
542 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
543 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
544 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
545 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
546 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
547 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
548 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
549 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
550 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
551 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
552 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
553 * @retval None
554 */
555 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
556
557 /**
558 * @brief Check whether the specified SD interrupt has occurred or not.
559 * @param __HANDLE__: SD Handle
560 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
561 * This parameter can be one of the following values:
562 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
563 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
564 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
565 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
566 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
567 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
568 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
569 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
570 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
571 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
572 * bus mode interrupt
573 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
574 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
575 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
576 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
577 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
578 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
579 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
580 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
581 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
582 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
583 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
584 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
585 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
586 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
587 * @retval The new state of SD IT (SET or RESET).
588 */
589 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
590
591 /**
592 * @brief Clear the SD's interrupt pending bits.
593 * @param __HANDLE__ : SD Handle
594 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
595 * This parameter can be one or a combination of the following values:
596 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
597 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
598 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
599 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
600 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
601 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
602 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
603 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
604 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
605 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
606 * bus mode interrupt
607 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
608 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
609 * @retval None
610 */
611 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
612 /**
613 * @}
614 */
615
616 /* Exported functions --------------------------------------------------------*/
617 /** @addtogroup SD_Exported_Functions
618 * @{
619 */
620
621 /* Initialization and de-initialization functions **********************************/
622 /** @addtogroup SD_Exported_Functions_Group1
623 * @{
624 */
625 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
626 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
627 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
628 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
629 /**
630 * @}
631 */
632
633 /* I/O operation functions *****************************************************/
634 /** @addtogroup SD_Exported_Functions_Group2
635 * @{
636 */
637 /* Blocking mode: Polling */
638 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
639 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
640 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
641
642 /* Non-Blocking mode: Interrupt */
643 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
644
645 /* Callback in non blocking modes (DMA) */
646 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
647 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
648 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
649 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
650 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
651 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
652
653 /* Non-Blocking mode: DMA */
654 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
655 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
656 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
657 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
658 /**
659 * @}
660 */
661
662 /* Peripheral Control functions ************************************************/
663 /** @addtogroup SD_Exported_Functions_Group3
664 * @{
665 */
666 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
667 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
668 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
669 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
670 /**
671 * @}
672 */
673
674 /* Peripheral State functions **************************************************/
675 /** @addtogroup SD_Exported_Functions_Group4
676 * @{
677 */
678 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
679 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
680 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
681 /**
682 * @}
683 */
684
685 /**
686 * @}
687 */
688
689 /**
690 * @}
691 */
692
693 /**
694 * @}
695 */
696
697 #ifdef __cplusplus
698 }
699 #endif
700
701 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
702
703 #endif /* __STM32L1xx_HAL_SD_H */
704
705 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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