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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32L1 / stm32l1xx_hal_spi.c
1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_spi.c
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief SPI HAL module driver.
8 *
9 * This file provides firmware functions to manage the following
10 * functionalities of the Serial Peripheral Interface (SPI) peripheral:
11 * + Initialization and de-initialization functions
12 * + IO operation functions
13 * + Peripheral Control functions
14 * + Peripheral State functions
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 The SPI HAL driver can be used as follows:
21
22 (#) Declare a SPI_HandleTypeDef handle structure, for example:
23 SPI_HandleTypeDef hspi;
24
25 (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
26 (##) Enable the SPIx interface clock
27 (##) SPI pins configuration
28 (+++) Enable the clock for the SPI GPIOs
29 (+++) Configure these SPI pins as alternate function push-pull
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the SPIx interrupt priority
32 (+++) Enable the NVIC SPI IRQ handle
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
35 (+++) Enable the DMAx clock
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx Channel
38 (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
40
41 (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
42 management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
43
44 (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
45 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
46 by calling the customed HAL_SPI_MspInit() API.
47 [..]
48 Circular mode restriction:
49 (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
50 (##) Master 2Lines RxOnly
51 (##) Master 1Line Rx
52 (#) The CRC feature is not managed when the DMA circular mode is enabled
53 (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
54 the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
55
56
57
58 @endverbatim
59 ******************************************************************************
60 * @attention
61 *
62 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
63 *
64 * Redistribution and use in source and binary forms, with or without modification,
65 * are permitted provided that the following conditions are met:
66 * 1. Redistributions of source code must retain the above copyright notice,
67 * this list of conditions and the following disclaimer.
68 * 2. Redistributions in binary form must reproduce the above copyright notice,
69 * this list of conditions and the following disclaimer in the documentation
70 * and/or other materials provided with the distribution.
71 * 3. Neither the name of STMicroelectronics nor the names of its contributors
72 * may be used to endorse or promote products derived from this software
73 * without specific prior written permission.
74 *
75 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
76 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
78 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
81 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
82 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
83 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 ******************************************************************************
87 */
88
89 /* Includes ------------------------------------------------------------------*/
90 #include "stm32l1xx_hal.h"
91
92 /** @addtogroup STM32L1xx_HAL_Driver
93 * @{
94 */
95
96 /** @defgroup SPI SPI
97 * @brief SPI HAL module driver
98 * @{
99 */
100
101 #ifdef HAL_SPI_MODULE_ENABLED
102
103 /* Private typedef -----------------------------------------------------------*/
104 /* Private define ------------------------------------------------------------*/
105 /** @defgroup SPI_Private_Constants SPI Private Constants
106 * @{
107 */
108 #define SPI_TIMEOUT_VALUE 10
109 /**
110 * @}
111 */
112
113 /* Private macro -------------------------------------------------------------*/
114 /* Private variables ---------------------------------------------------------*/
115 /* Private function prototypes -----------------------------------------------*/
116 /** @defgroup SPI_Private_Functions SPI Private Functions
117 * @{
118 */
119
120 static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
121 static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi);
122 static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
123 static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi);
124 static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi);
125 static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma);
126 static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma);
127 static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
128 static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma);
129 static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma);
130 static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
131 static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma);
132 static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
133 /**
134 * @}
135 */
136
137 /* Exported functions ---------------------------------------------------------*/
138
139 /** @defgroup SPI_Exported_Functions SPI Exported Functions
140 * @{
141 */
142
143 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
144 * @brief Initialization and Configuration functions
145 *
146 @verbatim
147 ===============================================================================
148 ##### Initialization and de-initialization functions #####
149 ===============================================================================
150 [..] This subsection provides a set of functions allowing to initialize and
151 de-initialiaze the SPIx peripheral:
152
153 (+) User must implement HAL_SPI_MspInit() function in which he configures
154 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
155
156 (+) Call the function HAL_SPI_Init() to configure the selected device with
157 the selected configuration:
158 (++) Mode
159 (++) Direction
160 (++) Data Size
161 (++) Clock Polarity and Phase
162 (++) NSS Management
163 (++) BaudRate Prescaler
164 (++) FirstBit
165 (++) TIMode
166 (++) CRC Calculation
167 (++) CRC Polynomial if CRC enabled
168
169 (+) Call the function HAL_SPI_DeInit() to restore the default configuration
170 of the selected SPIx periperal.
171
172 @endverbatim
173 * @{
174 */
175
176 /**
177 * @brief Initializes the SPI according to the specified parameters
178 * in the SPI_InitTypeDef and create the associated handle.
179 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
180 * the configuration information for SPI module.
181 * @retval HAL status
182 */
183 __weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
184 {
185 return HAL_ERROR;
186 }
187
188 /**
189 * @brief DeInitializes the SPI peripheral
190 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
191 * the configuration information for SPI module.
192 * @retval HAL status
193 */
194 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
195 {
196 /* Check the SPI handle allocation */
197 if(hspi == HAL_NULL)
198 {
199 return HAL_ERROR;
200 }
201
202 /* Disable the SPI Peripheral Clock */
203 __HAL_SPI_DISABLE(hspi);
204
205 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
206 HAL_SPI_MspDeInit(hspi);
207
208 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
209 hspi->State = HAL_SPI_STATE_RESET;
210
211 /* Release Lock */
212 __HAL_UNLOCK(hspi);
213
214 return HAL_OK;
215 }
216
217 /**
218 * @brief SPI MSP Init
219 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
220 * the configuration information for SPI module.
221 * @retval None
222 */
223 __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
224 {
225 /* NOTE : This function Should not be modified, when the callback is needed,
226 the HAL_SPI_MspInit could be implenetd in the user file
227 */
228 }
229
230 /**
231 * @brief SPI MSP DeInit
232 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
233 * the configuration information for SPI module.
234 * @retval None
235 */
236 __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
237 {
238 /* NOTE : This function Should not be modified, when the callback is needed,
239 the HAL_SPI_MspDeInit could be implenetd in the user file
240 */
241 }
242
243 /**
244 * @}
245 */
246
247 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
248 * @brief Data transfers functions
249 *
250 @verbatim
251 ==============================================================================
252 ##### IO operation functions #####
253 ===============================================================================
254 This subsection provides a set of functions allowing to manage the SPI
255 data transfers.
256
257 [..] The SPI supports master and slave mode :
258
259 (#) There are two modes of transfer:
260 (++) Blocking mode: The communication is performed in polling mode.
261 The HAL status of all data processing is returned by the same function
262 after finishing transfer.
263 (++) No-Blocking mode: The communication is performed using Interrupts
264 or DMA, These APIs return the HAL status.
265 The end of the data processing will be indicated through the
266 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
267 using DMA mode.
268 The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
269 will be executed respectivelly at the end of the transmit or Receive process
270 The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
271
272 (#) Blocking mode APIs are :
273 (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
274 (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
275 (++) HAL_SPI_TransmitReceive() in full duplex mode
276
277 (#) Non Blocking mode API's with Interrupt are :
278 (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
279 (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
280 (++) HAL_SPI_TransmitReceive_IT()in full duplex mode
281 (++) HAL_SPI_IRQHandler()
282
283 (#) Non Blocking mode functions with DMA are :
284 (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
285 (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
286 (++) HAL_SPI_TransmitReceive_DMA() in full duplex mode
287
288 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
289 (++) HAL_SPI_TxCpltCallback()
290 (++) HAL_SPI_RxCpltCallback()
291 (++) HAL_SPI_TxRxCpltCallback()
292 (++) HAL_SPI_TxHalfCpltCallback()
293 (++) HAL_SPI_RxHalfCpltCallback()
294 (++) HAL_SPI_TxRxHalfCpltCallback()
295 (++) HAL_SPI_ErrorCallback()
296
297 @endverbatim
298 * @{
299 */
300
301 /**
302 * @brief Transmit an amount of data in blocking mode
303 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
304 * the configuration information for SPI module.
305 * @param pData: pointer to data buffer
306 * @param Size: amount of data to be sent
307 * @param Timeout: Timeout duration
308 * @retval HAL status
309 */
310 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
311 {
312
313 if(hspi->State == HAL_SPI_STATE_READY)
314 {
315 if((pData == HAL_NULL ) || (Size == 0))
316 {
317 return HAL_ERROR;
318 }
319
320 /* Check the parameters */
321 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
322
323 /* Process Locked */
324 __HAL_LOCK(hspi);
325
326 /* Configure communication */
327 hspi->State = HAL_SPI_STATE_BUSY_TX;
328 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
329
330 hspi->pTxBuffPtr = pData;
331 hspi->TxXferSize = Size;
332 hspi->TxXferCount = Size;
333
334 /*Init field not used in handle to zero */
335 hspi->TxISR = 0;
336 hspi->RxISR = 0;
337 hspi->pRxBuffPtr = HAL_NULL;
338 hspi->RxXferSize = 0;
339 hspi->RxXferCount = 0;
340
341 /* Reset CRC Calculation */
342 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
343 {
344 SPI_RESET_CRC(hspi);
345 }
346
347 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
348 {
349 /* Configure communication direction : 1Line */
350 SPI_1LINE_TX(hspi);
351 }
352
353 /* Check if the SPI is already enabled */
354 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
355 {
356 /* Enable SPI peripheral */
357 __HAL_SPI_ENABLE(hspi);
358 }
359
360 /* Transmit data in 8 Bit mode */
361 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
362 {
363 if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
364 {
365 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
366 hspi->TxXferCount--;
367 }
368 while(hspi->TxXferCount > 0)
369 {
370 /* Wait until TXE flag is set to send data */
371 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
372 {
373 return HAL_TIMEOUT;
374 }
375 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
376 hspi->TxXferCount--;
377 }
378 /* Enable CRC Transmission */
379 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
380 {
381 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
382 }
383 }
384 /* Transmit data in 16 Bit mode */
385 else
386 {
387 if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
388 {
389 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
390 hspi->pTxBuffPtr+=2;
391 hspi->TxXferCount--;
392 }
393 while(hspi->TxXferCount > 0)
394 {
395 /* Wait until TXE flag is set to send data */
396 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
397 {
398 return HAL_TIMEOUT;
399 }
400 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
401 hspi->pTxBuffPtr+=2;
402 hspi->TxXferCount--;
403 }
404 /* Enable CRC Transmission */
405 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
406 {
407 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
408 }
409 }
410
411 /* Wait until TXE flag is set to send data */
412 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
413 {
414 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
415 return HAL_TIMEOUT;
416 }
417
418 /* Wait until Busy flag is reset before disabling SPI */
419 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
420 {
421 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
422 return HAL_TIMEOUT;
423 }
424
425 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
426 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
427 {
428 __HAL_SPI_CLEAR_OVRFLAG(hspi);
429 }
430
431 hspi->State = HAL_SPI_STATE_READY;
432
433 /* Process Unlocked */
434 __HAL_UNLOCK(hspi);
435
436 return HAL_OK;
437 }
438 else
439 {
440 return HAL_BUSY;
441 }
442 }
443
444 /**
445 * @brief Receive an amount of data in blocking mode
446 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
447 * the configuration information for SPI module.
448 * @param pData: pointer to data buffer
449 * @param Size: amount of data to be sent
450 * @param Timeout: Timeout duration
451 * @retval HAL status
452 */
453 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
454 {
455 __IO uint16_t tmpreg = 0;
456
457 if(hspi->State == HAL_SPI_STATE_READY)
458 {
459 if((pData == HAL_NULL ) || (Size == 0))
460 {
461 return HAL_ERROR;
462 }
463
464 /* Process Locked */
465 __HAL_LOCK(hspi);
466
467 /* Configure communication */
468 hspi->State = HAL_SPI_STATE_BUSY_RX;
469 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
470
471 hspi->pRxBuffPtr = pData;
472 hspi->RxXferSize = Size;
473 hspi->RxXferCount = Size;
474
475 /*Init field not used in handle to zero */
476 hspi->RxISR = 0;
477 hspi->TxISR = 0;
478 hspi->pTxBuffPtr = HAL_NULL;
479 hspi->TxXferSize = 0;
480 hspi->TxXferCount = 0;
481
482 /* Configure communication direction : 1Line */
483 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
484 {
485 SPI_1LINE_RX(hspi);
486 }
487
488 /* Reset CRC Calculation */
489 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
490 {
491 SPI_RESET_CRC(hspi);
492 }
493
494 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
495 {
496 /* Process Unlocked */
497 __HAL_UNLOCK(hspi);
498
499 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
500 return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
501 }
502
503 /* Check if the SPI is already enabled */
504 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
505 {
506 /* Enable SPI peripheral */
507 __HAL_SPI_ENABLE(hspi);
508 }
509
510 /* Receive data in 8 Bit mode */
511 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
512 {
513 while(hspi->RxXferCount > 1)
514 {
515 /* Wait until RXNE flag is set */
516 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
517 {
518 return HAL_TIMEOUT;
519 }
520
521 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
522 hspi->RxXferCount--;
523 }
524 /* Enable CRC Transmission */
525 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
526 {
527 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
528 }
529 }
530 /* Receive data in 16 Bit mode */
531 else
532 {
533 while(hspi->RxXferCount > 1)
534 {
535 /* Wait until RXNE flag is set to read data */
536 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
537 {
538 return HAL_TIMEOUT;
539 }
540
541 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
542 hspi->pRxBuffPtr+=2;
543 hspi->RxXferCount--;
544 }
545 /* Enable CRC Transmission */
546 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
547 {
548 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
549 }
550 }
551
552 /* Wait until RXNE flag is set */
553 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
554 {
555 return HAL_TIMEOUT;
556 }
557
558 /* Receive last data in 8 Bit mode */
559 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
560 {
561 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
562 }
563 /* Receive last data in 16 Bit mode */
564 else
565 {
566 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
567 hspi->pRxBuffPtr+=2;
568 }
569 hspi->RxXferCount--;
570
571 /* Wait until RXNE flag is set: CRC Received */
572 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
573 {
574 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
575 {
576 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
577 return HAL_TIMEOUT;
578 }
579
580 /* Read CRC to Flush RXNE flag */
581 tmpreg = hspi->Instance->DR;
582 }
583
584 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
585 {
586 /* Disable SPI peripheral */
587 __HAL_SPI_DISABLE(hspi);
588 }
589
590 hspi->State = HAL_SPI_STATE_READY;
591
592 /* Check if CRC error occurred */
593 if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
594 {
595 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
596
597 /* Reset CRC Calculation */
598 SPI_RESET_CRC(hspi);
599
600 /* Process Unlocked */
601 __HAL_UNLOCK(hspi);
602
603 return HAL_ERROR;
604 }
605
606 /* Process Unlocked */
607 __HAL_UNLOCK(hspi);
608
609 return HAL_OK;
610 }
611 else
612 {
613 return HAL_BUSY;
614 }
615 }
616
617 /**
618 * @brief Transmit and Receive an amount of data in blocking mode
619 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
620 * the configuration information for SPI module.
621 * @param pTxData: pointer to transmission data buffer
622 * @param pRxData: pointer to reception data buffer to be
623 * @param Size: amount of data to be sent
624 * @param Timeout: Timeout duration
625 * @retval HAL status
626 */
627 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
628 {
629 __IO uint16_t tmpreg = 0;
630
631 if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
632 {
633 if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
634 {
635 return HAL_ERROR;
636 }
637
638 /* Check the parameters */
639 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
640
641 /* Process Locked */
642 __HAL_LOCK(hspi);
643
644 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
645 if(hspi->State == HAL_SPI_STATE_READY)
646 {
647 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
648 }
649
650 /* Configure communication */
651 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
652
653 hspi->pRxBuffPtr = pRxData;
654 hspi->RxXferSize = Size;
655 hspi->RxXferCount = Size;
656
657 hspi->pTxBuffPtr = pTxData;
658 hspi->TxXferSize = Size;
659 hspi->TxXferCount = Size;
660
661 /*Init field not used in handle to zero */
662 hspi->RxISR = 0;
663 hspi->TxISR = 0;
664
665 /* Reset CRC Calculation */
666 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
667 {
668 SPI_RESET_CRC(hspi);
669 }
670
671 /* Check if the SPI is already enabled */
672 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
673 {
674 /* Enable SPI peripheral */
675 __HAL_SPI_ENABLE(hspi);
676 }
677
678 /* Transmit and Receive data in 16 Bit mode */
679 if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
680 {
681 if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
682 {
683 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
684 hspi->pTxBuffPtr+=2;
685 hspi->TxXferCount--;
686 }
687 if(hspi->TxXferCount == 0)
688 {
689 /* Enable CRC Transmission */
690 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
691 {
692 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
693 }
694
695 /* Wait until RXNE flag is set */
696 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
697 {
698 return HAL_TIMEOUT;
699 }
700
701 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
702 hspi->pRxBuffPtr+=2;
703 hspi->RxXferCount--;
704 }
705 else
706 {
707 while(hspi->TxXferCount > 0)
708 {
709 /* Wait until TXE flag is set to send data */
710 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
711 {
712 return HAL_TIMEOUT;
713 }
714
715 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
716 hspi->pTxBuffPtr+=2;
717 hspi->TxXferCount--;
718
719 /* Enable CRC Transmission */
720 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
721 {
722 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
723 }
724
725 /* Wait until RXNE flag is set */
726 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
727 {
728 return HAL_TIMEOUT;
729 }
730
731 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
732 hspi->pRxBuffPtr+=2;
733 hspi->RxXferCount--;
734 }
735 /* Receive the last byte */
736 if(hspi->Init.Mode == SPI_MODE_SLAVE)
737 {
738 /* Wait until RXNE flag is set */
739 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
740 {
741 return HAL_TIMEOUT;
742 }
743
744 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
745 hspi->pRxBuffPtr+=2;
746 hspi->RxXferCount--;
747 }
748 }
749 }
750 /* Transmit and Receive data in 8 Bit mode */
751 else
752 {
753 if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
754 {
755 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
756 hspi->TxXferCount--;
757 }
758 if(hspi->TxXferCount == 0)
759 {
760 /* Enable CRC Transmission */
761 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
762 {
763 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
764 }
765
766 /* Wait until RXNE flag is set */
767 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
768 {
769 return HAL_TIMEOUT;
770 }
771
772 (*hspi->pRxBuffPtr) = hspi->Instance->DR;
773 hspi->RxXferCount--;
774 }
775 else
776 {
777 while(hspi->TxXferCount > 0)
778 {
779 /* Wait until TXE flag is set to send data */
780 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
781 {
782 return HAL_TIMEOUT;
783 }
784
785 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
786 hspi->TxXferCount--;
787
788 /* Enable CRC Transmission */
789 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
790 {
791 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
792 }
793
794 /* Wait until RXNE flag is set */
795 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
796 {
797 return HAL_TIMEOUT;
798 }
799
800 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
801 hspi->RxXferCount--;
802 }
803 if(hspi->Init.Mode == SPI_MODE_SLAVE)
804 {
805 /* Wait until RXNE flag is set */
806 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
807 {
808 return HAL_TIMEOUT;
809 }
810
811 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
812 hspi->RxXferCount--;
813 }
814 }
815 }
816
817 /* Read CRC from DR to close CRC calculation process */
818 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
819 {
820 /* Wait until RXNE flag is set */
821 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
822 {
823 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
824 return HAL_TIMEOUT;
825 }
826 /* Read CRC */
827 tmpreg = hspi->Instance->DR;
828 }
829
830 /* Wait until Busy flag is reset before disabling SPI */
831 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
832 {
833 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
834 return HAL_TIMEOUT;
835 }
836
837 hspi->State = HAL_SPI_STATE_READY;
838
839 /* Check if CRC error occurred */
840 if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
841 {
842 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
843
844 /* Reset CRC Calculation */
845 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
846 {
847 SPI_RESET_CRC(hspi);
848 }
849
850 /* Process Unlocked */
851 __HAL_UNLOCK(hspi);
852
853 return HAL_ERROR;
854 }
855
856 /* Process Unlocked */
857 __HAL_UNLOCK(hspi);
858
859 return HAL_OK;
860 }
861 else
862 {
863 return HAL_BUSY;
864 }
865 }
866
867 /**
868 * @brief Transmit an amount of data in no-blocking mode with Interrupt
869 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
870 * the configuration information for SPI module.
871 * @param pData: pointer to data buffer
872 * @param Size: amount of data to be sent
873 * @retval HAL status
874 */
875 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
876 {
877 if(hspi->State == HAL_SPI_STATE_READY)
878 {
879 if((pData == HAL_NULL) || (Size == 0))
880 {
881 return HAL_ERROR;
882 }
883
884 /* Check the parameters */
885 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
886
887 /* Process Locked */
888 __HAL_LOCK(hspi);
889
890 /* Configure communication */
891 hspi->State = HAL_SPI_STATE_BUSY_TX;
892 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
893
894 hspi->TxISR = &SPI_TxISR;
895 hspi->pTxBuffPtr = pData;
896 hspi->TxXferSize = Size;
897 hspi->TxXferCount = Size;
898
899 /*Init field not used in handle to zero */
900 hspi->RxISR = 0;
901 hspi->pRxBuffPtr = HAL_NULL;
902 hspi->RxXferSize = 0;
903 hspi->RxXferCount = 0;
904
905 /* Configure communication direction : 1Line */
906 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
907 {
908 SPI_1LINE_TX(hspi);
909 }
910
911 /* Reset CRC Calculation */
912 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
913 {
914 SPI_RESET_CRC(hspi);
915 }
916
917 if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
918 {
919 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
920 }else
921 {
922 /* Enable TXE and ERR interrupt */
923 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
924 }
925 /* Process Unlocked */
926 __HAL_UNLOCK(hspi);
927
928 /* Check if the SPI is already enabled */
929 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
930 {
931 /* Enable SPI peripheral */
932 __HAL_SPI_ENABLE(hspi);
933 }
934
935 return HAL_OK;
936 }
937 else
938 {
939 return HAL_BUSY;
940 }
941 }
942
943 /**
944 * @brief Receive an amount of data in no-blocking mode with Interrupt
945 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
946 * the configuration information for SPI module.
947 * @param pData: pointer to data buffer
948 * @param Size: amount of data to be sent
949 * @retval HAL status
950 */
951 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
952 {
953 if(hspi->State == HAL_SPI_STATE_READY)
954 {
955 if((pData == HAL_NULL) || (Size == 0))
956 {
957 return HAL_ERROR;
958 }
959
960 /* Process Locked */
961 __HAL_LOCK(hspi);
962
963 /* Configure communication */
964 hspi->State = HAL_SPI_STATE_BUSY_RX;
965 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
966
967 hspi->RxISR = &SPI_RxISR;
968 hspi->pRxBuffPtr = pData;
969 hspi->RxXferSize = Size;
970 hspi->RxXferCount = Size ;
971
972 /*Init field not used in handle to zero */
973 hspi->TxISR = 0;
974 hspi->pTxBuffPtr = HAL_NULL;
975 hspi->TxXferSize = 0;
976 hspi->TxXferCount = 0;
977
978 /* Configure communication direction : 1Line */
979 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
980 {
981 SPI_1LINE_RX(hspi);
982 }
983 else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
984 {
985 /* Process Unlocked */
986 __HAL_UNLOCK(hspi);
987
988 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
989 return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
990 }
991
992 /* Reset CRC Calculation */
993 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
994 {
995 SPI_RESET_CRC(hspi);
996 }
997
998 /* Enable TXE and ERR interrupt */
999 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
1000
1001 /* Process Unlocked */
1002 __HAL_UNLOCK(hspi);
1003
1004 /* Note : The SPI must be enabled after unlocking current process
1005 to avoid the risk of SPI interrupt handle execution before current
1006 process unlock */
1007
1008 /* Check if the SPI is already enabled */
1009 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1010 {
1011 /* Enable SPI peripheral */
1012 __HAL_SPI_ENABLE(hspi);
1013 }
1014
1015 return HAL_OK;
1016 }
1017 else
1018 {
1019 return HAL_BUSY;
1020 }
1021 }
1022
1023 /**
1024 * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
1025 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1026 * the configuration information for SPI module.
1027 * @param pTxData: pointer to transmission data buffer
1028 * @param pRxData: pointer to reception data buffer to be
1029 * @param Size: amount of data to be sent
1030 * @retval HAL status
1031 */
1032 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
1033 {
1034
1035 if((hspi->State == HAL_SPI_STATE_READY) || \
1036 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
1037 {
1038 if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
1039 {
1040 return HAL_ERROR;
1041 }
1042
1043 /* Check the parameters */
1044 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1045
1046 /* Process locked */
1047 __HAL_LOCK(hspi);
1048
1049 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
1050 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
1051 {
1052 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1053 }
1054
1055 /* Configure communication */
1056 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1057
1058 hspi->TxISR = &SPI_TxISR;
1059 hspi->pTxBuffPtr = pTxData;
1060 hspi->TxXferSize = Size;
1061 hspi->TxXferCount = Size;
1062
1063 hspi->RxISR = &SPI_2LinesRxISR;
1064 hspi->pRxBuffPtr = pRxData;
1065 hspi->RxXferSize = Size;
1066 hspi->RxXferCount = Size;
1067
1068 /* Reset CRC Calculation */
1069 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1070 {
1071 SPI_RESET_CRC(hspi);
1072 }
1073
1074 /* Enable TXE, RXNE and ERR interrupt */
1075 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
1076
1077 /* Process Unlocked */
1078 __HAL_UNLOCK(hspi);
1079
1080 /* Check if the SPI is already enabled */
1081 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1082 {
1083 /* Enable SPI peripheral */
1084 __HAL_SPI_ENABLE(hspi);
1085 }
1086
1087 return HAL_OK;
1088 }
1089 else
1090 {
1091 return HAL_BUSY;
1092 }
1093 }
1094
1095 /**
1096 * @brief Transmit an amount of data in no-blocking mode with DMA
1097 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1098 * the configuration information for SPI module.
1099 * @param pData: pointer to data buffer
1100 * @param Size: amount of data to be sent
1101 * @retval HAL status
1102 */
1103 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1104 {
1105 if(hspi->State == HAL_SPI_STATE_READY)
1106 {
1107 if((pData == HAL_NULL) || (Size == 0))
1108 {
1109 return HAL_ERROR;
1110 }
1111
1112 /* Check the parameters */
1113 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
1114
1115 /* Process Locked */
1116 __HAL_LOCK(hspi);
1117
1118 /* Configure communication */
1119 hspi->State = HAL_SPI_STATE_BUSY_TX;
1120 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1121
1122 hspi->pTxBuffPtr = pData;
1123 hspi->TxXferSize = Size;
1124 hspi->TxXferCount = Size;
1125
1126 /*Init field not used in handle to zero */
1127 hspi->TxISR = 0;
1128 hspi->RxISR = 0;
1129 hspi->pRxBuffPtr = HAL_NULL;
1130 hspi->RxXferSize = 0;
1131 hspi->RxXferCount = 0;
1132
1133 /* Configure communication direction : 1Line */
1134 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1135 {
1136 SPI_1LINE_TX(hspi);
1137 }
1138
1139 /* Reset CRC Calculation */
1140 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1141 {
1142 SPI_RESET_CRC(hspi);
1143 }
1144
1145 /* Set the SPI TxDMA Half transfer complete callback */
1146 hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
1147
1148 /* Set the SPI TxDMA transfer complete callback */
1149 hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
1150
1151 /* Set the DMA error callback */
1152 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1153
1154 /* Enable the Tx DMA Channel */
1155 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
1156
1157 /* Enable Tx DMA Request */
1158 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1159
1160 /* Process Unlocked */
1161 __HAL_UNLOCK(hspi);
1162
1163 /* Check if the SPI is already enabled */
1164 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1165 {
1166 /* Enable SPI peripheral */
1167 __HAL_SPI_ENABLE(hspi);
1168 }
1169
1170 return HAL_OK;
1171 }
1172 else
1173 {
1174 return HAL_BUSY;
1175 }
1176 }
1177
1178 /**
1179 * @brief Receive an amount of data in no-blocking mode with DMA
1180 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1181 * the configuration information for SPI module.
1182 * @param pData: pointer to data buffer
1183 * @note When the CRC feature is enabled the pData Length must be Size + 1.
1184 * @param Size: amount of data to be sent
1185 * @retval HAL status
1186 */
1187 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1188 {
1189 if(hspi->State == HAL_SPI_STATE_READY)
1190 {
1191 if((pData == HAL_NULL) || (Size == 0))
1192 {
1193 return HAL_ERROR;
1194 }
1195
1196 /* Process Locked */
1197 __HAL_LOCK(hspi);
1198
1199 /* Configure communication */
1200 hspi->State = HAL_SPI_STATE_BUSY_RX;
1201 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1202
1203 hspi->pRxBuffPtr = pData;
1204 hspi->RxXferSize = Size;
1205 hspi->RxXferCount = Size;
1206
1207 /*Init field not used in handle to zero */
1208 hspi->RxISR = 0;
1209 hspi->TxISR = 0;
1210 hspi->pTxBuffPtr = HAL_NULL;
1211 hspi->TxXferSize = 0;
1212 hspi->TxXferCount = 0;
1213
1214 /* Configure communication direction : 1Line */
1215 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
1216 {
1217 SPI_1LINE_RX(hspi);
1218 }
1219 else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
1220 {
1221 /* Process Unlocked */
1222 __HAL_UNLOCK(hspi);
1223
1224 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
1225 return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
1226 }
1227
1228 /* Reset CRC Calculation */
1229 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1230 {
1231 SPI_RESET_CRC(hspi);
1232 }
1233
1234 /* Set the SPI RxDMA Half transfer complete callback */
1235 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
1236
1237 /* Set the SPI Rx DMA transfer complete callback */
1238 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1239
1240 /* Set the DMA error callback */
1241 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1242
1243 /* Enable the Rx DMA Channel */
1244 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
1245
1246 /* Enable Rx DMA Request */
1247 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1248
1249 /* Process Unlocked */
1250 __HAL_UNLOCK(hspi);
1251
1252 /* Check if the SPI is already enabled */
1253 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1254 {
1255 /* Enable SPI peripheral */
1256 __HAL_SPI_ENABLE(hspi);
1257 }
1258
1259 return HAL_OK;
1260 }
1261 else
1262 {
1263 return HAL_BUSY;
1264 }
1265 }
1266
1267 /**
1268 * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
1269 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1270 * the configuration information for SPI module.
1271 * @param pTxData: pointer to transmission data buffer
1272 * @param pRxData: pointer to reception data buffer
1273 * @note When the CRC feature is enabled the pRxData Length must be Size + 1
1274 * @param Size: amount of data to be sent
1275 * @retval HAL status
1276 */
1277 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
1278 {
1279 if((hspi->State == HAL_SPI_STATE_READY) || \
1280 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
1281 {
1282 if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0))
1283 {
1284 return HAL_ERROR;
1285 }
1286
1287 /* Check the parameters */
1288 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1289
1290 /* Process locked */
1291 __HAL_LOCK(hspi);
1292
1293 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
1294 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
1295 {
1296 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1297 }
1298
1299 /* Configure communication */
1300 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1301
1302 hspi->pTxBuffPtr = (uint8_t*)pTxData;
1303 hspi->TxXferSize = Size;
1304 hspi->TxXferCount = Size;
1305
1306 hspi->pRxBuffPtr = (uint8_t*)pRxData;
1307 hspi->RxXferSize = Size;
1308 hspi->RxXferCount = Size;
1309
1310 /*Init field not used in handle to zero */
1311 hspi->RxISR = 0;
1312 hspi->TxISR = 0;
1313
1314 /* Reset CRC Calculation */
1315 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1316 {
1317 SPI_RESET_CRC(hspi);
1318 }
1319
1320 /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
1321 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
1322 {
1323 /* Set the SPI Rx DMA Half transfer complete callback */
1324 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
1325
1326 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1327 }
1328 else
1329 {
1330 /* Set the SPI Tx/Rx DMA Half transfer complete callback */
1331 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
1332
1333 hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
1334 }
1335
1336 /* Set the DMA error callback */
1337 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1338
1339 /* Enable the Rx DMA Channel */
1340 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
1341
1342 /* Enable Rx DMA Request */
1343 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1344
1345 /* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing
1346 is performed in DMA reception complete callback */
1347 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
1348 {
1349 /* Set the DMA error callback */
1350 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1351 }
1352 else
1353 {
1354 hspi->hdmatx->XferErrorCallback = HAL_NULL;
1355 }
1356
1357 /* Enable the Tx DMA Channel */
1358 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
1359
1360 /* Check if the SPI is already enabled */
1361 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
1362 {
1363 /* Enable SPI peripheral */
1364 __HAL_SPI_ENABLE(hspi);
1365 }
1366
1367 /* Enable Tx DMA Request */
1368 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1369
1370 /* Process Unlocked */
1371 __HAL_UNLOCK(hspi);
1372
1373 return HAL_OK;
1374 }
1375 else
1376 {
1377 return HAL_BUSY;
1378 }
1379 }
1380
1381
1382 /**
1383 * @brief Pauses the DMA Transfer.
1384 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1385 * the configuration information for the specified SPI module.
1386 * @retval HAL status
1387 */
1388 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
1389 {
1390 /* Process Locked */
1391 __HAL_LOCK(hspi);
1392
1393 /* Disable the SPI DMA Tx & Rx requests */
1394 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1395 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1396
1397 /* Process Unlocked */
1398 __HAL_UNLOCK(hspi);
1399
1400 return HAL_OK;
1401 }
1402
1403 /**
1404 * @brief Resumes the DMA Transfer.
1405 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1406 * the configuration information for the specified SPI module.
1407 * @retval HAL status
1408 */
1409 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
1410 {
1411 /* Process Locked */
1412 __HAL_LOCK(hspi);
1413
1414 /* Enable the SPI DMA Tx & Rx requests */
1415 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1416 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1417
1418 /* Process Unlocked */
1419 __HAL_UNLOCK(hspi);
1420
1421 return HAL_OK;
1422 }
1423
1424 /**
1425 * @brief Stops the DMA Transfer.
1426 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1427 * the configuration information for the specified UART module.
1428 * @retval HAL status
1429 */
1430 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
1431 {
1432 /* The Lock is not implemented on this API to allow the user application
1433 to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
1434 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
1435 and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
1436 */
1437
1438 /* Abort the SPI DMA tx Channel */
1439 if(hspi->hdmatx != HAL_NULL)
1440 {
1441 HAL_DMA_Abort(hspi->hdmatx);
1442 }
1443 /* Abort the SPI DMA rx Channel */
1444 if(hspi->hdmarx != HAL_NULL)
1445 {
1446 HAL_DMA_Abort(hspi->hdmarx);
1447 }
1448
1449 /* Disable the SPI DMA Tx & Rx requests */
1450 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1451 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1452
1453 hspi->State = HAL_SPI_STATE_READY;
1454
1455 return HAL_OK;
1456 }
1457
1458 /**
1459 * @brief This function handles SPI interrupt request.
1460 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1461 * the configuration information for SPI module.
1462 * @retval HAL status
1463 */
1464 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
1465 {
1466 /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
1467 if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
1468 {
1469 hspi->RxISR(hspi);
1470 return;
1471 }
1472
1473 /* SPI in mode Tramitter ---------------------------------------------------*/
1474 if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
1475 {
1476 hspi->TxISR(hspi);
1477 return;
1478 }
1479
1480 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
1481 {
1482 /* SPI CRC error interrupt occurred ---------------------------------------*/
1483 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1484 {
1485 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
1486 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
1487 }
1488 /* SPI Mode Fault error interrupt occurred --------------------------------*/
1489 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
1490 {
1491 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
1492 __HAL_SPI_CLEAR_MODFFLAG(hspi);
1493 }
1494
1495 /* SPI Overrun error interrupt occurred -----------------------------------*/
1496 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
1497 {
1498 if(hspi->State != HAL_SPI_STATE_BUSY_TX)
1499 {
1500 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
1501 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1502 }
1503 }
1504
1505 /* SPI Frame error interrupt occurred -------------------------------------*/
1506 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
1507 {
1508 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
1509 __HAL_SPI_CLEAR_FREFLAG(hspi);
1510 }
1511
1512 /* Call the Error call Back in case of Errors */
1513 if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
1514 {
1515 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
1516 hspi->State = HAL_SPI_STATE_READY;
1517 HAL_SPI_ErrorCallback(hspi);
1518 }
1519 }
1520 }
1521
1522 /**
1523 * @brief Tx Transfer completed callbacks
1524 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1525 * the configuration information for SPI module.
1526 * @retval None
1527 */
1528 __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
1529 {
1530 /* NOTE : This function Should not be modified, when the callback is needed,
1531 the HAL_SPI_TxCpltCallback could be implenetd in the user file
1532 */
1533 }
1534
1535 /**
1536 * @brief Rx Transfer completed callbacks
1537 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1538 * the configuration information for SPI module.
1539 * @retval None
1540 */
1541 __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
1542 {
1543 /* NOTE : This function Should not be modified, when the callback is needed,
1544 the HAL_SPI_RxCpltCallback() could be implenetd in the user file
1545 */
1546 }
1547
1548 /**
1549 * @brief Tx and Rx Transfer completed callbacks
1550 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1551 * the configuration information for SPI module.
1552 * @retval None
1553 */
1554 __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
1555 {
1556 /* NOTE : This function Should not be modified, when the callback is needed,
1557 the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
1558 */
1559 }
1560
1561 /**
1562 * @brief Tx Half Transfer completed callbacks
1563 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1564 * the configuration information for SPI module.
1565 * @retval None
1566 */
1567 __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1568 {
1569 /* NOTE : This function Should not be modified, when the callback is needed,
1570 the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
1571 */
1572 }
1573
1574 /**
1575 * @brief Rx Half Transfer completed callbacks
1576 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1577 * the configuration information for SPI module.
1578 * @retval None
1579 */
1580 __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1581 {
1582 /* NOTE : This function Should not be modified, when the callback is needed,
1583 the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
1584 */
1585 }
1586
1587 /**
1588 * @brief Tx and Rx Transfer completed callbacks
1589 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1590 * the configuration information for SPI module.
1591 * @retval None
1592 */
1593 __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1594 {
1595 /* NOTE : This function Should not be modified, when the callback is needed,
1596 the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
1597 */
1598 }
1599
1600 /**
1601 * @brief SPI error callbacks
1602 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1603 * the configuration information for SPI module.
1604 * @retval None
1605 */
1606 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
1607 {
1608 /* NOTE : - This function Should not be modified, when the callback is needed,
1609 the HAL_SPI_ErrorCallback() could be implenetd in the user file.
1610 - The ErrorCode parameter in the hspi handle is updated by the SPI processes
1611 and user can use HAL_SPI_GetError() API to check the latest error occurred.
1612 */
1613 }
1614
1615 /**
1616 * @}
1617 */
1618
1619 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
1620 * @brief SPI control functions
1621 *
1622 @verbatim
1623 ===============================================================================
1624 ##### Peripheral State and Errors functions #####
1625 ===============================================================================
1626 [..]
1627 This subsection provides a set of functions allowing to control the SPI.
1628 (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
1629 (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
1630 @endverbatim
1631 * @{
1632 */
1633
1634 /**
1635 * @brief Return the SPI state
1636 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1637 * the configuration information for SPI module.
1638 * @retval HAL state
1639 */
1640 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
1641 {
1642 return hspi->State;
1643 }
1644
1645 /**
1646 * @brief Return the SPI error code
1647 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1648 * the configuration information for SPI module.
1649 * @retval SPI Error Code
1650 */
1651 HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
1652 {
1653 return hspi->ErrorCode;
1654 }
1655
1656 /**
1657 * @}
1658 */
1659
1660 /**
1661 * @}
1662 */
1663
1664
1665
1666 /** @addtogroup SPI_Private_Functions
1667 * @{
1668 */
1669
1670
1671 /**
1672 * @brief Interrupt Handler to close Tx transfer
1673 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1674 * the configuration information for SPI module.
1675 * @retval void
1676 */
1677 static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
1678 {
1679 /* Wait until TXE flag is set to send data */
1680 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
1681 {
1682 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1683 }
1684
1685 /* Disable TXE interrupt */
1686 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
1687
1688 /* Disable ERR interrupt if Receive process is finished */
1689 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
1690 {
1691 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
1692
1693 /* Wait until Busy flag is reset before disabling SPI */
1694 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
1695 {
1696 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1697 }
1698
1699 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
1700 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
1701 {
1702 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1703 }
1704
1705 /* Check if Errors has been detected during transfer */
1706 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1707 {
1708 /* Check if we are in Tx or in Rx/Tx Mode */
1709 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
1710 {
1711 /* Set state to READY before run the Callback Complete */
1712 hspi->State = HAL_SPI_STATE_READY;
1713 HAL_SPI_TxRxCpltCallback(hspi);
1714 }
1715 else
1716 {
1717 /* Set state to READY before run the Callback Complete */
1718 hspi->State = HAL_SPI_STATE_READY;
1719 HAL_SPI_TxCpltCallback(hspi);
1720 }
1721 }
1722 else
1723 {
1724 /* Set state to READY before run the Callback Complete */
1725 hspi->State = HAL_SPI_STATE_READY;
1726 /* Call Error call back in case of Error */
1727 HAL_SPI_ErrorCallback(hspi);
1728 }
1729 }
1730 }
1731
1732 /**
1733 * @brief Interrupt Handler to transmit amount of data in no-blocking mode
1734 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1735 * the configuration information for SPI module.
1736 * @retval void
1737 */
1738 static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi)
1739 {
1740 /* Transmit data in 8 Bit mode */
1741 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
1742 {
1743 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
1744 }
1745 /* Transmit data in 16 Bit mode */
1746 else
1747 {
1748 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
1749 hspi->pTxBuffPtr+=2;
1750 }
1751 hspi->TxXferCount--;
1752
1753 if(hspi->TxXferCount == 0)
1754 {
1755 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1756 {
1757 /* calculate and transfer CRC on Tx line */
1758 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
1759 }
1760 SPI_TxCloseIRQHandler(hspi);
1761 }
1762 }
1763
1764 /**
1765 * @brief Interrupt Handler to close Rx transfer
1766 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1767 * the configuration information for SPI module.
1768 * @retval void
1769 */
1770 static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
1771 {
1772 __IO uint16_t tmpreg = 0;
1773
1774 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1775 {
1776 /* Wait until RXNE flag is set to send data */
1777 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
1778 {
1779 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1780 }
1781
1782 /* Read CRC to reset RXNE flag */
1783 tmpreg = hspi->Instance->DR;
1784
1785 /* Wait until RXNE flag is set to send data */
1786 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
1787 {
1788 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1789 }
1790
1791 /* Check if CRC error occurred */
1792 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
1793 {
1794 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
1795
1796 /* Reset CRC Calculation */
1797 SPI_RESET_CRC(hspi);
1798 }
1799 }
1800
1801 /* Disable RXNE interrupt */
1802 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
1803
1804 /* if Transmit process is finished */
1805 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
1806 {
1807 /* Disable ERR interrupt */
1808 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
1809
1810 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
1811 {
1812 /* Disable SPI peripheral */
1813 __HAL_SPI_DISABLE(hspi);
1814 }
1815
1816 /* Check if Errors has been detected during transfer */
1817 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
1818 {
1819 /* Check if we are in Rx or in Rx/Tx Mode */
1820 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
1821 {
1822 /* Set state to READY before run the Callback Complete */
1823 hspi->State = HAL_SPI_STATE_READY;
1824 HAL_SPI_TxRxCpltCallback(hspi);
1825 }
1826 else
1827 {
1828 /* Set state to READY before run the Callback Complete */
1829 hspi->State = HAL_SPI_STATE_READY;
1830 HAL_SPI_RxCpltCallback(hspi);
1831 }
1832 }
1833 else
1834 {
1835 /* Set state to READY before run the Callback Complete */
1836 hspi->State = HAL_SPI_STATE_READY;
1837 /* Call Error call back in case of Error */
1838 HAL_SPI_ErrorCallback(hspi);
1839 }
1840 }
1841 }
1842
1843 /**
1844 * @brief Interrupt Handler to receive amount of data in 2Lines mode
1845 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1846 * the configuration information for SPI module.
1847 * @retval void
1848 */
1849 static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi)
1850 {
1851 /* Receive data in 8 Bit mode */
1852 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
1853 {
1854 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
1855 }
1856 /* Receive data in 16 Bit mode */
1857 else
1858 {
1859 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
1860 hspi->pRxBuffPtr+=2;
1861 }
1862 hspi->RxXferCount--;
1863
1864 if(hspi->RxXferCount==0)
1865 {
1866 SPI_RxCloseIRQHandler(hspi);
1867 }
1868 }
1869
1870 /**
1871 * @brief Interrupt Handler to receive amount of data in no-blocking mode
1872 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1873 * the configuration information for SPI module.
1874 * @retval void
1875 */
1876 static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi)
1877 {
1878 /* Receive data in 8 Bit mode */
1879 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
1880 {
1881 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
1882 }
1883 /* Receive data in 16 Bit mode */
1884 else
1885 {
1886 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
1887 hspi->pRxBuffPtr+=2;
1888 }
1889 hspi->RxXferCount--;
1890
1891 /* Enable CRC Transmission */
1892 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
1893 {
1894 /* Set CRC Next to calculate CRC on Rx side */
1895 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
1896 }
1897
1898 if(hspi->RxXferCount == 0)
1899 {
1900 SPI_RxCloseIRQHandler(hspi);
1901 }
1902 }
1903
1904 /**
1905 * @brief DMA SPI transmit process complete callback
1906 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1907 * the configuration information for the specified DMA module.
1908 * @retval None
1909 */
1910 static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma)
1911 {
1912 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1913
1914 /* DMA Normal Mode */
1915 if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
1916 {
1917 /* Wait until TXE flag is set to send data */
1918 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
1919 {
1920 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1921 }
1922
1923 /* Disable Tx DMA Request */
1924 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1925
1926 /* Wait until Busy flag is reset before disabling SPI */
1927 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
1928 {
1929 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1930 }
1931
1932 hspi->TxXferCount = 0;
1933 hspi->State = HAL_SPI_STATE_READY;
1934 }
1935
1936 /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
1937 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
1938 {
1939 __HAL_SPI_CLEAR_OVRFLAG(hspi);
1940 }
1941
1942 /* Check if Errors has been detected during transfer */
1943 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
1944 {
1945 HAL_SPI_ErrorCallback(hspi);
1946 }
1947 else
1948 {
1949 HAL_SPI_TxCpltCallback(hspi);
1950 }
1951 }
1952
1953 /**
1954 * @brief DMA SPI receive process complete callback
1955 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
1956 * the configuration information for the specified DMA module.
1957 * @retval None
1958 */
1959 static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma)
1960 {
1961 __IO uint16_t tmpreg = 0;
1962
1963 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1964
1965 /* DMA Normal mode */
1966 if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
1967 {
1968 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
1969 {
1970 /* Disable SPI peripheral */
1971 __HAL_SPI_DISABLE(hspi);
1972 }
1973
1974 /* Disable Rx DMA Request */
1975 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1976
1977 /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
1978 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1979
1980 /* Reset CRC Calculation */
1981 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
1982 {
1983 /* Wait until RXNE flag is set to send data */
1984 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
1985 {
1986 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1987 }
1988
1989 /* Read CRC */
1990 tmpreg = hspi->Instance->DR;
1991
1992 /* Wait until RXNE flag is set */
1993 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
1994 {
1995 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1996 }
1997
1998 /* Check if CRC error occurred */
1999 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
2000 {
2001 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
2002 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
2003 }
2004 }
2005
2006 hspi->RxXferCount = 0;
2007 hspi->State = HAL_SPI_STATE_READY;
2008
2009 /* Check if Errors has been detected during transfer */
2010 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
2011 {
2012 HAL_SPI_ErrorCallback(hspi);
2013 }
2014 else
2015 {
2016 HAL_SPI_RxCpltCallback(hspi);
2017 }
2018 }
2019 else
2020 {
2021 HAL_SPI_RxCpltCallback(hspi);
2022 }
2023 }
2024
2025 /**
2026 * @brief DMA SPI transmit receive process complete callback
2027 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2028 * the configuration information for the specified DMA module.
2029 * @retval None
2030 */
2031 static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
2032 {
2033 __IO uint16_t tmpreg = 0;
2034
2035 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2036
2037 if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
2038 {
2039 /* Reset CRC Calculation */
2040 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2041 {
2042 /* Check if CRC is done on going (RXNE flag set) */
2043 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
2044 {
2045 /* Wait until RXNE flag is set to send data */
2046 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
2047 {
2048 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2049 }
2050 }
2051 /* Read CRC */
2052 tmpreg = hspi->Instance->DR;
2053
2054 /* Check if CRC error occurred */
2055 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
2056 {
2057 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
2058 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
2059 }
2060 }
2061
2062 /* Wait until TXE flag is set to send data */
2063 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
2064 {
2065 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2066 }
2067
2068 /* Disable Tx DMA Request */
2069 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
2070
2071 /* Wait until Busy flag is reset before disabling SPI */
2072 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
2073 {
2074 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2075 }
2076
2077 /* Disable Rx DMA Request */
2078 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
2079
2080 hspi->TxXferCount = 0;
2081 hspi->RxXferCount = 0;
2082
2083 hspi->State = HAL_SPI_STATE_READY;
2084
2085 /* Check if Errors has been detected during transfer */
2086 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
2087 {
2088 HAL_SPI_ErrorCallback(hspi);
2089 }
2090 else
2091 {
2092 HAL_SPI_TxRxCpltCallback(hspi);
2093 }
2094 }
2095 else
2096 {
2097 HAL_SPI_TxRxCpltCallback(hspi);
2098 }
2099 }
2100
2101 /**
2102 * @brief DMA SPI half transmit process complete callback
2103 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2104 * the configuration information for the specified DMA module.
2105 * @retval None
2106 */
2107 static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma)
2108 {
2109 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2110
2111 HAL_SPI_TxHalfCpltCallback(hspi);
2112 }
2113
2114 /**
2115 * @brief DMA SPI half receive process complete callback
2116 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2117 * the configuration information for the specified DMA module.
2118 * @retval None
2119 */
2120 static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma)
2121 {
2122 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2123
2124 HAL_SPI_RxHalfCpltCallback(hspi);
2125 }
2126
2127 /**
2128 * @brief DMA SPI Half transmit receive process complete callback
2129 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2130 * the configuration information for the specified DMA module.
2131 * @retval None
2132 */
2133 static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
2134 {
2135 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2136
2137 HAL_SPI_TxRxHalfCpltCallback(hspi);
2138 }
2139
2140 /**
2141 * @brief DMA SPI communication error callback
2142 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2143 * the configuration information for the specified DMA module.
2144 * @retval None
2145 */
2146 static void SPI_DMAError(DMA_HandleTypeDef *hdma)
2147 {
2148 SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2149 hspi->TxXferCount = 0;
2150 hspi->RxXferCount = 0;
2151 hspi->State= HAL_SPI_STATE_READY;
2152 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
2153 HAL_SPI_ErrorCallback(hspi);
2154 }
2155
2156 /**
2157 * @brief This function handles SPI Communication Timeout.
2158 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2159 * the configuration information for SPI module.
2160 * @param Flag: SPI flag to check
2161 * @param Status: Flag status to check: RESET or set
2162 * @param Timeout: Timeout duration
2163 * @retval HAL status
2164 */
2165 static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
2166 {
2167 uint32_t tickstart = 0;
2168
2169 /* Get tick */
2170 tickstart = HAL_GetTick();
2171
2172 /* Wait until flag is set */
2173 if(Status == RESET)
2174 {
2175 while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
2176 {
2177 if(Timeout != HAL_MAX_DELAY)
2178 {
2179 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
2180 {
2181 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2182 on both master and slave sides in order to resynchronize the master
2183 and slave for their respective CRC calculation */
2184
2185 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2186 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2187
2188 /* Disable SPI peripheral */
2189 __HAL_SPI_DISABLE(hspi);
2190
2191 /* Reset CRC Calculation */
2192 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2193 {
2194 SPI_RESET_CRC(hspi);
2195 }
2196
2197 hspi->State= HAL_SPI_STATE_READY;
2198
2199 /* Process Unlocked */
2200 __HAL_UNLOCK(hspi);
2201
2202 return HAL_TIMEOUT;
2203 }
2204 }
2205 }
2206 }
2207 else
2208 {
2209 while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
2210 {
2211 if(Timeout != HAL_MAX_DELAY)
2212 {
2213 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
2214 {
2215 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2216 on both master and slave sides in order to resynchronize the master
2217 and slave for their respective CRC calculation */
2218
2219 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2220 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2221
2222 /* Disable SPI peripheral */
2223 __HAL_SPI_DISABLE(hspi);
2224
2225 /* Reset CRC Calculation */
2226 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
2227 {
2228 SPI_RESET_CRC(hspi);
2229 }
2230
2231 hspi->State= HAL_SPI_STATE_READY;
2232
2233 /* Process Unlocked */
2234 __HAL_UNLOCK(hspi);
2235
2236 return HAL_TIMEOUT;
2237 }
2238 }
2239 }
2240 }
2241 return HAL_OK;
2242 }
2243 /**
2244 * @}
2245 */
2246
2247 #endif /* HAL_SPI_MODULE_ENABLED */
2248 /**
2249 * @}
2250 */
2251
2252 /**
2253 * @}
2254 */
2255
2256 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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