tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_ll_sdmmc.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l1xx_ll_sdmmc.c
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    5-September-2014
   7   * @brief   SDMMC Low Layer HAL module driver.
   8   *
   9   *          This file provides firmware functions to manage the following
  10   *          functionalities of the SDMMC peripheral:
  11   *           + Initialization/de-initialization functions
  12   *           + I/O operation functions
  13   *           + Peripheral Control functions
  14   *           + Peripheral State functions
  15   *
  16   @verbatim
  17   ==============================================================================
  18                        ##### SDMMC peripheral features #####
  19   ==============================================================================
  20     [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2
  21          peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA
  22          devices.
  23
  24     [..] The MultiMedia Card system specifications are available through the MultiMedia Card
  25          Association website at www.mmca.org, published by the MMCA technical committee.
  26          SD memory card and SD I/O card system specifications are available through the SD card
  27          Association website at www.sdcard.org.
  28          CE-ATA system specifications are available through the CE-ATA work group web site at
  29          www.ce-ata.org.
  30
  31     [..] The SDIO features include the following:
  32          (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  33              for three different databus modes: 1-bit (default), 4-bit and 8-bit
  34          (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  35          (+) Full compliance with SD Memory Card Specifications Version 2.0
  36          (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  37              different data bus modes: 1-bit (default) and 4-bit
  38          (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  39              Rev1.1)
  40          (+) Data transfer up to 48 MHz for the 8 bit mode
  41          (+) Data and command output enable signals to control external bidirectional drivers.
  42
  43
  44                            ##### How to use this driver #####
  45   ==============================================================================
  46     [..]
  47       This driver is a considered as a driver of service for external devices drivers
  48       that interfaces with the SDIO peripheral.
  49       According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs
  50       is used in the device's driver to perform SDIO operations and functionalities.
  51
  52       This driver is almost transparent for the final user, it is only used to implement other
  53       functionalities of the external device.
  54
  55     [..]
  56       (+) The SDIO clock (SDIOCLK = 48 MHz) is coming from the PLL. Before start working with SDIO peripheral make sure that the
  57           PLL is well configured.
  58           The SDIO peripheral uses two clock signals:
  59           (++) SDIO adapter clock (SDIOCLK = 48 MHz)
  60           (++) APB2 bus clock (PCLK2)
  61
  62           -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition:
  63                Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK))
  64
  65       (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO
  66           peripheral.
  67
  68       (+) Enable the Power ON State using the SDIO_PowerState_ON(hsdio)
  69           function and disable it using the function SDIO_PowerState_OFF(hsdio).
  70
  71       (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
  72
  73       (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
  74           and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
  75
  76       (+) When using the DMA mode
  77           (++) Configure the DMA in the MSP layer of the external device
  78           (++) Active the needed channel Request
  79           (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
  80                __SDIO_DMA_DISABLE().
  81
  82       (+) To control the CPSM (Command Path State Machine) and send
  83           commands to the card use the SDIO_SendCommand(),
  84           SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
  85           to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
  86           to the selected command to be sent.
  87           The parameters that should be filled are:
  88            (++) Command Argument
  89            (++) Command Index
  90            (++) Command Response type
  91            (++) Command Wait
  92            (++) CPSM Status (Enable or Disable).
  93
  94           -@@- To check if the command is well received, read the SDIO_CMDRESP
  95               register using the SDIO_GetCommandResponse().
  96               The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the
  97               SDIO_GetResponse() function.
  98
  99       (+) To control the DPSM (Data Path State Machine) and send/receive
 100            data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
 101           SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
 102
 103     *** Read Operations ***
 104     =======================
 105     [..]
 106       (#) First, user has to fill the data structure (pointer to
 107           SDIO_DataInitTypeDef) according to the selected data type to be received.
 108           The parameters that should be filled are:
 109            (++) Data TimeOut
 110            (++) Data Length
 111            (++) Data Block size
 112            (++) Data Transfer direction: should be from card (To SDIO)
 113            (++) Data Transfer mode
 114            (++) DPSM Status (Enable or Disable)
 115
 116       (#) Configure the SDIO resources to receive the data from the card
 117           according to selected transfer mode.
 118
 119       (#) Send the selected Read command.
 120
 121       (#) Use the SDIO flags/interrupts to check the transfer status.
 122
 123     *** Write Operations ***
 124     ========================
 125     [..]
 126      (#) First, user has to fill the data structure (pointer to
 127          SDIO_DataInitTypeDef) according to the selected data type to be received.
 128          The parameters that should be filled are:
 129           (++) Data TimeOut
 130           (++) Data Length
 131           (++) Data Block size
 132           (++) Data Transfer direction:  should be to card (To CARD)
 133           (++) Data Transfer mode
 134           (++) DPSM Status (Enable or Disable)
 135
 136      (#) Configure the SDIO resources to send the data to the card according to
 137          selected transfer mode.
 138
 139      (#) Send the selected Write command.
 140
 141      (#) Use the SDIO flags/interrupts to check the transfer status.
 142
 143   @endverbatim
 144   ******************************************************************************
 145   * @attention
 146   *
 147   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
 148   *
 149   * Redistribution and use in source and binary forms, with or without modification,
 150   * are permitted provided that the following conditions are met:
 151   *   1. Redistributions of source code must retain the above copyright notice,
 152   *      this list of conditions and the following disclaimer.
 153   *   2. Redistributions in binary form must reproduce the above copyright notice,
 154   *      this list of conditions and the following disclaimer in the documentation
 155   *      and/or other materials provided with the distribution.
 156   *   3. Neither the name of STMicroelectronics nor the names of its contributors
 157   *      may be used to endorse or promote products derived from this software
 158   *      without specific prior written permission.
 159   *
 160   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 161   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 162   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 163   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 164   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 165   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 166   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 167   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 168   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 169   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 170   *
 171   ******************************************************************************
 172   */
 173
 174 /* Includes ------------------------------------------------------------------*/
 175 #include "stm32l1xx_hal.h"
 176
 177 /** @addtogroup STM32L1xx_HAL_Driver
 178   * @{
 179   */
 180
 181 /** @defgroup SDMMC_LL SDMMC_LL
 182   * @brief Low layer module for SD and MMC driver
 183   * @{
 184   */
 185
 186 #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
 187
 188 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
 189
 190 /* Private typedef -----------------------------------------------------------*/
 191 /* Private define ------------------------------------------------------------*/
 192 /* Private macro -------------------------------------------------------------*/
 193 /* Private variables ---------------------------------------------------------*/
 194 /* Private function prototypes -----------------------------------------------*/
 195 /* Private functions ---------------------------------------------------------*/
 196
 197 /** @defgroup SDMMC_LL_Exported_Functions SDMMC_LL Exported Functions
 198   * @{
 199   */
 200
 201 /** @defgroup HAL_SDMMC_LL_Group1 Initialization/de-initialization functions
 202  *  @brief    Initialization and Configuration functions
 203  *
 204 @verbatim
 205  ===============================================================================
 206               ##### Initialization/de-initialization functions #####
 207  ===============================================================================
 208     [..]  This section provides functions allowing to:
 209
 210 @endverbatim
 211   * @{
 212   */
 213
 214 /**
 215   * @brief  Initializes the SDIO according to the specified
 216   *         parameters in the SDIO_InitTypeDef and create the associated handle.
 217   * @param  SDIOx: Pointer to SDIO register base
 218   * @param  Init: SDIO initialization structure
 219   * @retval HAL status
 220   */
 221 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
 222 {
 223   uint32_t tmpreg = 0;
 224
 225   /* Check the parameters */
 226   assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
 227   assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
 228   assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
 229   assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
 230   assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
 231   assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
 232   assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
 233
 234   /* Set SDIO configuration parameters */
 235   tmpreg |= (Init.ClockEdge           |\
 236              Init.ClockBypass         |\
 237              Init.ClockPowerSave      |\
 238              Init.BusWide             |\
 239              Init.HardwareFlowControl |\
 240              Init.ClockDiv
 241              );
 242
 243   /* Write to SDIO CLKCR */
 244   MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
 245
 246   return HAL_OK;
 247 }
 248
 249
 250
 251 /**
 252   * @}
 253   */
 254
 255 /** @defgroup HAL_SDMMC_LL_Group2 I/O operation functions
 256  *  @brief   Data transfers functions
 257  *
 258 @verbatim
 259  ===============================================================================
 260                       ##### I/O operation functions #####
 261  ===============================================================================
 262     [..]
 263     This subsection provides a set of functions allowing to manage the SDIO data
 264     transfers.
 265
 266 @endverbatim
 267   * @{
 268   */
 269
 270 /**
 271   * @brief  Read data (word) from Rx FIFO in blocking mode (polling)
 272   * @param  SDIOx: Pointer to SDIO register base
 273   * @retval HAL status
 274   */
 275 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
 276 {
 277   /* Read data from Rx FIFO */
 278   return (SDIOx->FIFO);
 279 }
 280
 281 /**
 282   * @brief  Write data (word) to Tx FIFO in blocking mode (polling)
 283   * @param  SDIOx: Pointer to SDIO register base
 284   * @param  pWriteData: pointer to data to write
 285   * @retval HAL status
 286   */
 287 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
 288 {
 289   /* Write data to FIFO */
 290   SDIOx->FIFO = *pWriteData;
 291
 292   return HAL_OK;
 293 }
 294
 295 /**
 296   * @}
 297   */
 298
 299 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
 300  *  @brief   management functions
 301  *
 302 @verbatim
 303  ===============================================================================
 304                       ##### Peripheral Control functions #####
 305  ===============================================================================
 306     [..]
 307     This subsection provides a set of functions allowing to control the SDIO data
 308     transfers.
 309
 310 @endverbatim
 311   * @{
 312   */
 313
 314 /**
 315   * @brief  Set SDIO Power state to ON.
 316   * @param  SDIOx: Pointer to SDIO register base
 317   * @retval HAL status
 318   */
 319 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
 320 {
 321   /* Set power state to ON */
 322   SDIOx->POWER = SDIO_POWER_PWRCTRL;
 323
 324   return HAL_OK;
 325 }
 326
 327 /**
 328   * @brief  Set SDIO Power state to OFF.
 329   * @param  SDIOx: Pointer to SDIO register base
 330   * @retval HAL status
 331   */
 332 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
 333 {
 334   /* Set power state to OFF */
 335   SDIOx->POWER = (uint32_t)0x00000000;
 336
 337   return HAL_OK;
 338 }
 339
 340 /**
 341   * @brief  Get SDIO Power state.
 342   * @param  SDIOx: Pointer to SDIO register base
 343   * @retval Power status of the controller. The returned value can be one of the
 344   *         following values:
 345   *            - 0x00: Power OFF
 346   *            - 0x02: Power UP
 347   *            - 0x03: Power ON
 348   */
 349 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
 350 {
 351   return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
 352 }
 353
 354 /**
 355   * @brief  Configure the SDIO command path according to the specified parameters in
 356   *         SDIO_CmdInitTypeDef structure and send the command
 357   * @param  SDIOx: Pointer to SDIO register base
 358   * @param  SDIO_CmdInitStruct: pointer to a SDIO_CmdInitTypeDef structure that contains
 359   *         the configuration information for the SDIO command
 360   * @retval HAL status
 361   */
 362 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
 363 {
 364   uint32_t tmpreg = 0;
 365
 366   /* Check the parameters */
 367   assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->CmdIndex));
 368   assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->Response));
 369   assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->WaitForInterrupt));
 370   assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->CPSM));
 371
 372   /* Set the SDIO Argument value */
 373   SDIOx->ARG = SDIO_CmdInitStruct->Argument;
 374
 375   /* Set SDIO command parameters */
 376   tmpreg |= (uint32_t)(SDIO_CmdInitStruct->CmdIndex         |\
 377                        SDIO_CmdInitStruct->Response         |\
 378                        SDIO_CmdInitStruct->WaitForInterrupt |\
 379                        SDIO_CmdInitStruct->CPSM);
 380
 381   /* Write to SDIO CMD register */
 382   MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
 383
 384   return HAL_OK;
 385 }
 386
 387 /**
 388   * @brief  Return the command index of last command for which response received
 389   * @param  SDIOx: Pointer to SDIO register base
 390   * @retval Command index of the last command response received
 391   */
 392 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
 393 {
 394   return (uint8_t)(SDIOx->RESPCMD);
 395 }
 396
 397
 398 /**
 399   * @brief  Return the response received from the card for the last command
 400   * @param  SDIO_RESP: Specifies the SDIO response register.
 401   *          This parameter can be one of the following values:
 402   *            @arg SDIO_RESP1: Response Register 1
 403   *            @arg SDIO_RESP2: Response Register 2
 404   *            @arg SDIO_RESP3: Response Register 3
 405   *            @arg SDIO_RESP4: Response Register 4
 406   * @retval The Corresponding response register value
 407   */
 408 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
 409 {
 410   __IO uint32_t tmp = 0;
 411
 412   /* Check the parameters */
 413   assert_param(IS_SDIO_RESP(SDIO_RESP));
 414
 415   /* Get the response */
 416   tmp = SDIO_RESP_ADDR + SDIO_RESP;
 417
 418   return (*(__IO uint32_t *) tmp);
 419 }
 420
 421 /**
 422   * @brief  Configure the SDIO data path according to the specified
 423   *         parameters in the SDIO_DataInitTypeDef.
 424   * @param  SDIOx: Pointer to SDIO register base
 425   * @param  SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure
 426   *         that contains the configuration information for the SDIO command.
 427   * @retval HAL status
 428   */
 429 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct)
 430 {
 431   uint32_t tmpreg = 0;
 432
 433   /* Check the parameters */
 434   assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->DataLength));
 435   assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->DataBlockSize));
 436   assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->TransferDir));
 437   assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->TransferMode));
 438   assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->DPSM));
 439
 440   /* Set the SDIO Data TimeOut value */
 441   SDIOx->DTIMER = SDIO_DataInitStruct->DataTimeOut;
 442
 443   /* Set the SDIO DataLength value */
 444   SDIOx->DLEN = SDIO_DataInitStruct->DataLength;
 445
 446   /* Set the SDIO data configuration parameters */
 447   tmpreg |= (uint32_t)(SDIO_DataInitStruct->DataBlockSize |\
 448                        SDIO_DataInitStruct->TransferDir   |\
 449                        SDIO_DataInitStruct->TransferMode  |\
 450                        SDIO_DataInitStruct->DPSM);
 451
 452   /* Write to SDIO DCTRL */
 453   MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
 454
 455   return HAL_OK;
 456
 457 }
 458
 459 /**
 460   * @brief  Returns number of remaining data bytes to be transferred.
 461   * @param  SDIOx: Pointer to SDIO register base
 462   * @retval Number of remaining data bytes to be transferred
 463   */
 464 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
 465 {
 466   return (SDIOx->DCOUNT);
 467 }
 468
 469 /**
 470   * @brief  Get the FIFO data
 471   * @param  SDIOx: Pointer to SDIO register base
 472   * @retval Data received
 473   */
 474 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
 475 {
 476   return (SDIOx->FIFO);
 477 }
 478
 479
 480 /**
 481   * @brief  Sets one of the two options of inserting read wait interval.
 482   * @param  SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
 483   *          This parameter can be:
 484   *            @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK
 485   *            @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2
 486   * @retval None
 487   */
 488 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
 489 {
 490   /* Check the parameters */
 491   assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
 492
 493   *(__IO uint32_t *)DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
 494
 495   return HAL_OK;
 496 }
 497
 498
 499 /**
 500   * @}
 501   */
 502
 503 /**
 504   * @}
 505   */
 506
 507 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
 508
 509 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
 510
 511 /**
 512   * @}
 513   */
 514
 515 /**
 516   * @}
 517   */
 518
 519 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/