]> git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/serial_api.c
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_Freescale / TARGET_K20XX / serial_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2015 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include "mbed_assert.h"
17 #include "serial_api.h"
18
19 #include <string.h>
20
21 #include "cmsis.h"
22 #include "pinmap.h"
23 #include "clk_freqs.h"
24 #include "PeripheralPins.h"
25
26 #define UART_NUM 3
27
28 static uint32_t serial_irq_ids[UART_NUM] = {0};
29 static uart_irq_handler irq_handler;
30
31 int stdio_uart_inited = 0;
32 serial_t stdio_uart;
33
34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
35 // determine the UART to use
36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
39 MBED_ASSERT((int)uart != NC);
40
41 obj->uart = (UART_Type *)uart;
42 // enable clk
43 switch (uart) {
44 case UART_0:
45 mcgpllfll_frequency();
46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
47 break;
48 case UART_1:
49 mcgpllfll_frequency();
50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
51 break;
52 case UART_2:
53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
54 break;
55 }
56 // Disable UART before changing registers
57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
58
59 switch (uart) {
60 case UART_0:
61 obj->index = 0;
62 break;
63 case UART_1:
64 obj->index = 1;
65 break;
66 case UART_2:
67 obj->index = 2;
68 break;
69 }
70
71 // set default baud rate and format
72 serial_baud (obj, 9600);
73 serial_format(obj, 8, ParityNone, 1);
74
75 // pinout the chosen uart
76 pinmap_pinout(tx, PinMap_UART_TX);
77 pinmap_pinout(rx, PinMap_UART_RX);
78
79 // set rx/tx pins in PullUp mode
80 if (tx != NC) {
81 pin_mode(tx, PullUp);
82 }
83 if (rx != NC) {
84 pin_mode(rx, PullUp);
85 }
86
87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
88
89 if (uart == STDIO_UART) {
90 stdio_uart_inited = 1;
91 memcpy(&stdio_uart, obj, sizeof(serial_t));
92 }
93 }
94
95 void serial_free(serial_t *obj) {
96 serial_irq_ids[obj->index] = 0;
97 }
98
99 void serial_baud(serial_t *obj, int baudrate) {
100 // save C2 state
101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
102
103 // Disable UART before changing registers
104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
105
106 uint32_t PCLK;
107 if (obj->uart != UART2) {
108 PCLK = mcgpllfll_frequency();
109 }
110 else {
111 PCLK = bus_frequency();
112 }
113
114 uint16_t DL = PCLK / (16 * baudrate);
115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
116
117 // set BDH and BDL
118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
120
121 obj->uart->C4 &= ~0x1F;
122 obj->uart->C4 |= BRFA & 0x1F;
123
124 // restore C2 state
125 obj->uart->C2 |= c2_state;
126 }
127
128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
132
133 // save C2 state
134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
135
136 // Disable UART before changing registers
137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
138
139 // 8 data bits = 0 ... 9 data bits = 1
140 data_bits -= 8;
141
142 uint32_t parity_enable, parity_select;
143 switch (parity) {
144 case ParityNone:
145 parity_enable = 0;
146 parity_select = 0;
147 break;
148 case ParityOdd :
149 parity_enable = 1;
150 parity_select = 1;
151 data_bits++;
152 break;
153 case ParityEven:
154 parity_enable = 1;
155 parity_select = 0;
156 data_bits++;
157 break;
158 default:
159 break;
160 }
161
162 stop_bits -= 1;
163
164 uint32_t m10 = 0;
165
166 // 9 data bits + parity - only uart0 support
167 if (data_bits == 2) {
168 MBED_ASSERT(obj->index == 0);
169 data_bits = 0;
170 m10 = 1;
171 }
172
173 // data bits, parity and parity mode
174 obj->uart->C1 = ((data_bits << 4)
175 | (parity_enable << 1)
176 | (parity_select << 0));
177
178 //enable 10bit mode if needed
179 if (obj->index == 0) {
180 obj->uart->C4 &= ~UART_C4_M10_MASK;
181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
182 }
183
184 // stop bits
185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
187
188 // restore C2 state
189 obj->uart->C2 |= c2_state;
190 }
191
192 /******************************************************************************
193 * INTERRUPTS HANDLING
194 ******************************************************************************/
195 static inline void uart_irq(uint8_t status, uint32_t index) {
196 if (serial_irq_ids[index] != 0) {
197 if (status & UART_S1_TDRE_MASK)
198 irq_handler(serial_irq_ids[index], TxIrq);
199
200 if (status & UART_S1_RDRF_MASK)
201 irq_handler(serial_irq_ids[index], RxIrq);
202 }
203 }
204
205 void uart0_irq() {uart_irq(UART0->S1, 0);}
206 void uart1_irq() {uart_irq(UART1->S1, 1);}
207 void uart2_irq() {uart_irq(UART2->S1, 2);}
208
209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
210 irq_handler = handler;
211 serial_irq_ids[obj->index] = id;
212 }
213
214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
215 IRQn_Type irq_n = (IRQn_Type)0;
216 uint32_t vector = 0;
217 switch ((int)obj->uart) {
218 case UART_0:
219 irq_n=UART0_RX_TX_IRQn;
220 vector = (uint32_t)&uart0_irq;
221 break;
222 case UART_1:
223 irq_n=UART1_RX_TX_IRQn;
224 vector = (uint32_t)&uart1_irq;
225 break;
226 case UART_2:
227 irq_n=UART2_RX_TX_IRQn;
228 vector = (uint32_t)&uart2_irq;
229 break;
230 }
231
232 if (enable) {
233 switch (irq) {
234 case RxIrq:
235 obj->uart->C2 |= (UART_C2_RIE_MASK);
236 break;
237 case TxIrq:
238 obj->uart->C2 |= (UART_C2_TIE_MASK);
239 break;
240 }
241 NVIC_SetVector(irq_n, vector);
242 NVIC_EnableIRQ(irq_n);
243
244 } else { // disable
245 int all_disabled = 0;
246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
247 switch (irq) {
248 case RxIrq:
249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
250 break;
251 case TxIrq:
252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
253 break;
254 }
255 switch (other_irq) {
256 case RxIrq:
257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
258 break;
259 case TxIrq:
260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
261 break;
262 }
263 if (all_disabled)
264 NVIC_DisableIRQ(irq_n);
265 }
266 }
267
268 int serial_getc(serial_t *obj) {
269 while (!serial_readable(obj));
270 return obj->uart->D;
271 }
272
273 void serial_putc(serial_t *obj, int c) {
274 while (!serial_writable(obj));
275 obj->uart->D = c;
276 }
277
278 int serial_readable(serial_t *obj) {
279
280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
281 }
282
283 int serial_writable(serial_t *obj) {
284
285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
286 }
287
288 void serial_clear(serial_t *obj) {
289 }
290
291 void serial_pinout_tx(PinName tx) {
292 pinmap_pinout(tx, PinMap_UART_TX);
293 }
294
295 void serial_break_set(serial_t *obj) {
296 obj->uart->C2 |= UART_C2_SBK_MASK;
297 }
298
299 void serial_break_clear(serial_t *obj) {
300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
301 }
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