tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/us_ticker.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2015 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include <stddef.h>
  17 #include "us_ticker_api.h"
  18 #include "PeripheralNames.h"
  19 #include "clk_freqs.h"
  20
  21 #define PIT_TIMER           PIT->CHANNEL[0]
  22 #define PIT_TIMER_IRQ       PIT0_IRQn
  23 #define PIT_TICKER          PIT->CHANNEL[1]
  24 #define PIT_TICKER_IRQ      PIT1_IRQn
  25
  26 static void timer_init(void);
  27 static void ticker_init(void);
  28
  29
  30 static int us_ticker_inited = 0;
  31 static uint32_t clk_mhz;
  32
  33 void us_ticker_init(void) {
  34     if (us_ticker_inited)
  35         return;
  36     us_ticker_inited = 1;
  37
  38     SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;   // Clock PIT
  39     PIT->MCR = 0;                       // Enable PIT
  40
  41     clk_mhz = bus_frequency() / 1000000;
  42
  43     timer_init();
  44     ticker_init();
  45 }
  46
  47 /******************************************************************************
  48  * Timer for us timing.
  49  *
  50  * The K20D5M does not have a prescaler on its PIT timer nor the option
  51  * to chain timers, which is why a software timer is required to get 32-bit
  52  * word length.
  53  ******************************************************************************/
  54 static volatile uint32_t msb_counter = 0;
  55 static uint32_t timer_ldval = 0;
  56
  57 static void timer_isr(void) {
  58     msb_counter++;
  59     PIT_TIMER.TFLG = 1;
  60 }
  61
  62 static void timer_init(void) {
  63     //CLZ counts the leading zeros, returning number of bits not used by clk_mhz
  64     timer_ldval = clk_mhz << __CLZ(clk_mhz);
  65
  66     PIT_TIMER.LDVAL = timer_ldval;  // 1us
  67     PIT_TIMER.TCTRL |= PIT_TCTRL_TIE_MASK;
  68     PIT_TIMER.TCTRL |= PIT_TCTRL_TEN_MASK;  // Start timer 0
  69
  70     NVIC_SetVector(PIT_TIMER_IRQ, (uint32_t)timer_isr);
  71     NVIC_EnableIRQ(PIT_TIMER_IRQ);
  72 }
  73
  74 uint32_t us_ticker_read() {
  75     if (!us_ticker_inited)
  76         us_ticker_init();
  77
  78     uint32_t retval;
  79     __disable_irq();
  80     retval = (timer_ldval - PIT_TIMER.CVAL) / clk_mhz; //Hardware bits
  81     retval |= msb_counter << __CLZ(clk_mhz);           //Software bits
  82
  83     if (PIT_TIMER.TFLG == 1) {                         //If overflow bit is set, force it to be handled
  84         timer_isr();                                   //Handle IRQ, read again to make sure software/hardware bits are synced
  85         NVIC_ClearPendingIRQ(PIT_TIMER_IRQ);
  86         return us_ticker_read();
  87     }
  88
  89     __enable_irq();
  90     return retval;
  91 }
  92
  93 /******************************************************************************
  94  * Timer Event
  95  *
  96  * It schedules interrupts at given (32bit)us interval of time.
  97  * It is implemented using PIT channel 1, since no prescaler is available,
  98  * some bits are implemented in software.
  99  ******************************************************************************/
 100 static void ticker_isr(void);
 101
 102 static void ticker_init(void) {
 103     /* Set interrupt handler */
 104     NVIC_SetVector(PIT_TICKER_IRQ, (uint32_t)ticker_isr);
 105     NVIC_EnableIRQ(PIT_TICKER_IRQ);
 106 }
 107
 108 void us_ticker_disable_interrupt(void) {
 109     PIT_TICKER.TCTRL &= ~PIT_TCTRL_TIE_MASK;
 110 }
 111
 112 void us_ticker_clear_interrupt(void) {
 113     // we already clear interrupt in lptmr_isr
 114 }
 115
 116 static uint32_t us_ticker_int_counter = 0;
 117
 118 inline static void ticker_set(uint32_t count) {
 119     PIT_TICKER.TCTRL = 0;
 120     PIT_TICKER.LDVAL = count;
 121     PIT_TICKER.TCTRL = PIT_TCTRL_TIE_MASK | PIT_TCTRL_TEN_MASK;
 122 }
 123
 124 static void ticker_isr(void) {
 125     // Clear IRQ flag
 126     PIT_TICKER.TFLG = 1;
 127
 128     if (us_ticker_int_counter > 0) {
 129         ticker_set(0xFFFFFFFF);
 130         us_ticker_int_counter--;
 131     } else {
 132         // This function is going to disable the interrupts if there are
 133         // no other events in the queue
 134         us_ticker_irq_handler();
 135     }
 136 }
 137
 138 void us_ticker_set_interrupt(timestamp_t timestamp) {
 139     int delta = (int)((uint32_t)timestamp - us_ticker_read());
 140     if (delta <= 0) {
 141         // This event was in the past:
 142         us_ticker_irq_handler();
 143         return;
 144     }
 145
 146     //Calculate how much falls outside the 32-bit after multiplying with clk_mhz
 147     //We shift twice 16-bit to keep everything within the 32-bit variable
 148     us_ticker_int_counter = (uint32_t)(delta >> 16);
 149     us_ticker_int_counter *= clk_mhz;
 150     us_ticker_int_counter >>= 16;
 151
 152     uint32_t us_ticker_int_remainder = (uint32_t)delta * clk_mhz;
 153     if (us_ticker_int_remainder == 0) {
 154         ticker_set(0xFFFFFFFF);
 155         us_ticker_int_counter--;
 156     } else {
 157         ticker_set(us_ticker_int_remainder);
 158     }
 159 }