1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
16 #include "mbed_assert.h"
17 #include "serial_api.h"
19 // math.h required for floating point operations for baud rate calculation
26 #include "clk_freqs.h"
27 #include "PeripheralPins.h"
31 /******************************************************************************
33 ******************************************************************************/
35 static uint32_t serial_irq_ids
[UART_NUM
] = {0};
36 static uart_irq_handler irq_handler
;
38 int stdio_uart_inited
= 0;
41 static inline uint32_t serial_get_src_clock(serial_t
*obj
) {
44 switch ((int)obj
->uart
) {
46 mux
= (SIM
->SOPT2
& SIM_SOPT2_LPUART0SRC_MASK
) >> SIM_SOPT2_LPUART0SRC_SHIFT
;
49 mux
= (SIM
->SOPT2
& SIM_SOPT2_LPUART1SRC_MASK
) >> SIM_SOPT2_LPUART1SRC_SHIFT
;
51 case UART_2
: /* TODO: add UART2 support */ break;
55 case 1: srcclk
= fastirc_frequency(); break;
56 case 2: srcclk
= extosc_frequency(); break;
57 case 3: srcclk
= mcgirc_frequency(); break;
58 default: srcclk
= 0; break;
64 void serial_init(serial_t
*obj
, PinName tx
, PinName rx
) {
65 // determine the UART to use
66 UARTName uart_tx
= (UARTName
)pinmap_peripheral(tx
, PinMap_UART_TX
);
67 UARTName uart_rx
= (UARTName
)pinmap_peripheral(rx
, PinMap_UART_RX
);
68 UARTName uart
= (UARTName
)pinmap_merge(uart_tx
, uart_rx
);
69 MBED_ASSERT((int)uart
!= NC
);
71 obj
->uart
= (LPUART_Type
*)uart
;
76 SIM
->SOPT2
|= SIM_SOPT2_LPUART0SRC(1);
77 SIM
->SCGC5
|= SIM_SCGC5_LPUART0_MASK
;
80 SIM
->SOPT2
|= SIM_SOPT2_LPUART1SRC(1);
81 SIM
->SCGC5
|= SIM_SCGC5_LPUART1_MASK
;
83 case UART_2
: /* TODO: add UART2 support */ break;
86 // reset UART registers
87 obj
->uart
->BAUD
= 0x0F000004;
88 obj
->uart
->STAT
= 0xC01FC000;
89 obj
->uart
->CTRL
= 0x00000000;
90 obj
->uart
->MATCH
= 0x00000000;
93 case UART_0
: obj
->index
= 0; break;
94 case UART_1
: obj
->index
= 1; break;
95 case UART_2
: /* TODO: add UART2 support */ break;
98 // set default baud rate and format
99 serial_baud (obj
, 9600);
100 serial_format(obj
, 8, ParityNone
, 1);
102 // pinout the chosen uart
103 pinmap_pinout(tx
, PinMap_UART_TX
);
104 pinmap_pinout(rx
, PinMap_UART_RX
);
106 // set rx/tx pins in PullUp mode
107 if (tx
!= NC
) pin_mode(tx
, PullUp
);
108 if (rx
!= NC
) pin_mode(rx
, PullUp
);
110 obj
->uart
->CTRL
|= (LPUART_CTRL_RE_MASK
| LPUART_CTRL_TE_MASK
);
112 if (uart
== STDIO_UART
) {
113 stdio_uart_inited
= 1;
114 memcpy(&stdio_uart
, obj
, sizeof(serial_t
));
118 void serial_free(serial_t
*obj
) {
119 serial_irq_ids
[obj
->index
] = 0;
124 // set the baud rate, taking in to account the current SystemFrequency
125 void serial_baud(serial_t
*obj
, int baudrate
) {
127 uint32_t i
, sbr
, sbrTemp
, osr
, temp
, baud
, baudDiff
;
129 /* get value of serial source clock */
130 uint32_t PCLK
= serial_get_src_clock(obj
);
132 /* loop to find the best osr value possible, one that generates minimum baudDiff
133 * iterate through the rest of the supported values of osr */
135 for (i
= 5; i
<= 33; i
++) {
136 /* calculate the temporary sbr value */
137 sbrTemp
= PCLK
/ (baudrate
* i
);
139 /* calculate the baud rate based on the temporary osr and sbr values */
140 calcBaudrate
= PCLK
/ (i
* sbrTemp
);
142 if (calcBaudrate
> baudrate
) {
143 baudDiff
= calcBaudrate
- baudrate
;
145 baudDiff
= baudrate
- calcBaudrate
;
148 if (baudDiff
< temp
) {
149 osr
= i
- 1; /* update and store the best osr value calculated */
150 sbr
= sbrTemp
; /* update store the best sbr value calculated */
153 break; /* end for loop if founded the best osr and sbr value */
162 temp
= obj
->uart
->CTRL
& (LPUART_CTRL_RE_MASK
| LPUART_CTRL_TE_MASK
);
164 /* disable UART before changing registers */
165 obj
->uart
->CTRL
&= ~(LPUART_CTRL_RE_MASK
| LPUART_CTRL_TE_MASK
);
167 /* read BAUD register with clearing old baudrate settings into baud variable */
168 baud
= obj
->uart
->BAUD
& ~(LPUART_BAUD_SBR_MASK
| LPUART_BAUD_OSR_MASK
| LPUART_BAUD_BOTHEDGE_MASK
);
170 /* write the new osr and sbr values */
171 baud
|= (LPUART_BAUD_SBR(sbr
) | LPUART_BAUD_OSR(osr
));
173 /* Check if osr is between 4x and 7x oversampling.
174 * If so, then "BOTHEDGE" sampling must be turned on */
175 if ((osr
> 3) && (osr
< 8)) {
176 baud
|= LPUART_BAUD_BOTHEDGE_MASK
;
179 /* write new values into BAUD register */
180 obj
->uart
->BAUD
= baud
;
182 /* restore C2 state */
183 obj
->uart
->CTRL
|= temp
;
186 void serial_format(serial_t
*obj
, int data_bits
, SerialParity parity
, int stop_bits
) {
187 MBED_ASSERT((stop_bits
== 1) || (stop_bits
== 2));
188 MBED_ASSERT((parity
== ParityNone
) || (parity
== ParityOdd
) || (parity
== ParityEven
));
189 MBED_ASSERT(data_bits
== 8); // TODO: Support other number of data bits (also in the write method!)
192 uint32_t c2_state
= obj
->uart
->CTRL
& (LPUART_CTRL_RE_MASK
| LPUART_CTRL_TE_MASK
);
194 // disable UART before changing registers
195 obj
->uart
->CTRL
&= ~(LPUART_CTRL_RE_MASK
| LPUART_CTRL_TE_MASK
);
198 uint8_t parity_enable
= 0, parity_select
= 0;
200 case ParityNone
: parity_enable
= 0; parity_select
= 0; break;
201 case ParityOdd
: parity_enable
= 1; parity_select
= 1; data_bits
++; break;
202 case ParityEven
: parity_enable
= 1; parity_select
= 0; data_bits
++; break;
209 // data bits, parity and parity mode
210 obj
->uart
->CTRL
= ((parity_enable
<< 1) | (parity_select
<< 0));
213 obj
->uart
->BAUD
&= ~LPUART_BAUD_SBNS_MASK
;
214 obj
->uart
->BAUD
|= (stop_bits
<< LPUART_BAUD_SBNS_SHIFT
);
217 obj
->uart
->CTRL
|= c2_state
;
220 /******************************************************************************
221 * INTERRUPTS HANDLING
222 ******************************************************************************/
223 static inline void uart_irq(uint32_t status
, uint32_t index
) {
224 if (serial_irq_ids
[index
] != 0) {
225 if (status
& LPUART_STAT_TDRE_MASK
)
226 irq_handler(serial_irq_ids
[index
], TxIrq
);
228 if (status
& LPUART_STAT_RDRF_MASK
)
229 irq_handler(serial_irq_ids
[index
], RxIrq
);
233 void uart0_irq() {uart_irq(LPUART0
->STAT
, 0);}
234 void uart1_irq() {uart_irq(LPUART1
->STAT
, 1);}
236 void serial_irq_handler(serial_t
*obj
, uart_irq_handler handler
, uint32_t id
) {
237 irq_handler
= handler
;
238 serial_irq_ids
[obj
->index
] = id
;
241 void serial_irq_set(serial_t
*obj
, SerialIrq irq
, uint32_t enable
) {
242 IRQn_Type irq_n
= (IRQn_Type
)0;
244 switch ((int)obj
->uart
) {
245 case UART_0
: irq_n
=LPUART0_IRQn
; vector
= (uint32_t)&uart0_irq
; break;
246 case UART_1
: irq_n
=LPUART1_IRQn
; vector
= (uint32_t)&uart1_irq
; break;
251 case RxIrq
: obj
->uart
->CTRL
|= LPUART_CTRL_RIE_MASK
; break;
252 case TxIrq
: obj
->uart
->CTRL
|= LPUART_CTRL_TIE_MASK
; break;
254 NVIC_SetVector(irq_n
, vector
);
255 NVIC_EnableIRQ(irq_n
);
258 int all_disabled
= 0;
259 SerialIrq other_irq
= (irq
== RxIrq
) ? (TxIrq
) : (RxIrq
);
261 case RxIrq
: obj
->uart
->CTRL
&= ~(LPUART_CTRL_RIE_MASK
); break;
262 case TxIrq
: obj
->uart
->CTRL
&= ~(LPUART_CTRL_TIE_MASK
); break;
265 case RxIrq
: all_disabled
= (obj
->uart
->CTRL
& LPUART_CTRL_RIE_MASK
) == 0; break;
266 case TxIrq
: all_disabled
= (obj
->uart
->CTRL
& LPUART_CTRL_TIE_MASK
) == 0; break;
269 NVIC_DisableIRQ(irq_n
);
273 /******************************************************************************
275 ******************************************************************************/
276 int serial_getc(serial_t
*obj
) {
277 while (!serial_readable(obj
));
278 return (obj
->uart
->DATA
& 0xFFu
);
281 void serial_putc(serial_t
*obj
, int c
) {
282 while (!serial_writable(obj
));
286 int serial_readable(serial_t
*obj
) {
288 if (obj
->uart
->STAT
& LPUART_STAT_OR_MASK
) {
289 obj
->uart
->STAT
|= LPUART_STAT_OR_MASK
;
291 return (obj
->uart
->STAT
& LPUART_STAT_RDRF_MASK
);
294 int serial_writable(serial_t
*obj
) {
296 if (obj
->uart
->STAT
& LPUART_STAT_OR_MASK
) {
297 obj
->uart
->STAT
|= LPUART_STAT_OR_MASK
;
299 return (obj
->uart
->STAT
& LPUART_STAT_TDRE_MASK
);
302 void serial_clear(serial_t
*obj
) {
305 void serial_pinout_tx(PinName tx
) {
306 pinmap_pinout(tx
, PinMap_UART_TX
);
309 void serial_break_set(serial_t
*obj
) {
310 obj
->uart
->CTRL
|= LPUART_CTRL_SBK_MASK
;
313 void serial_break_clear(serial_t
*obj
) {
314 obj
->uart
->CTRL
&= ~LPUART_CTRL_SBK_MASK
;