]> git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/gpio_irq_api.c
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_Freescale / TARGET_KLXX / TARGET_KL46Z / gpio_irq_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include <stddef.h>
17 #include "cmsis.h"
18
19 #include "gpio_irq_api.h"
20 #include "gpio_api.h"
21 #include "mbed_error.h"
22
23 #define CHANNEL_NUM 96
24
25 static uint32_t channel_ids[CHANNEL_NUM] = {0};
26 static gpio_irq_handler irq_handler;
27
28 #define IRQ_DISABLED (0)
29 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
30 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
31 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
32
33 const uint32_t search_bits[] = {0x0000FFFF, 0x000000FF, 0x0000000F, 0x00000003, 0x00000001};
34
35 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
36 uint32_t isfr;
37 uint8_t location;
38
39 while((isfr = port->ISFR) != 0) {
40 location = 0;
41 for (int i = 0; i < 5; i++) {
42 if (!(isfr & (search_bits[i] << location)))
43 location += 1 << (4 - i);
44 }
45
46 uint32_t id = channel_ids[ch_base + location];
47 if (id == 0) {
48 continue;
49 }
50
51 FGPIO_Type *gpio;
52 gpio_irq_event event = IRQ_NONE;
53 switch (port->PCR[location] & PORT_PCR_IRQC_MASK) {
54 case IRQ_RAISING_EDGE:
55 event = IRQ_RISE;
56 break;
57
58 case IRQ_FALLING_EDGE:
59 event = IRQ_FALL;
60 break;
61
62 case IRQ_EITHER_EDGE:
63 if (port == PORTA) {
64 gpio = FPTA;
65 } else if (port == PORTC) {
66 gpio = FPTC;
67 } else {
68 gpio = FPTD;
69 }
70 event = (gpio->PDIR & (1<<location)) ? (IRQ_RISE) : (IRQ_FALL);
71 break;
72 }
73 if (event != IRQ_NONE) {
74 irq_handler(id, event);
75 }
76 port->ISFR = 1 << location;
77 }
78 }
79
80 void gpio_irqA(void) {
81 handle_interrupt_in(PORTA, 0);
82 }
83
84 /* PORTC and PORTD share same vector */
85 void gpio_irqCD(void) {
86 if ((SIM->SCGC5 & SIM_SCGC5_PORTC_MASK) && (PORTC->ISFR)) {
87 handle_interrupt_in(PORTC, 32);
88 } else if ((SIM->SCGC5 & SIM_SCGC5_PORTD_MASK) && (PORTD->ISFR)) {
89 handle_interrupt_in(PORTD, 64);
90 }
91 }
92
93 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
94 if (pin == NC)
95 return -1;
96
97 irq_handler = handler;
98
99 obj->port = pin >> PORT_SHIFT;
100 obj->pin = (pin & 0x7F) >> 2;
101
102 uint32_t ch_base, vector;
103 IRQn_Type irq_n;
104 switch (obj->port) {
105 case PortA:
106 ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
107 break;
108
109 case PortC:
110 ch_base = 32; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
111 break;
112
113 case PortD:
114 ch_base = 64; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
115 break;
116
117 default:
118 error("gpio_irq only supported on port A,C and D");
119 break;
120 }
121 NVIC_SetVector(irq_n, vector);
122 NVIC_EnableIRQ(irq_n);
123
124 obj->ch = ch_base + obj->pin;
125 channel_ids[obj->ch] = id;
126
127 return 0;
128 }
129
130 void gpio_irq_free(gpio_irq_t *obj) {
131 channel_ids[obj->ch] = 0;
132 }
133
134 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
135 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
136
137 uint32_t irq_settings = IRQ_DISABLED;
138
139 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
140 case IRQ_DISABLED:
141 if (enable) {
142 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
143 }
144 break;
145
146 case IRQ_RAISING_EDGE:
147 if (enable) {
148 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
149 } else {
150 if (event == IRQ_FALL)
151 irq_settings = IRQ_RAISING_EDGE;
152 }
153 break;
154
155 case IRQ_FALLING_EDGE:
156 if (enable) {
157 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
158 } else {
159 if (event == IRQ_RISE)
160 irq_settings = IRQ_FALLING_EDGE;
161 }
162 break;
163
164 case IRQ_EITHER_EDGE:
165 if (enable) {
166 irq_settings = IRQ_EITHER_EDGE;
167 } else {
168 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
169 }
170 break;
171 }
172
173 // Interrupt configuration and clear interrupt
174 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
175 }
176
177 void gpio_irq_enable(gpio_irq_t *obj) {
178 if (obj->port == PortA) {
179 NVIC_EnableIRQ(PORTA_IRQn);
180 } else {
181 NVIC_EnableIRQ(PORTC_PORTD_IRQn);
182 }
183 }
184
185 void gpio_irq_disable(gpio_irq_t *obj) {
186 if (obj->port == PortA) {
187 NVIC_DisableIRQ(PORTA_IRQn);
188 } else {
189 NVIC_DisableIRQ(PORTC_PORTD_IRQn);
190 }
191 }
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