tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/i2c_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include "mbed_assert.h"
  17 #include "i2c_api.h"
  18
  19 #include "cmsis.h"
  20 #include "pinmap.h"
  21 #include "clk_freqs.h"
  22 #include "PeripheralPins.h"
  23
  24 static const uint16_t ICR[0x40] = {
  25       20,   22,   24,   26,   28,
  26       30,   34,   40,   28,   32,
  27       36,   40,   44,   48,   56,
  28       68,   48,   56,   64,   72,
  29       80,   88,  104,  128,   80,
  30       96,  112,  128,  144,  160,
  31       192,  240,  160,  192,  224,
  32       256,  288,  320,  384,  480,
  33       320,  384,  448,  512,  576,
  34       640,  768,  960,  640,  768,
  35       896, 1024, 1152, 1280, 1536,
  36       1920, 1280, 1536, 1792, 2048,
  37       2304, 2560, 3072, 3840
  38 };
  39
  40
  41 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
  42     // determine the I2C to use
  43     I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
  44     I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
  45     obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
  46     MBED_ASSERT((int)obj->i2c != NC);
  47
  48     // enable power
  49     switch ((int)obj->i2c) {
  50         case I2C_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 6; break;
  51         case I2C_1: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 7; break;
  52     }
  53
  54     // set default frequency at 100k
  55     i2c_frequency(obj, 100000);
  56
  57     // enable I2C interface
  58     obj->i2c->C1 |= 0x80;
  59
  60     pinmap_pinout(sda, PinMap_I2C_SDA);
  61     pinmap_pinout(scl, PinMap_I2C_SCL);
  62 }
  63
  64 int i2c_start(i2c_t *obj) {
  65     uint8_t temp;
  66     volatile int i;
  67     // if we are in the middle of a transaction
  68     // activate the repeat_start flag
  69     if (obj->i2c->S & I2C_S_BUSY_MASK) {
  70         // KL25Z errata sheet: repeat start cannot be generated if the
  71         // I2Cx_F[MULT] field is set to a non-zero value
  72         temp = obj->i2c->F >> 6;
  73         obj->i2c->F &= 0x3F;
  74         obj->i2c->C1 |= 0x04;
  75         for (i = 0; i < 100; i ++) __NOP();
  76         obj->i2c->F |= temp << 6;
  77     } else {
  78         obj->i2c->C1 |= I2C_C1_MST_MASK;
  79         obj->i2c->C1 |= I2C_C1_TX_MASK;
  80     }
  81     return 0;
  82 }
  83
  84 int i2c_stop(i2c_t *obj) {
  85     volatile uint32_t n = 0;
  86     obj->i2c->C1 &= ~I2C_C1_MST_MASK;
  87     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
  88
  89     // It seems that there are timing problems
  90     // when there is no waiting time after a STOP.
  91     // This wait is also included on the samples
  92     // code provided with the freedom board
  93     for (n = 0; n < 100; n++) __NOP();
  94     return 0;
  95 }
  96
  97 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
  98     uint32_t i, timeout = 100000;
  99
 100     for (i = 0; i < timeout; i++) {
 101         if (obj->i2c->S & mask)
 102             return 0;
 103     }
 104
 105     return 1;
 106 }
 107
 108 // this function waits the end of a tx transfer and return the status of the transaction:
 109 //    0: OK ack received
 110 //    1: OK ack not received
 111 //    2: failure
 112 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
 113
 114     // wait for the interrupt flag
 115     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
 116         return 2;
 117     }
 118
 119     obj->i2c->S |= I2C_S_IICIF_MASK;
 120
 121     // wait transfer complete
 122     if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
 123         return 2;
 124     }
 125
 126     // check if we received the ACK or not
 127     return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
 128 }
 129
 130 // this function waits the end of a rx transfer and return the status of the transaction:
 131 //    0: OK
 132 //    1: failure
 133 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
 134     // wait for the end of the rx transfer
 135     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
 136         return 1;
 137     }
 138
 139     obj->i2c->S |= I2C_S_IICIF_MASK;
 140
 141     return 0;
 142 }
 143
 144 static void i2c_send_nack(i2c_t *obj) {
 145     obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
 146 }
 147
 148 static void i2c_send_ack(i2c_t *obj) {
 149     obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
 150 }
 151
 152 static int i2c_do_write(i2c_t *obj, int value) {
 153     // write the data
 154     obj->i2c->D = value;
 155
 156     // init and wait the end of the transfer
 157     return i2c_wait_end_tx_transfer(obj);
 158 }
 159
 160 static int i2c_do_read(i2c_t *obj, char * data, int last) {
 161     if (last)
 162         i2c_send_nack(obj);
 163     else
 164         i2c_send_ack(obj);
 165
 166     *data = (obj->i2c->D & 0xFF);
 167
 168     // start rx transfer and wait the end of the transfer
 169     return i2c_wait_end_rx_transfer(obj);
 170 }
 171
 172 void i2c_frequency(i2c_t *obj, int hz) {
 173     uint8_t icr = 0;
 174     uint8_t mult = 0;
 175     uint32_t error = 0;
 176     uint32_t p_error = 0xffffffff;
 177     uint32_t ref = 0;
 178     uint8_t i, j;
 179     // bus clk
 180     uint32_t PCLK = bus_frequency();
 181     uint32_t pulse = PCLK / (hz * 2);
 182
 183     // we look for the values that minimize the error
 184
 185     // test all the MULT values
 186     for (i = 1; i < 5; i*=2) {
 187         for (j = 0; j < 0x40; j++) {
 188             ref = PCLK / (i*ICR[j]);
 189             if (ref > (uint32_t)hz)
 190                 continue;
 191             error = hz - ref;
 192             if (error < p_error) {
 193                 icr = j;
 194                 mult = i/2;
 195                 p_error = error;
 196             }
 197         }
 198     }
 199     pulse = icr | (mult << 6);
 200
 201     // I2C Rate
 202     obj->i2c->F = pulse;
 203 }
 204
 205 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
 206     int count;
 207     char dummy_read, *ptr;
 208
 209     if (i2c_start(obj)) {
 210         i2c_stop(obj);
 211         return I2C_ERROR_BUS_BUSY;
 212     }
 213
 214     if (i2c_do_write(obj, (address | 0x01))) {
 215         i2c_stop(obj);
 216         return I2C_ERROR_NO_SLAVE;
 217     }
 218
 219     // set rx mode
 220     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 221
 222     // Read in bytes
 223     for (count = 0; count < (length); count++) {
 224         ptr = (count == 0) ? &dummy_read : &data[count - 1];
 225         uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
 226         if (i2c_do_read(obj, ptr, stop_)) {
 227             i2c_stop(obj);
 228             return count;
 229         }
 230     }
 231
 232     // If not repeated start, send stop.
 233     if (stop) {
 234         i2c_stop(obj);
 235     }
 236
 237     // last read
 238     data[count-1] = obj->i2c->D;
 239
 240     return length;
 241 }
 242 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
 243     int i;
 244
 245     if (i2c_start(obj)) {
 246         i2c_stop(obj);
 247         return I2C_ERROR_BUS_BUSY;
 248     }
 249
 250     if (i2c_do_write(obj, (address & 0xFE))) {
 251         i2c_stop(obj);
 252         return I2C_ERROR_NO_SLAVE;
 253     }
 254
 255     for (i = 0; i < length; i++) {
 256         if(i2c_do_write(obj, data[i])) {
 257             i2c_stop(obj);
 258             return i;
 259         }
 260     }
 261
 262     if (stop) {
 263         i2c_stop(obj);
 264     }
 265
 266     return length;
 267 }
 268
 269 void i2c_reset(i2c_t *obj) {
 270     i2c_stop(obj);
 271 }
 272
 273 int i2c_byte_read(i2c_t *obj, int last) {
 274     char data;
 275
 276     // set rx mode
 277     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 278
 279     // Setup read
 280     i2c_do_read(obj, &data, last);
 281
 282     // set tx mode
 283     obj->i2c->C1 |= I2C_C1_TX_MASK;
 284     return obj->i2c->D;
 285 }
 286
 287 int i2c_byte_write(i2c_t *obj, int data) {
 288     // set tx mode
 289     obj->i2c->C1 |= I2C_C1_TX_MASK;
 290
 291     return !i2c_do_write(obj, (data & 0xFF));
 292 }
 293
 294
 295 #if DEVICE_I2CSLAVE
 296 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
 297     if (enable_slave) {
 298         // set slave mode
 299         obj->i2c->C1 &= ~I2C_C1_MST_MASK;
 300         obj->i2c->C1 |= I2C_C1_IICIE_MASK;
 301     } else {
 302         // set master mode
 303         obj->i2c->C1 |= I2C_C1_MST_MASK;
 304     }
 305 }
 306
 307 int i2c_slave_receive(i2c_t *obj) {
 308     switch(obj->i2c->S) {
 309         // read addressed
 310         case 0xE6: return 1;
 311
 312         // write addressed
 313         case 0xE2: return 3;
 314
 315         default: return 0;
 316     }
 317 }
 318
 319 int i2c_slave_read(i2c_t *obj, char *data, int length) {
 320     uint8_t dummy_read;
 321     uint8_t * ptr;
 322     int count;
 323
 324     // set rx mode
 325     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 326
 327     // first dummy read
 328     dummy_read = obj->i2c->D;
 329     if(i2c_wait_end_rx_transfer(obj)) {
 330         return 0;
 331     }
 332
 333     // read address
 334     dummy_read = obj->i2c->D;
 335     if(i2c_wait_end_rx_transfer(obj)) {
 336         return 0;
 337     }
 338
 339     // read (length - 1) bytes
 340     for (count = 0; count < (length - 1); count++) {
 341         data[count] = obj->i2c->D;
 342         if(i2c_wait_end_rx_transfer(obj)) {
 343             return count;
 344         }
 345     }
 346
 347     // read last byte
 348     ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
 349     *ptr = obj->i2c->D;
 350
 351     return (length) ? (count + 1) : 0;
 352 }
 353
 354 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
 355     int i, count = 0;
 356
 357     // set tx mode
 358     obj->i2c->C1 |= I2C_C1_TX_MASK;
 359
 360     for (i = 0; i < length; i++) {
 361         if(i2c_do_write(obj, data[count++]) == 2) {
 362             return i;
 363         }
 364     }
 365
 366     // set rx mode
 367     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
 368
 369     // dummy rx transfer needed
 370     // otherwise the master cannot generate a stop bit
 371     obj->i2c->D;
 372     if(i2c_wait_end_rx_transfer(obj) == 2) {
 373         return count;
 374     }
 375
 376     return count;
 377 }
 378
 379 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
 380     obj->i2c->A1 = address & 0xfe;
 381 }
 382 #endif
 383