tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/gpio/fsl_gpio_hal.h

   1 /*
   2  * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without modification,
   6  * are permitted provided that the following conditions are met:
   7  *
   8  * o Redistributions of source code must retain the above copyright notice, this list
   9  *   of conditions and the following disclaimer.
  10  *
  11  * o Redistributions in binary form must reproduce the above copyright notice, this
  12  *   list of conditions and the following disclaimer in the documentation and/or
  13  *   other materials provided with the distribution.
  14  *
  15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  16  *   contributors may be used to endorse or promote products derived from this
  17  *   software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30 #ifndef __FSL_GPIO_HAL_H__
  31 #define __FSL_GPIO_HAL_H__
  32
  33 #include <assert.h>
  34 #include <stdint.h>
  35 #include <stdbool.h>
  36 #include "fsl_gpio_features.h"
  37 #include "fsl_device_registers.h"
  38
  39 /*!
  40  * @addtogroup gpio_hal
  41  * @{
  42  */
  43
  44 /*!
  45  * @file fsl_gpio_hal.h
  46  *
  47  * @brief GPIO hardware driver configuration. Use these functions to set the GPIO input/output,
  48  * set output logic or get input logic. Check the GPIO header file for base address. Each
  49  * GPIO instance has 32 pins with numbers from 0 to 31.
  50  */
  51
  52 /*******************************************************************************
  53  * Definitions
  54  ******************************************************************************/
  55
  56 /*! @brief GPIO direction definition*/
  57 typedef enum _gpio_pin_direction {
  58     kGpioDigitalInput  = 0, /*!< Set current pin as digital input*/
  59     kGpioDigitalOutput = 1  /*!< Set current pin as digital output*/
  60 } gpio_pin_direction_t;
  61
  62 /*******************************************************************************
  63  * API
  64  ******************************************************************************/
  65
  66 #if defined(__cplusplus)
  67 extern "C" {
  68 #endif
  69
  70 /*!
  71  * @name Configuration
  72  * @{
  73  */
  74
  75 /*!
  76  * @brief Sets the individual GPIO pin to general input or output.
  77  *
  78  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
  79  * @param pin  GPIO port pin number
  80  * @param direction  GPIO directions
  81  *        - kGpioDigitalInput: set to input
  82  *        - kGpioDigitalOutput: set to output
  83  */
  84 void GPIO_HAL_SetPinDir(uint32_t baseAddr, uint32_t pin,
  85                         gpio_pin_direction_t direction);
  86
  87 /*!
  88  * @brief Sets the GPIO port pins to general input or output.
  89  *
  90  * This function  operates all 32 port pins.
  91  *
  92  * @param baseAddr  GPIO base address (HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
  93  * @param direction  GPIO directions
  94  *        - 0: set to input
  95  *        - 1: set to output
  96  *        - LSB: pin 0
  97  *        - MSB: pin 31
  98  */
  99 static inline void GPIO_HAL_SetPortDir(uint32_t baseAddr, uint32_t direction)
 100 {
 101     HW_GPIO_PDDR_WR(baseAddr, direction);
 102 }
 103
 104 /* @} */
 105
 106 /*!
 107  * @name Status
 108  * @{
 109  */
 110
 111 /*!
 112  * @brief Gets the current direction of the individual GPIO pin.
 113  *
 114  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 115  * @param pin  GPIO port pin number
 116  * @return GPIO directions
 117  *        - kGpioDigitalInput: corresponding pin is set to input.
 118  *        - kGpioDigitalOutput: corresponding pin is set to output.
 119  */
 120 static inline gpio_pin_direction_t GPIO_HAL_GetPinDir(uint32_t baseAddr, uint32_t pin)
 121 {
 122     assert(pin < 32);
 123     return (gpio_pin_direction_t)((HW_GPIO_PDDR_RD(baseAddr) >> pin) & 1U);
 124 }
 125
 126 /*!
 127  * @brief Gets the GPIO port pins direction.
 128  *
 129  * This function  gets all 32-pin directions as a 32-bit integer.
 130  *
 131  * @param baseAddr  GPIO base address (HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 132  * @return GPIO directions. Each bit represents one pin. For each bit:
 133  *        - 0: corresponding pin is set to input
 134  *        - 1: corresponding pin is set to output
 135  *        - LSB: pin 0
 136  *        - MSB: pin 31
 137  */
 138 static inline uint32_t GPIO_HAL_GetPortDir(uint32_t baseAddr)
 139 {
 140     return HW_GPIO_PDDR_RD(baseAddr);
 141 }
 142
 143 /* @} */
 144
 145 /*!
 146  * @name Output Operation
 147  * @{
 148  */
 149
 150 /*!
 151  * @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
 152  *
 153  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 154  * @param pin  GPIO port pin number
 155  * @param output  pin output logic level
 156  */
 157 void GPIO_HAL_WritePinOutput(uint32_t baseAddr, uint32_t pin, uint32_t output);
 158
 159 /*!
 160  * @brief Reads the current pin output.
 161  *
 162  * @param baseAddr  GPIO base address (HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 163  * @param pin  GPIO port pin number
 164  * @return current pin output status. 0 - Low logic, 1 - High logic
 165  */
 166 static inline uint32_t GPIO_HAL_ReadPinOutput(uint32_t baseAddr, uint32_t pin)
 167 {
 168     assert(pin < 32);
 169     return ((HW_GPIO_PDOR_RD(baseAddr) >> pin) & 0x1U);
 170 }
 171
 172 /*!
 173  * @brief Sets the output level of the individual GPIO pin to logic 1.
 174  *
 175  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 176  * @param pin  GPIO port pin number
 177  */
 178 static inline void GPIO_HAL_SetPinOutput(uint32_t baseAddr, uint32_t pin)
 179 {
 180     assert(pin < 32);
 181     HW_GPIO_PSOR_WR(baseAddr, 1U << pin);
 182 }
 183
 184 /*!
 185  * @brief Clears the output level of the individual GPIO pin to logic 0.
 186  *
 187  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 188  * @param pin  GPIO port pin number
 189  */
 190 static inline void GPIO_HAL_ClearPinOutput(uint32_t baseAddr, uint32_t pin)
 191 {
 192     assert(pin < 32);
 193     HW_GPIO_PCOR_WR(baseAddr, 1U << pin);
 194 }
 195
 196 /*!
 197  * @brief Reverses the current output logic of the individual GPIO pin.
 198  *
 199  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 200  * @param pin  GPIO port pin number
 201  */
 202 static inline void GPIO_HAL_TogglePinOutput(uint32_t baseAddr, uint32_t pin)
 203 {
 204     assert(pin < 32);
 205     HW_GPIO_PTOR_WR(baseAddr, 1U << pin);
 206 }
 207
 208 /*!
 209  * @brief Sets the output of the GPIO port to a specific logic value.
 210  *
 211  * This function  operates all 32 port pins.
 212  *
 213  * @param baseAddr  GPIO base address (HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 214  * @param portOutput  data to configure the GPIO output. Each bit represents one pin. For each bit:
 215  *        - 0: set logic level 0 to pin
 216  *        - 1: set logic level 1 to pin
 217  *        - LSB: pin 0
 218  *        - MSB: pin 31
 219  */
 220 static inline void GPIO_HAL_WritePortOutput(uint32_t baseAddr, uint32_t portOutput)
 221 {
 222     HW_GPIO_PDOR_WR(baseAddr, portOutput);
 223 }
 224
 225 /*!
 226  * @brief Reads out all pin output status of the current port.
 227  *
 228  * This function  operates all 32 port pins.
 229  *
 230  * @param baseAddr  GPIO base address (HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 231  * @return current port output status. Each bit represents one pin. For each bit:
 232  *        - 0: corresponding pin is outputting logic level 0
 233  *        - 1: corresponding pin is outputting logic level 1
 234  *        - LSB: pin 0
 235  *        - MSB: pin 31
 236  */
 237 static inline uint32_t GPIO_HAL_ReadPortOutput(uint32_t baseAddr)
 238 {
 239     return HW_GPIO_PDOR_RD(baseAddr);
 240 }
 241
 242 /* @} */
 243
 244 /*!
 245  * @name Input Operation
 246  * @{
 247  */
 248
 249 /*!
 250  * @brief Reads the current input value of the individual GPIO pin.
 251  *
 252  * @param baseAddr  GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 253  * @param pin  GPIO port pin number
 254  * @return GPIO port input value
 255  *         - 0: Pin logic level is 0, or is not configured for use by digital function.
 256  *         - 1: Pin logic level is 1
 257  */
 258 static inline uint32_t GPIO_HAL_ReadPinInput(uint32_t baseAddr, uint32_t pin)
 259 {
 260     assert(pin < 32);
 261     return (HW_GPIO_PDIR_RD(baseAddr) >> pin) & 1U;
 262 }
 263
 264 /*!
 265  * @brief Reads the current input value of a specific GPIO port.
 266  *
 267  * This function  gets all 32-pin input as a 32-bit integer.
 268  *
 269  * @param baseAddr GPIO base address(HW_GPIOA, HW_GPIOB, HW_GPIOC, etc.)
 270  * @return GPIO port input data. Each bit represents one pin. For each bit:
 271  *         - 0: Pin logic level is 0, or is not configured for use by digital function.
 272  *         - 1: Pin logic level is 1.
 273  *         - LSB: pin 0
 274  *         - MSB: pin 31
 275  */
 276 static inline uint32_t GPIO_HAL_ReadPortInput(uint32_t baseAddr)
 277 {
 278     return HW_GPIO_PDIR_RD(baseAddr);
 279 }
 280
 281 /* @} */
 282
 283 /*!
 284  * @name FGPIO Operation
 285  *
 286  * @note FGPIO (Fast GPIO) is only available in a few MCUs. FGPIO and GPIO share the same
 287  *       peripheral but use different registers. FGPIO is closer to the core than the regular GPIO
 288  *       and it's faster to read and write.
 289  * @{
 290  */
 291
 292 #if FSL_FEATURE_GPIO_HAS_FAST_GPIO
 293
 294 /*!
 295  * @name Output Operation
 296  * @{
 297  */
 298
 299 /*!
 300  * @brief Sets the output level of an individual FGPIO pin to logic 1.
 301  *
 302  * @param baseAddr  GPIO base address(HW_FPTA, HW_FPTB, HW_FPTC, etc.)
 303  * @param pin  FGPIO port pin number
 304  */
 305 static inline void FGPIO_HAL_SetPinOutput(uint32_t baseAddr, uint32_t pin)
 306 {
 307     assert(pin < 32);
 308     HW_FGPIO_PSOR_WR(baseAddr, 1U << pin);
 309 }
 310
 311 /*!
 312  * @brief Clears the output level of an individual FGPIO pin to logic 0.
 313  *
 314  * @param baseAddr  GPIO base address(HW_FPTA, HW_FPTB, HW_FPTC, etc.)
 315  * @param pin  FGPIO port pin number
 316  */
 317 static inline void FGPIO_HAL_ClearPinOutput(uint32_t baseAddr, uint32_t pin)
 318 {
 319     assert(pin < 32);
 320     HW_FGPIO_PCOR_WR(baseAddr, 1U << pin);
 321 }
 322
 323 /*!
 324  * @brief Reverses the current output logic of an individual FGPIO pin.
 325  *
 326  * @param baseAddr  GPIO base address(HW_FPTA, HW_FPTB, HW_FPTC, etc.)
 327  * @param pin  FGPIO port pin number
 328  */
 329 static inline void FGPIO_HAL_TogglePinOutput(uint32_t baseAddr, uint32_t pin)
 330 {
 331     assert(pin < 32);
 332     HW_FGPIO_PTOR_WR(baseAddr, 1U << pin);
 333 }
 334
 335 /*!
 336  * @brief Sets the output of the FGPIO port to a specific logic value.
 337  *
 338  * This function  affects all 32 port pins.
 339  *
 340  * @param baseAddr  GPIO base address(HW_FPTA, HW_FPTB, HW_FPTC, etc.)
 341  * @param portOutput  data to configure the GPIO output. Each bit represents one pin. For each bit:
 342  *        - 0: set logic level 0 to pin.
 343  *        - 1: set logic level 1 to pin.
 344  *        - LSB: pin 0
 345  *        - MSB: pin 31
 346  */
 347 static inline void FGPIO_HAL_WritePortOutput(uint32_t baseAddr, uint32_t portOutput)
 348 {
 349     HW_FGPIO_PDOR_WR(baseAddr, portOutput);
 350 }
 351
 352 /* @} */
 353
 354 /*!
 355  * @name Input Operation
 356  * @{
 357  */
 358
 359 /*!
 360  * @brief Gets the current input value of an individual FGPIO pin.
 361  *
 362  * @param baseAddr  GPIO base address(HW_FPTA, HW_FPTB, HW_FPTC, etc.)
 363  * @param pin  FGPIO port pin number
 364  * @return FGPIO port input data
 365  *         - 0: Pin logic level is 0, or is not configured for use by digital function.
 366  *         - 1: Pin logic level is 1.
 367  */
 368 static inline uint32_t FGPIO_HAL_ReadPinInput(uint32_t baseAddr, uint32_t pin)
 369 {
 370     assert(pin < 32);
 371     return (HW_FGPIO_PDIR_RD(baseAddr) >> pin) & 1U;
 372 }
 373
 374 /*!
 375  * @brief Gets the current input value of a specific FGPIO port.
 376  *
 377  * This function  gets all 32-pin input as a 32-bit integer.
 378  *
 379  * @param baseAddr  GPIO base address(HW_FPTA, HW_FPTB, HW_FPTC, etc.).
 380  * @return FGPIO port input data. Each bit represents one pin. For each bit:
 381  *         - 0: Pin logic level is 0, or is not configured for use by digital function.
 382  *         - 1: Pin logic level is 1.
 383  *         - LSB: pin 0
 384  *         - MSB: pin 31
 385  */
 386 static inline uint32_t FGPIO_HAL_ReadPortInput(uint32_t baseAddr)
 387 {
 388     return HW_FGPIO_PDIR_RD(baseAddr);
 389 }
 390
 391 /* @} */
 392
 393 #endif /* FSL_FEATURE_GPIO_HAS_FAST_GPIO*/
 394
 395 #if defined(__cplusplus)
 396 }
 397 #endif
 398
 399 /*! @} */
 400
 401 #endif /* __FSL_GPIO_HAL_H__*/
 402 /*******************************************************************************
 403  * EOF
 404  ******************************************************************************/
 405
 406