tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/mpu/fsl_mpu_features.h

   1 /*
   2 ** ###################################################################
   3 **     Version:             rev. 1.0, 2014-05-14
   4 **     Build:               b140515
   5 **
   6 **     Abstract:
   7 **         Chip specific module features.
   8 **
   9 **     Copyright: 2014 Freescale Semiconductor, Inc.
  10 **     All rights reserved.
  11 **
  12 **     Redistribution and use in source and binary forms, with or without modification,
  13 **     are permitted provided that the following conditions are met:
  14 **
  15 **     o Redistributions of source code must retain the above copyright notice, this list
  16 **       of conditions and the following disclaimer.
  17 **
  18 **     o Redistributions in binary form must reproduce the above copyright notice, this
  19 **       list of conditions and the following disclaimer in the documentation and/or
  20 **       other materials provided with the distribution.
  21 **
  22 **     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  23 **       contributors may be used to endorse or promote products derived from this
  24 **       software without specific prior written permission.
  25 **
  26 **     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  27 **     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  28 **     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  29 **     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  30 **     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  31 **     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  32 **     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  33 **     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34 **     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  35 **     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36 **
  37 **     http:                 www.freescale.com
  38 **     mail:                 support@freescale.com
  39 **
  40 **     Revisions:
  41 **     - rev. 1.0 (2014-05-14)
  42 **         Customer release.
  43 **
  44 ** ###################################################################
  45 */
  46
  47 #if !defined(__FSL_MPU_FEATURES_H__)
  48 #define __FSL_MPU_FEATURES_H__
  49
  50 #if defined(CPU_MK24FN1M0VDC12) || defined(CPU_MK24FN1M0VLL12) || defined(CPU_MK24FN1M0VLQ12)
  51     /* @brief Specifies number of descriptors available. */
  52     #define FSL_FEATURE_MPU_DESCRIPTOR_COUNT (12)
  53     /* @brief Has process identifier support. */
  54     #define FSL_FEATURE_MPU_HAS_PROCESS_IDENTIFIER (1)
  55     /* @brief Has master 0. */
  56     #define FSL_FEATURE_MPU_HAS_MASTER0 (1)
  57     /* @brief Has master 1. */
  58     #define FSL_FEATURE_MPU_HAS_MASTER1 (1)
  59     /* @brief Has master 2. */
  60     #define FSL_FEATURE_MPU_HAS_MASTER2 (1)
  61     /* @brief Has master 3. */
  62     #define FSL_FEATURE_MPU_HAS_MASTER3 (0)
  63     /* @brief Has master 4. */
  64     #define FSL_FEATURE_MPU_HAS_MASTER4 (1)
  65     /* @brief Has master 5. */
  66     #define FSL_FEATURE_MPU_HAS_MASTER5 (1)
  67     /* @brief Has master 6. */
  68     #define FSL_FEATURE_MPU_HAS_MASTER6 (0)
  69     /* @brief Has master 7. */
  70     #define FSL_FEATURE_MPU_HAS_MASTER7 (0)
  71 #elif defined(CPU_MK63FN1M0VLQ12) || defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK64FX512VDC12) || defined(CPU_MK64FN1M0VDC12) || \
  72     defined(CPU_MK64FX512VLL12) || defined(CPU_MK64FN1M0VLL12) || defined(CPU_MK64FX512VLQ12) || defined(CPU_MK64FN1M0VLQ12) || \
  73     defined(CPU_MK64FX512VMD12) || defined(CPU_MK64FN1M0VMD12)
  74     /* @brief Specifies number of descriptors available. */
  75     #define FSL_FEATURE_MPU_DESCRIPTOR_COUNT (12)
  76     /* @brief Has process identifier support. */
  77     #define FSL_FEATURE_MPU_HAS_PROCESS_IDENTIFIER (1)
  78     /* @brief Has master 0. */
  79     #define FSL_FEATURE_MPU_HAS_MASTER0 (1)
  80     /* @brief Has master 1. */
  81     #define FSL_FEATURE_MPU_HAS_MASTER1 (1)
  82     /* @brief Has master 2. */
  83     #define FSL_FEATURE_MPU_HAS_MASTER2 (1)
  84     /* @brief Has master 3. */
  85     #define FSL_FEATURE_MPU_HAS_MASTER3 (1)
  86     /* @brief Has master 4. */
  87     #define FSL_FEATURE_MPU_HAS_MASTER4 (1)
  88     /* @brief Has master 5. */
  89     #define FSL_FEATURE_MPU_HAS_MASTER5 (1)
  90     /* @brief Has master 6. */
  91     #define FSL_FEATURE_MPU_HAS_MASTER6 (0)
  92     /* @brief Has master 7. */
  93     #define FSL_FEATURE_MPU_HAS_MASTER7 (0)
  94 #elif defined(CPU_MK65FN2M0CAC18) || defined(CPU_MK65FX1M0CAC18) || defined(CPU_MK65FN2M0VMI18) || defined(CPU_MK65FX1M0VMI18) || \
  95     defined(CPU_MK66FN2M0VLQ18) || defined(CPU_MK66FX1M0VLQ18) || defined(CPU_MK66FN2M0VMD18) || defined(CPU_MK66FX1M0VMD18)
  96     /* @brief Specifies number of descriptors available. */
  97     #define FSL_FEATURE_MPU_DESCRIPTOR_COUNT (12)
  98     /* @brief Has process identifier support. */
  99     #define FSL_FEATURE_MPU_HAS_PROCESS_IDENTIFIER (1)
 100     /* @brief Has master 0. */
 101     #define FSL_FEATURE_MPU_HAS_MASTER0 (1)
 102     /* @brief Has master 1. */
 103     #define FSL_FEATURE_MPU_HAS_MASTER1 (1)
 104     /* @brief Has master 2. */
 105     #define FSL_FEATURE_MPU_HAS_MASTER2 (1)
 106     /* @brief Has master 3. */
 107     #define FSL_FEATURE_MPU_HAS_MASTER3 (1)
 108     /* @brief Has master 4. */
 109     #define FSL_FEATURE_MPU_HAS_MASTER4 (1)
 110     /* @brief Has master 5. */
 111     #define FSL_FEATURE_MPU_HAS_MASTER5 (1)
 112     /* @brief Has master 6. */
 113     #define FSL_FEATURE_MPU_HAS_MASTER6 (1)
 114     /* @brief Has master 7. */
 115     #define FSL_FEATURE_MPU_HAS_MASTER7 (0)
 116 #elif defined(CPU_MK70FN1M0VMF12) || defined(CPU_MK70FX512VMF12) || defined(CPU_MK70FN1M0VMF15) || defined(CPU_MK70FX512VMF15) || \
 117     defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FX512VMJ12) || defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15)
 118     /* @brief Specifies number of descriptors available. */
 119     #define FSL_FEATURE_MPU_DESCRIPTOR_COUNT (16)
 120     /* @brief Has process identifier support. */
 121     #define FSL_FEATURE_MPU_HAS_PROCESS_IDENTIFIER (1)
 122     /* @brief Has master 0. */
 123     #define FSL_FEATURE_MPU_HAS_MASTER0 (1)
 124     /* @brief Has master 1. */
 125     #define FSL_FEATURE_MPU_HAS_MASTER1 (1)
 126     /* @brief Has master 2. */
 127     #define FSL_FEATURE_MPU_HAS_MASTER2 (1)
 128     /* @brief Has master 3. */
 129     #define FSL_FEATURE_MPU_HAS_MASTER3 (1)
 130     /* @brief Has master 4. */
 131     #define FSL_FEATURE_MPU_HAS_MASTER4 (1)
 132     /* @brief Has master 5. */
 133     #define FSL_FEATURE_MPU_HAS_MASTER5 (1)
 134     /* @brief Has master 6. */
 135     #define FSL_FEATURE_MPU_HAS_MASTER6 (0)
 136     /* @brief Has master 7. */
 137     #define FSL_FEATURE_MPU_HAS_MASTER7 (0)
 138 #else
 139     #define MBED_NO_MPU
 140 #endif
 141
 142 #endif /* __FSL_MPU_FEATURES_H__ */
 143
 144 /*******************************************************************************
 145  * EOF
 146  ******************************************************************************/