]> git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/pdb/fsl_pdb_hal.c
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_Freescale / TARGET_KPSDK_MCUS / TARGET_KPSDK_CODE / hal / pdb / fsl_pdb_hal.c
1 /*
2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
10 *
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
14 *
15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include "fsl_pdb_hal.h"
32
33 /*FUNCTION*********************************************************************
34 *
35 * Function Name : PDB_HAL_Init
36 * Description : Reset PDB's registers to a known state. This state is
37 * defined in Reference Manual, which is power on reset value.
38 *
39 *END*************************************************************************/
40 void PDB_HAL_Init(uint32_t baseAddr)
41 {
42 uint32_t chn, preChn;
43 HW_PDB_SC_WR(baseAddr, 0U);
44 HW_PDB_MOD_WR(baseAddr, 0xFFFFU);
45 HW_PDB_IDLY_WR(baseAddr, 0xFFFFU);
46 /* For ADC trigger. */
47 for (chn = 0U; chn < HW_PDB_CHnC1_COUNT; chn++)
48 {
49 HW_PDB_CHnC1_WR(baseAddr, chn, 0U);
50 HW_PDB_CHnS_WR(baseAddr, chn,0xFU);
51 for (preChn = 0U; preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT; preChn++)
52 {
53 PDB_HAL_SetPreTriggerDelayCount(baseAddr, chn, preChn, 0U);
54 }
55 }
56 /* For DAC trigger. */
57 for (chn = 0U; chn < HW_PDB_DACINTCn_COUNT; chn++)
58 {
59 HW_PDB_DACINTCn_WR(baseAddr, chn, 0U);
60 HW_PDB_DACINTn_WR(baseAddr ,chn, 0U);
61 }
62 /* For Pulse out trigger. */
63 HW_PDB_POEN_WR(baseAddr, 0U);
64 for (chn = 0U; chn < HW_PDB_POnDLY_COUNT; chn++)
65 {
66 HW_PDB_POnDLY_WR(baseAddr, chn, 0U);
67 }
68 /* Load the setting value. */
69 PDB_HAL_Enable(baseAddr);
70 PDB_HAL_SetLoadRegsCmd(baseAddr);
71 PDB_HAL_Disable(baseAddr);
72 }
73
74 /*FUNCTION*********************************************************************
75 *
76 * Function Name : PDB_HAL_SetPreTriggerBackToBackCmd
77 * Description : Switch to enable pre-trigger's back to back mode.
78 *
79 *END*************************************************************************/
80 void PDB_HAL_SetPreTriggerBackToBackCmd(uint32_t baseAddr, uint32_t chn, uint32_t preChn, bool enable)
81 {
82 assert(chn < HW_PDB_CHnC1_COUNT);
83 assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
84
85 uint32_t tmp32 = HW_PDB_CHnC1_RD(baseAddr, chn);
86 if (enable)
87 {
88 tmp32 |= (1U << (preChn + BP_PDB_CHnC1_BB));
89 }
90 else
91 {
92 tmp32 &= ~(1U << (preChn + BP_PDB_CHnC1_BB));
93 }
94 HW_PDB_CHnC1_WR(baseAddr, chn, tmp32);
95 }
96
97 /*FUNCTION*********************************************************************
98 *
99 * Function Name : PDB_HAL_SetPreTriggerOutputCmd
100 * Description : Switch to enable pre-trigger's output.
101 *
102 *END*************************************************************************/
103 void PDB_HAL_SetPreTriggerOutputCmd(uint32_t baseAddr, uint32_t chn, uint32_t preChn, bool enable)
104 {
105 assert(chn < HW_PDB_CHnC1_COUNT);
106 assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
107
108 uint32_t tmp32 = HW_PDB_CHnC1_RD(baseAddr, chn);
109 if (enable)
110 {
111 tmp32 |= (1U << (preChn + BP_PDB_CHnC1_TOS));
112 }
113 else
114 {
115 tmp32 &= ~(1U << (preChn + BP_PDB_CHnC1_TOS));
116 }
117 HW_PDB_CHnC1_WR(baseAddr, chn, tmp32);
118 }
119
120 /*FUNCTION*********************************************************************
121 *
122 * Function Name : PDB_HAL_SetPreTriggerCmd
123 * Description : Switch to enable pre-trigger's.
124 *
125 *END*************************************************************************/
126 void PDB_HAL_SetPreTriggerCmd(uint32_t baseAddr, uint32_t chn, uint32_t preChn, bool enable)
127 {
128 assert(chn < HW_PDB_CHnC1_COUNT);
129 assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
130 uint32_t tmp32 = HW_PDB_CHnC1_RD(baseAddr, chn);
131
132 if (enable)
133 {
134 tmp32 |= (1U << (preChn + BP_PDB_CHnC1_EN));
135 }
136 else
137 {
138 tmp32 &= ~(1U << (preChn + BP_PDB_CHnC1_EN));
139 }
140 HW_PDB_CHnC1_WR(baseAddr, chn, tmp32);
141 }
142
143 /*FUNCTION*********************************************************************
144 *
145 * Function Name : PDB_HAL_ClearPreTriggerFlag
146 * Description : Clear the flag that the PDB counter reaches to the
147 * pre-trigger's delay value.
148 *
149 *END*************************************************************************/
150 void PDB_HAL_ClearPreTriggerFlag(uint32_t baseAddr, uint32_t chn, uint32_t preChn)
151 {
152 assert(chn < HW_PDB_CHnS_COUNT);
153 assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
154
155 /* Write 0 to clear. */
156 uint32_t tmp32 = HW_PDB_CHnS_RD(baseAddr, chn); /* Get current value. */
157 tmp32 &= ~(1U << (preChn + BP_PDB_CHnS_CF)); /* Update the change. */
158 tmp32 &= BM_PDB_CHnS_CF; /* Limit the change range. */
159
160 HW_PDB_CHnS_WR(baseAddr, chn, tmp32);
161 }
162
163 /*FUNCTION*********************************************************************
164 *
165 * Function Name : PDB_HAL_ClearPreTriggerSeqErrFlag
166 * Description : Clear the flag that sequence error is detected.
167 *
168 *END*************************************************************************/
169 void PDB_HAL_ClearPreTriggerSeqErrFlag(uint32_t baseAddr, uint32_t chn, uint32_t preChn)
170 {
171 assert(chn < HW_PDB_CHnS_COUNT);
172 assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
173
174 /* Write 1 to clear. */
175 uint32_t tmp32 = HW_PDB_CHnS_RD(baseAddr, chn); /* Get current value. */
176 tmp32 &= ~BM_PDB_CHnS_ERR;/* Clear the operate controller. */
177 tmp32 |= ( 1U << (preChn + BP_PDB_CHnS_ERR) );/* Add indicated clear operator. */
178
179 HW_PDB_CHnS_WR(baseAddr, chn, tmp32);
180 }
181
182 /*FUNCTION*********************************************************************
183 *
184 * Function Name : PDB_HAL_SetPreTriggerDelayCount
185 * Description : Set the delay value for pre-trigger.
186 *
187 *END*************************************************************************/
188 void PDB_HAL_SetPreTriggerDelayCount(uint32_t baseAddr, uint32_t chn, uint32_t preChn, uint32_t value)
189 {
190 assert(chn < HW_PDB_CHnDLY0_COUNT);
191 assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
192 switch (preChn)
193 {
194 case 0U:
195 BW_PDB_CHnDLY0_DLY(baseAddr, chn, value);
196 break;
197 #if (FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT > 1U)
198 case 1U:
199 BW_PDB_CHnDLY1_DLY(baseAddr, chn, value);
200 break;
201 #endif /* FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT */
202 default:
203 break;
204 }
205 }
206
207 /*FUNCTION*********************************************************************
208 *
209 * Function Name : PDB_HAL_SetPulseOutCmd
210 * Description : Switch to enable the pulse-out trigger.
211 *
212 *END*************************************************************************/
213 void PDB_HAL_SetPulseOutCmd(uint32_t baseAddr, uint32_t pulseChn, bool enable)
214 {
215 assert(pulseChn < HW_PDB_POnDLY_COUNT);
216
217 uint32_t tmp32 = HW_PDB_POEN_RD(baseAddr);
218
219 if (enable)
220 {
221 tmp32 |= (1U << (pulseChn+BP_PDB_POEN_POEN));
222 }
223 else
224 {
225 tmp32 &= ~(1U << (pulseChn+BP_PDB_POEN_POEN));
226 }
227 HW_PDB_POEN_WR(baseAddr, tmp32);
228 }
229
230 /******************************************************************************
231 * EOF
232 *****************************************************************************/
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