tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/pdb/fsl_pdb_hal.h

   1 /*
   2  * Copyright (c) 2014, Freescale Semiconductor, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without modification,
   6  * are permitted provided that the following conditions are met:
   7  *
   8  * o Redistributions of source code must retain the above copyright notice, this list
   9  *   of conditions and the following disclaimer.
  10  *
  11  * o Redistributions in binary form must reproduce the above copyright notice, this
  12  *   list of conditions and the following disclaimer in the documentation and/or
  13  *   other materials provided with the distribution.
  14  *
  15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  16  *   contributors may be used to endorse or promote products derived from this
  17  *   software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #ifndef __FSL_PDB_HAL_H__
  32 #define __FSL_PDB_HAL_H__
  33
  34 #include <stdint.h>
  35 #include <stdbool.h>
  36 #include <assert.h>
  37 #include "fsl_device_registers.h"
  38 #include "fsl_pdb_features.h"
  39
  40 /*!
  41  * @addtogroup pdb_hal
  42  * @{
  43  */
  44
  45 /******************************************************************************
  46  * Definitions
  47  *****************************************************************************/
  48
  49 /*!
  50  * @brief PDB status return codes.
  51  */
  52 typedef enum _pdb_status
  53 {
  54     kStatus_PDB_Success = 0U, /*!< Success. */
  55     kStatus_PDB_InvalidArgument = 1U, /*!< Invalid argument existed. */
  56     kStatus_PDB_Failed = 2U /*!< Execution failed. */
  57 } pdb_status_t;
  58
  59 /*!
  60  * @brief Defines the type of value load mode for the PDB module.
  61  *
  62  * Some timing related registers, such as the MOD, IDLY, CHnDLYm, INTx and POyDLY,
  63  * buffer the setting values. Only the load operation is triggered.
  64  * The setting value is loaded from a buffer and takes effect. There are
  65  * four loading modes to fit different applications.
  66  */
  67 typedef enum _pdb_load_mode
  68 {
  69     kPdbLoadImmediately = 0U,
  70         /*!<  Loaded immediately after load operation. */
  71     kPdbLoadAtModuloCounter = 1U,
  72         /*!< Loaded when counter hits the modulo after load operation. */
  73     kPdbLoadAtNextTrigger = 2U,
  74         /*!< Loaded when detecting an input trigger after load operation. */
  75     kPdbLoadAtModuloCounterOrNextTrigger = 3U
  76         /*!< Loaded when counter hits the modulo or detecting an input trigger after load operation. */
  77 } pdb_load_mode_t;
  78
  79 /*!
  80  * @brief Defines the type of prescaler divider for the PDB counter clock.
  81  */
  82 typedef enum _pdb_clk_prescaler_div_mode
  83 {
  84     kPdbClkPreDivBy1   = 0U, /*!< Counting divided by multiplication factor selected by MULT. */
  85     kPdbClkPreDivBy2   = 1U, /*!< Counting divided by multiplication factor selected by 2 times ofMULT. */
  86     kPdbClkPreDivBy4   = 2U, /*!< Counting divided by multiplication factor selected by 4 times ofMULT. */
  87     kPdbClkPreDivBy8   = 3U, /*!< Counting divided by multiplication factor selected by 8 times ofMULT. */
  88     kPdbClkPreDivBy16  = 4U, /*!< Counting divided by multiplication factor selected by 16 times ofMULT. */
  89     kPdbClkPreDivBy32  = 5U, /*!< Counting divided by multiplication factor selected by 32 times ofMULT. */
  90     kPdbClkPreDivBy64  = 6U, /*!< Counting divided by multiplication factor selected by 64 times ofMULT. */
  91     kPdbClkPreDivBy128 = 7U, /*!< Counting divided by multiplication factor selected by 128 times ofMULT. */
  92 } pdb_clk_prescaler_div_mode_t;
  93
  94 /*!
  95  * @brief Defines the type of trigger source mode for the PDB.
  96  *
  97  * Selects the trigger input source for the PDB. The trigger input source can
  98  * be internal or external (EXTRG pin), or the software trigger.
  99  */
 100 typedef enum _pdb_trigger_src_mode
 101 {
 102     kPdbTrigger0  = 0U,  /*!< Select trigger-In 0. */
 103     kPdbTrigger1  = 1U,  /*!< Select trigger-In 1. */
 104     kPdbTrigger2  = 2U,  /*!< Select trigger-In 2. */
 105     kPdbTrigger3  = 3U,  /*!< Select trigger-In 3. */
 106     kPdbTrigger4  = 4U,  /*!< Select trigger-In 4. */
 107     kPdbTrigger5  = 5U,  /*!< Select trigger-In 5. */
 108     kPdbTrigger6  = 6U,  /*!< Select trigger-In 6. */
 109     kPdbTrigger7  = 7U,  /*!< Select trigger-In 7. */
 110     kPdbTrigger8  = 8U,  /*!< Select trigger-In 8. */
 111     kPdbTrigger9  = 9U,  /*!< Select trigger-In 8. */
 112     kPdbTrigger10 = 10U, /*!< Select trigger-In 10. */
 113     kPdbTrigger11 = 11U, /*!< Select trigger-In 11. */
 114     kPdbTrigger12 = 12U, /*!< Select trigger-In 12. */
 115     kPdbTrigger13 = 13U, /*!< Select trigger-In 13. */
 116     kPdbTrigger14 = 14U, /*!< Select trigger-In 14. */
 117     kPdbSoftTrigger = 15U, /*!< Select software trigger. */
 118 } pdb_trigger_src_mode_t;
 119
 120 /*!
 121  * @brief Defines the type of the multiplication source mode for PDB.
 122  *
 123  * Selects the multiplication factor of the prescaler divider for the PDB counter clock.
 124  */
 125 typedef enum _pdb_mult_factor_mode
 126 {
 127     kPdbMultFactorAs1  = 0U, /*!< Multiplication factor is 1. */
 128     kPdbMultFactorAs10 = 1U, /*!< Multiplication factor is 10. */
 129     kPdbMultFactorAs20 = 2U, /*!< Multiplication factor is 20. */
 130     kPdbMultFactorAs40 = 3U  /*!< Multiplication factor is 40. */
 131 } pdb_mult_factor_mode_t;
 132
 133 #if defined(__cplusplus)
 134 extern "C" {
 135 #endif
 136
 137 /*******************************************************************************
 138  * API
 139  ******************************************************************************/
 140
 141 /*!
 142  * @brief Resets the PDB registers to a known state.
 143  *
 144  * This function resets the PDB registers to a known state. This state is
 145  * defined in a reference manual and is power on reset value.
 146  *
 147  * @param baseAddr Register base address for the module.
 148  */
 149 void PDB_HAL_Init(uint32_t baseAddr);
 150
 151 /*!
 152  * @brief Sets the load mode for timing registers.
 153  *
 154  * This function sets the load mode for some timing registers including
 155  * MOD, IDLY, CHnDLYm, INTx and POyDLY.
 156  *
 157  * @param baseAddr Register base address for the module.
 158  * @param mode  Selection of mode, see to "pdb_load_mode_t".
 159  */
 160 static inline void PDB_HAL_SetLoadMode(uint32_t baseAddr, pdb_load_mode_t mode)
 161 {
 162     BW_PDB_SC_LDMOD(baseAddr, (uint32_t)mode);
 163 }
 164
 165 /*!
 166  * @brief Switches to enable the PDB sequence error interrupt.
 167  *
 168  * This function switches to enable the PDB sequence error interrupt.
 169  *
 170  * @param baseAddr Register base address for the module.
 171  * @param enable The switcher to assert the feature.
 172  */
 173 static inline void PDB_HAL_SetSeqErrIntCmd(uint32_t baseAddr, bool enabled)
 174 {
 175     BW_PDB_SC_PDBEIE(baseAddr, (enabled ? 1U : 0U) );
 176 }
 177
 178 /*!
 179  * @brief Triggers the DAC by software if enabled.
 180  *
 181  * If enabled, this function triggers the DAC by using software.
 182  *
 183  * @param baseAddr Register base address for the module.
 184  */
 185 static inline void PDB_HAL_SetSoftTriggerCmd(uint32_t baseAddr)
 186 {
 187     BW_PDB_SC_SWTRIG(baseAddr, 1U);
 188 }
 189
 190 /*!
 191  * @brief Switches to enable the PDB DMA support.
 192  *
 193  * This function switches to enable the PDB DMA support.
 194  *
 195  * @param baseAddr Register base address for the module.
 196  * @param enable The switcher to assert the feature.
 197  */
 198 static inline void PDB_HAL_SetDmaCmd(uint32_t baseAddr, bool enable)
 199 {
 200     BW_PDB_SC_DMAEN(baseAddr, (enable ? 1U : 0U) );
 201 }
 202
 203 /*!
 204  * @brief Sets the prescaler divider from the peripheral bus clock for the PDB.
 205  *
 206  * This function sets the prescaler divider from the peripheral bus clock for the PDB.
 207  *
 208  * @param baseAddr Register base address for the module.
 209  * @param mode Selection of mode, see to "pdb_clk_prescaler_div_mode_t".
 210  */
 211 static inline void PDB_HAL_SetPreDivMode(uint32_t baseAddr, pdb_clk_prescaler_div_mode_t mode)
 212 {
 213     BW_PDB_SC_PRESCALER(baseAddr, (uint32_t)mode);
 214 }
 215
 216 /*!
 217  * @brief Sets the trigger source mode for the PDB module.
 218  *
 219  * This function sets the trigger source mode for the PDB module.
 220  *
 221  * @param baseAddr Register base address for the module.
 222  * @param mode Selection of mode, see to "pdb_trigger_src_mode_t".
 223  */
 224 static inline void PDB_HAL_SetTriggerSrcMode(uint32_t baseAddr, pdb_trigger_src_mode_t mode)
 225 {
 226     BW_PDB_SC_TRGSEL(baseAddr, (uint32_t)mode);
 227 }
 228
 229 /*!
 230  * @brief Switches on to enable the PDB module.
 231  *
 232  * This function switches on to enable the PDB module.
 233  *
 234  * @param baseAddr Register base address for the module.
 235  */
 236 static inline void PDB_HAL_Enable(uint32_t baseAddr)
 237 {
 238     BW_PDB_SC_PDBEN(baseAddr, 1U);
 239 }
 240
 241 /*!
 242  * @brief Switches off to enable the PDB module.
 243  *
 244  * This function switches off to enable the PDB module.
 245  *
 246  * @param baseAddr Register base address for the module.
 247  */
 248 static inline void PDB_HAL_Disable(uint32_t baseAddr)
 249 {
 250     BW_PDB_SC_PDBEN(baseAddr, 0U);
 251 }
 252
 253 /*!
 254  * @brief Gets the PDB delay interrupt flag.
 255  *
 256  * This function gets the PDB delay interrupt flag.
 257  *
 258  * @param baseAddr Register base address for the module.
 259  * @return Flat status, true if the flag is set.
 260  */
 261 static inline bool PDB_HAL_GetIntFlag(uint32_t baseAddr)
 262 {
 263     return (1U == BR_PDB_SC_PDBIF(baseAddr));
 264 }
 265
 266 /*!
 267  * @brief Clears the PDB delay interrupt flag.
 268  *
 269  * This function clears PDB delay interrupt flag.
 270  *
 271  * @param baseAddr Register base address for the module.
 272  * @return Flat status, true if the flag is set.
 273  */
 274 static inline void PDB_HAL_ClearIntFlag(uint32_t baseAddr)
 275 {
 276     BW_PDB_SC_PDBIF(baseAddr, 0U);
 277 }
 278
 279 /*!
 280  * @brief Switches to enable the PDB interrupt.
 281  *
 282  * This function switches to enable the PDB interrupt.
 283  *
 284  * @param baseAddr Register base address for the module.
 285  * @param enable The switcher to assert the feature.
 286  */
 287 static inline void PDB_HAL_SetIntCmd(uint32_t baseAddr, bool enable)
 288 {
 289     BW_PDB_SC_PDBIE(baseAddr, (enable ? 1U : 0U) );
 290 }
 291
 292 /*!
 293  * @brief Sets the PDB prescaler multiplication factor.
 294  *
 295  * This function sets the PDB prescaler multiplication factor.
 296  *
 297  * @param baseAddr Register base address for the module.
 298  * @param mode Selection of mode, see to "pdb_mult_factor_mode_t".
 299  */
 300 static inline void PDB_HAL_SetPreMultFactorMode(uint32_t baseAddr,
 301     pdb_mult_factor_mode_t mode)
 302 {
 303     BW_PDB_SC_MULT(baseAddr, (uint32_t)mode);
 304 }
 305
 306 /*!
 307  * @brief Switches to enable the PDB continuous mode.
 308  *
 309  * This function switches to enable the PDB continuous mode.
 310  *
 311  * @param baseAddr Register base address for the module.
 312  * @param enable The switcher to assert the feature.
 313  */
 314 static inline void PDB_HAL_SetContinuousModeCmd(uint32_t baseAddr, bool enable)
 315 {
 316     BW_PDB_SC_CONT(baseAddr, (enable ? 1U : 0U) );
 317 }
 318
 319 /*!
 320  * @brief Loads the delay registers value for the PDB module.
 321  *
 322  * This function sets the LDOK bit and loads the delay registers value.
 323  * Writing one  to this bit updates the internal registers MOD, IDLY, CHnDLYm,
 324  * DACINTx, and POyDLY with the values written to their buffers. The MOD, IDLY,
 325  * CHnDLYm, DACINTx, and POyDLY take effect according to the load mode settings.
 326  *
 327  * After one is written to the LDOK bit, the values in the buffers of above mentioned registers
 328  * are not effective and cannot be written until the values in the
 329  * buffers are loaded into their internal registers.
 330  * The LDOK can be written only when the the PDB is enabled or as alone with it. It is
 331  * automatically cleared either when the values in the buffers are loaded into the
 332  * internal registers or when the PDB is disabled.
 333  *
 334  * @param baseAddr Register base address for the module.
 335  */
 336 static inline void PDB_HAL_SetLoadRegsCmd(uint32_t baseAddr)
 337 {
 338     BW_PDB_SC_LDOK(baseAddr, 1U);
 339 }
 340
 341 /*!
 342  * @brief Sets the modulus value for the PDB module.
 343  *
 344  * This function sets the modulus value for the PDB module.
 345  * When the counter reaches the setting value, it is automatically reset to zero.
 346  * When in continuous mode, the counter begins to increase
 347  * again.
 348  *
 349  * @param baseAddr Register base address for the module.
 350  * @param value The setting value of upper limit for PDB counter.
 351  */
 352 static inline void PDB_HAL_SetModulusValue(uint32_t baseAddr, uint32_t value)
 353 {
 354     BW_PDB_MOD_MOD(baseAddr, value);
 355 }
 356
 357 /*!
 358  * @brief Gets the modulus value for the PDB module.
 359  *
 360  * This function gets the modulus value for the PDB module.
 361  *
 362  * @param baseAddr Register base address for the module.
 363  * @return The current value of upper limit for counter.
 364  */
 365 static inline uint32_t PDB_HAL_GetModulusValue(uint32_t baseAddr)
 366 {
 367     return BR_PDB_MOD_MOD(baseAddr);
 368 }
 369
 370 /*!
 371  * @brief Gets the PDB counter value.
 372  *
 373  * This function gets the PDB counter value.
 374  *
 375  * @param baseAddr Register base address for the module.
 376  * @return The current counter value.
 377  */
 378 static inline uint32_t PDB_HAL_GetCounterValue(uint32_t baseAddr)
 379 {
 380     return BR_PDB_CNT_CNT(baseAddr);
 381 }
 382
 383 /*!
 384  * @brief Sets the interrupt delay milestone of the PDB counter.
 385  *
 386  * This function sets the interrupt delay milestone of the PDB counter.
 387  * If enabled, a PDB interrupt is generated when the counter is equal to the
 388  * setting value.
 389  *
 390  * @param baseAddr Register base address for the module.
 391  * @param value The setting value for interrupt delay milestone of PDB counter.
 392  */
 393 static inline void PDB_HAL_SetIntDelayValue(uint32_t baseAddr, uint32_t value)
 394 {
 395     BW_PDB_IDLY_IDLY(baseAddr, value);
 396 }
 397
 398 /*!
 399  * @brief Gets the current interrupt delay milestone of the PDB counter.
 400  *
 401  * This function gets the current interrupt delay milestone of the PDB counter.
 402  *
 403  * @param baseAddr Register base address for the module.
 404  * @return The current setting value for interrupt delay milestone of PDB counter.
 405  */
 406 static inline uint32_t PDB_HAL_GetIntDelayValue(uint32_t baseAddr)
 407 {
 408     return BR_PDB_IDLY_IDLY(baseAddr);
 409 }
 410
 411 /*!
 412  * @brief Switches to enable the pre-trigger back-to-back mode.
 413  *
 414  * This function switches to enable the pre-trigger back-to-back mode.
 415  *
 416  * @param baseAddr Register base address for the module.
 417  * @param chn ADC instance index for trigger.
 418  * @param preChn ADC channel group index for trigger.
 419  * @param enable Switcher to assert the feature.
 420  */
 421 void PDB_HAL_SetPreTriggerBackToBackCmd(uint32_t baseAddr, uint32_t chn, uint32_t preChn, bool enable);
 422
 423 /*!
 424  * @brief Switches to enable the pre-trigger output.
 425  *
 426  * This function switches to enable pre-trigger output.
 427  *
 428  * @param baseAddr Register base address for the module.
 429  * @param chn ADC instance index for trigger.
 430  * @param preChn ADC channel group index for trigger.
 431  * @param enable Switcher to assert the feature.
 432  */
 433 void PDB_HAL_SetPreTriggerOutputCmd(uint32_t baseAddr, uint32_t chn, uint32_t preChn, bool enable);
 434
 435 /*!
 436  * @brief Switches to enable the pre-trigger.
 437  *
 438  * This function switches to enable the pre-trigger.
 439  *
 440  * @param baseAddr Register base address for the module.
 441  * @param chn ADC instance index for trigger.
 442  * @param preChn ADC channel group index for trigger.
 443  * @param enable Switcher to assert the feature.
 444  */
 445 void PDB_HAL_SetPreTriggerCmd(uint32_t baseAddr, uint32_t chn, uint32_t preChn, bool enable);
 446
 447 /*!
 448  * @brief Gets the flag which indicates whether the PDB counter has reached the pre-trigger delay value.
 449  *
 450  * This function gets the flag which indicates the PDB counter has reached the
 451  * pre-trigger delay value.
 452  *
 453  * @param baseAddr Register base address for the module.
 454  * @param chn ADC instance index for trigger.
 455  * @param preChn ADC channel group index for trigger.
 456  * @return Flag status. True if the event is asserted.
 457  */
 458 static inline bool PDB_HAL_GetPreTriggerFlag(uint32_t baseAddr, uint32_t chn, uint32_t preChn)
 459 {
 460     assert(chn < HW_PDB_CHnC1_COUNT);
 461     assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
 462     return ( ((1U<< preChn) & BR_PDB_CHnS_CF(baseAddr, chn))? true: false);
 463 }
 464
 465 /*!
 466  * @brief Clears the flag which indicates that the PDB counter has reached the pre-trigger delay value.
 467  *
 468  * This function clears the flag which indicates that the PDB counter has reached  the
 469  * pre-trigger delay value.
 470  *
 471  * @param baseAddr Register base address for the module.
 472  * @param chn ADC instance index for trigger.
 473  * @param preChn ADC channel group index for trigger.
 474  */
 475 void PDB_HAL_ClearPreTriggerFlag(uint32_t baseAddr, uint32_t chn, uint32_t preChn);
 476
 477 /*!
 478  * @brief Gets the flag which indicates whether a sequence error is detected.
 479  *
 480  * This function gets the flag which indicates whether a sequence error is detected.
 481  *
 482  * @param baseAddr Register base address for the module.
 483  * @param chn ADC instance index for trigger.
 484  * @param preChn ADC channel group index for trigger.
 485  * @return Flag status. True if the event is asserted.
 486  */
 487 static inline bool PDB_HAL_GetPreTriggerSeqErrFlag(uint32_t baseAddr, uint32_t chn, uint32_t preChn)
 488 {
 489     assert(chn < HW_PDB_CHnC1_COUNT);
 490     assert(preChn < FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT);
 491     return ( ((1U<< preChn) & BR_PDB_CHnS_ERR(baseAddr, chn))? true: false);
 492 }
 493
 494 /*!
 495  * @brief Clears the flag which indicates that a sequence error has been detected.
 496  *
 497  * This function clears the flag which indicates that the sequence error has been detected.
 498  *
 499  * @param baseAddr Register base address for the module.
 500  * @param chn ADC instance index for trigger.
 501  * @param preChn ADC channel group index for trigger.
 502  */
 503 void PDB_HAL_ClearPreTriggerSeqErrFlag(uint32_t baseAddr, uint32_t chn, uint32_t preChn);
 504
 505 /*!
 506  * @brief Sets the pre-trigger delay value.
 507  *
 508  * This function sets the pre-trigger delay value.
 509  *
 510  * @param baseAddr Register base address for the module.
 511  * @param chn ADC instance index for trigger.
 512  * @param preChn ADC channel group index for trigger.
 513  * @param value Setting value for pre-trigger's delay value.
 514  */
 515 void PDB_HAL_SetPreTriggerDelayCount(uint32_t baseAddr, uint32_t chn, uint32_t preChn, uint32_t value);
 516
 517 /*!
 518  * @brief Switches to enable the DAC external trigger input.
 519  *
 520  * This function switches to enable the DAC external trigger input.
 521  *
 522  * @param baseAddr Register base address for the module.
 523  * @param dacChn DAC instance index for trigger.
 524  * @param value Setting value for pre-trigger's delay value.
 525  */
 526 static inline void PDB_HAL_SetDacExtTriggerInputCmd(uint32_t baseAddr, uint32_t dacChn, bool enable)
 527 {
 528     assert(dacChn < HW_PDB_DACINTCn_COUNT);
 529     BW_PDB_DACINTCn_EXT(baseAddr, dacChn, (enable ? 1U: 0U) );
 530 }
 531
 532 /*!
 533  * @brief Switches to enable the DAC external trigger input.
 534  *
 535  * This function switches to enable the DAC external trigger input.
 536  *
 537  * @param baseAddr Register base address for the module.
 538  * @param dacChn DAC instance index for trigger.
 539  * @param enable Switcher to assert the feature.
 540  */
 541 static inline void PDB_HAL_SetDacIntervalTriggerCmd(uint32_t baseAddr, uint32_t dacChn, bool enable)
 542 {
 543     assert(dacChn < HW_PDB_DACINTCn_COUNT);
 544     BW_PDB_DACINTCn_TOE(baseAddr, dacChn, (enable ? 1U: 0U) );
 545 }
 546
 547 /*!
 548  * @brief Sets the interval value for the DAC trigger.
 549  *
 550  * This function sets the interval value for the DAC trigger.
 551  *
 552  * @param baseAddr Register base address for the module.
 553  * @param dacChn DAC instance index for trigger.
 554  * @param value Setting value for DAC trigger interval.
 555  */
 556 static inline void PDB_HAL_SetDacIntervalValue(uint32_t baseAddr, uint32_t dacChn, uint32_t value)
 557 {
 558     assert(dacChn < HW_PDB_DACINTn_COUNT);
 559     BW_PDB_DACINTn_INT(baseAddr, dacChn, value);
 560 }
 561
 562 /*!
 563  * @brief Gets the interval value for the DAC trigger.
 564  *
 565  * This function gets the interval value for the DAC trigger.
 566  *
 567  * @param baseAddr Register base address for the module.
 568  * @param dacChn DAC instance index for trigger.
 569  * @return The current setting value for DAC trigger interval.
 570  */
 571 static inline uint32_t PDB_HAL_GetDacIntervalValue(uint32_t baseAddr, uint32_t dacChn)
 572 {
 573     assert(dacChn < HW_PDB_DACINTn_COUNT);
 574     return BR_PDB_DACINTn_INT(baseAddr, dacChn);
 575 }
 576
 577 /*!
 578  * @brief Switches to enable the pulse-out trigger.
 579  *
 580  * This function switches to enable the pulse-out trigger.
 581  *
 582  * @param baseAddr Register base address for the module.
 583  * @param pulseChn Pulse-out channle index for trigger.
 584  * @param enable Switcher to assert the feature.
 585  */
 586 void PDB_HAL_SetPulseOutCmd(uint32_t baseAddr, uint32_t pulseChn, bool enable);
 587
 588 /*!
 589  * @brief Sets the counter delay value for the pulse-out goes high.
 590  *
 591  * This function sets the counter delay value for the pulse-out goes high.
 592  *
 593  * @param baseAddr Register base address for the module.
 594  * @param pulseChn Pulse-out channel index for trigger.
 595  * @param value Setting value for PDB delay .
 596  */
 597 static inline void PDB_HAL_SetPulseOutDelayForHigh(uint32_t baseAddr, uint32_t pulseChn, uint32_t value)
 598 {
 599     assert(pulseChn < HW_PDB_POnDLY_COUNT);
 600     BW_PDB_POnDLY_DLY1(baseAddr, pulseChn, value);
 601 }
 602
 603 /*!
 604  * @brief Sets the counter delay value for the pulse-out goes low.
 605  *
 606  * This function sets the counter delay value for the pulse-out goes low.
 607  *
 608  * @param baseAddr Register base address for the module.
 609  * @param pulseChn Pulse-out channel index for trigger.
 610  * @param value Setting value for PDB delay .
 611  */
 612 static inline void PDB_HAL_SetPulseOutDelayForLow(uint32_t baseAddr, uint32_t pulseChn, uint32_t value)
 613 {
 614     assert(pulseChn < HW_PDB_POnDLY_COUNT);
 615     BW_PDB_POnDLY_DLY2(baseAddr, pulseChn, value);
 616 }
 617
 618 #if defined(__cplusplus)
 619 }
 620 #endif
 621
 622 /*!
 623  * @}
 624  */
 625
 626 #endif /* __FSL_PDB_HAL_H__ */
 627
 628 /******************************************************************************
 629  * EOF
 630  *****************************************************************************/
 631