tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/sai/fsl_sai_hal.c

   1 /*
   2  * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without modification,
   6  * are permitted provided that the following conditions are met:
   7  *
   8  * o Redistributions of source code must retain the above copyright notice, this list
   9  *   of conditions and the following disclaimer.
  10  *
  11  * o Redistributions in binary form must reproduce the above copyright notice, this
  12  *   list of conditions and the following disclaimer in the documentation and/or
  13  *   other materials provided with the distribution.
  14  *
  15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  16  *   contributors may be used to endorse or promote products derived from this
  17  *   software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #include "fsl_sai_hal.h"
  32
  33 /******************************************************************************
  34 *Code
  35 ******************************************************************************/
  36
  37 /*FUNCTION**********************************************************************
  38  *
  39  * Function Name : SAI_HAL_TxInit
  40  * Description   : Initialize the sai Tx register, just set the register vaule to zero.
  41  *This function just clear the register value of sai.
  42  *END**************************************************************************/
  43 void SAI_HAL_TxInit(uint32_t saiBaseAddr)
  44 {
  45     /* Software reset and FIFO reset */
  46     BW_I2S_TCSR_SR(saiBaseAddr, 1);
  47     BW_I2S_TCSR_FR(saiBaseAddr, 1);
  48     /* Clear all registers */
  49     HW_I2S_TCSR_WR(saiBaseAddr, 0);
  50     HW_I2S_TCR1_WR(saiBaseAddr, 0);
  51     HW_I2S_TCR2_WR(saiBaseAddr, 0);
  52     HW_I2S_TCR3_WR(saiBaseAddr, 0);
  53     HW_I2S_TCR4_WR(saiBaseAddr, 0);
  54     HW_I2S_TCR5_WR(saiBaseAddr, 0);
  55     HW_I2S_TMR_WR(saiBaseAddr,0);
  56 }
  57
  58 /*FUNCTION**********************************************************************
  59  *
  60  * Function Name : SAI_HAL_RxInit
  61  * Description   : Initialize the sai Rx register, just set the register vaule to zero.
  62  *This function just clear the register value of sai.
  63  *END**************************************************************************/
  64 void SAI_HAL_RxInit(uint32_t saiBaseAddr)
  65 {
  66     /* Software reset and FIFO reset */
  67     BW_I2S_RCSR_SR(saiBaseAddr, 1);
  68     BW_I2S_RCSR_FR(saiBaseAddr, 1);
  69     /* Clear all registers */
  70     HW_I2S_RCSR_WR(saiBaseAddr, 0);
  71     HW_I2S_RCR1_WR(saiBaseAddr, 0);
  72     HW_I2S_RCR2_WR(saiBaseAddr, 0);
  73     HW_I2S_RCR3_WR(saiBaseAddr, 0);
  74     HW_I2S_RCR4_WR(saiBaseAddr, 0);
  75     HW_I2S_RCR5_WR(saiBaseAddr, 0);
  76     HW_I2S_RMR_WR(saiBaseAddr,0);
  77 }
  78
  79 /*FUNCTION**********************************************************************
  80  *
  81  * Function Name : SAI_HAL_TxSetProtocol
  82  * Description   : According to the protocol type to set the registers for tx.
  83  *The protocol can be I2S left, I2S right, I2S and so on.
  84  *END**************************************************************************/
  85 void SAI_HAL_TxSetProtocol(uint32_t saiBaseAddr,sai_protocol_t protocol)
  86 {
  87     switch (protocol)
  88     {
  89         case kSaiBusI2SLeft:
  90             BW_I2S_TCR2_BCP(saiBaseAddr,1);/* Bit clock polarity */
  91             BW_I2S_TCR4_MF(saiBaseAddr,1);/* MSB transmitted fisrt */
  92             BW_I2S_TCR4_FSE(saiBaseAddr,0);/*Frame sync not early */
  93             BW_I2S_TCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left channel is high */
  94             BW_I2S_TCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
  95             break;
  96
  97         case kSaiBusI2SRight:
  98             BW_I2S_TCR2_BCP(saiBaseAddr,1);/* Bit clock polarity */
  99             BW_I2S_TCR4_MF(saiBaseAddr,1);/* MSB transmitted firsrt */
 100             BW_I2S_TCR4_FSE(saiBaseAddr,0);/*Frame sync not early */
 101             BW_I2S_TCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left chennel is high */
 102             BW_I2S_TCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 103             break;
 104
 105         case kSaiBusI2SType:
 106             BW_I2S_TCR2_BCP(saiBaseAddr,1);/*Bit clock polarity */
 107             BW_I2S_TCR4_MF(saiBaseAddr,1);/*MSB transmitted firsrt */
 108             BW_I2S_TCR4_FSE(saiBaseAddr,1);/* Frame sync one bit early */
 109             BW_I2S_TCR4_FSP(saiBaseAddr,1);/* Frame sync polarity, left channel is low */
 110             BW_I2S_TCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 111             break;
 112
 113         case kSaiBusPCMA:
 114             BW_I2S_TCR2_BCP(saiBaseAddr,0); /* Bit clock active low */
 115             BW_I2S_TCR4_MF(saiBaseAddr, 1); /* MSB transmitted first */
 116             BW_I2S_TCR4_SYWD(saiBaseAddr, 0); /* Only one bit clock in a frame sync */
 117             BW_I2S_TCR4_FSE(saiBaseAddr,1);/* Frame sync one bit early */
 118             BW_I2S_TCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left chennel is high */
 119             BW_I2S_TCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 120             break;
 121
 122         case kSaiBusPCMB:
 123             BW_I2S_TCR2_BCP(saiBaseAddr,0); /* Bit clock active high */
 124             BW_I2S_TCR4_MF(saiBaseAddr, 1); /* MSB transmitted first */
 125             BW_I2S_TCR4_FSE(saiBaseAddr,0);/* Frame sync not early */
 126             BW_I2S_TCR4_SYWD(saiBaseAddr, 0); /* Only one bit clock in a frame sync */
 127             BW_I2S_TCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left chennel is high */
 128             BW_I2S_TCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 129             break;
 130
 131         case kSaiBusAC97:
 132             BW_I2S_TCR2_BCP(saiBaseAddr,1); /* Bit clock active high */
 133             BW_I2S_TCR4_MF(saiBaseAddr,1); /* MSB transmitted first */
 134             BW_I2S_TCR4_FSE(saiBaseAddr,1);/* Frame sync one bit early */
 135             BW_I2S_TCR4_FRSZ(saiBaseAddr,12); /* There are 13 words in a frame in AC'97 */
 136             BW_I2S_TCR4_SYWD(saiBaseAddr,15); /* Length of frame sync, 16 bit transmitted in first word */
 137             BW_I2S_TCR5_W0W(saiBaseAddr,15); /* The first word have 16 bits */
 138             BW_I2S_TCR5_WNW(saiBaseAddr,19); /* Other word is 20 bits */
 139             break;
 140
 141         default:
 142             break;
 143         }
 144 }
 145
 146 /*FUNCTION**********************************************************************
 147  *
 148  * Function Name : SAI_HAL_RxSetProtocol
 149  * Description   : According to the protocol type to set the registers for rx.
 150  *The protocol can be I2S left, I2S right, I2S and so on.
 151  *END**************************************************************************/
 152 void SAI_HAL_RxSetProtocol(uint32_t saiBaseAddr,sai_protocol_t protocol)
 153 {
 154     switch (protocol)
 155     {
 156         case kSaiBusI2SLeft:
 157             BW_I2S_RCR2_BCP(saiBaseAddr,1);/* Bit clock polarity */
 158             BW_I2S_RCR4_MF(saiBaseAddr,1);/* MSB transmitted fisrt */
 159             BW_I2S_RCR4_FSE(saiBaseAddr,0);/*Frame sync one bit early */
 160             BW_I2S_RCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left channel is high */
 161             BW_I2S_RCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 162             break;
 163
 164         case kSaiBusI2SRight:
 165             BW_I2S_RCR2_BCP(saiBaseAddr,1);/* Bit clock polarity */
 166             BW_I2S_RCR4_MF(saiBaseAddr,1);/* MSB transmitted fisrt */
 167             BW_I2S_RCR4_FSE(saiBaseAddr,0);/*Frame sync one bit early */
 168             BW_I2S_RCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left chennel is high */
 169             BW_I2S_RCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 170             break;
 171
 172         case kSaiBusI2SType:
 173             BW_I2S_RCR2_BCP(saiBaseAddr,1);/*Bit clock polarity */
 174             BW_I2S_RCR4_MF(saiBaseAddr,1);/*MSB transmitted fisrt */
 175             BW_I2S_RCR4_FSE(saiBaseAddr,1);/* Frame sync one bit early */
 176             BW_I2S_RCR4_FSP(saiBaseAddr,1);/* Frame sync polarity, left channel is low */
 177             BW_I2S_RCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 178             break;
 179
 180         case kSaiBusPCMA:
 181             BW_I2S_RCR2_BCP(saiBaseAddr,0); /* Bit clock active high */
 182             BW_I2S_RCR4_MF(saiBaseAddr, 1); /* MSB transmitted first */
 183             BW_I2S_RCR4_SYWD(saiBaseAddr, 0); /* Only one bit clock in a frame sync */
 184             BW_I2S_RCR4_FSE(saiBaseAddr,1);/* Frame sync one bit early */
 185             BW_I2S_RCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left chennel is high */
 186             BW_I2S_RCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 187             break;
 188
 189         case kSaiBusPCMB:
 190             BW_I2S_RCR2_BCP(saiBaseAddr,0); /* Bit clock active high */
 191             BW_I2S_RCR4_MF(saiBaseAddr, 1); /* MSB transmitted first */
 192             BW_I2S_RCR4_FSE(saiBaseAddr,0);/* Frame sync not early */
 193             BW_I2S_RCR4_SYWD(saiBaseAddr, 0); /* Only one bit clock in a frame sync */
 194             BW_I2S_RCR4_FSP(saiBaseAddr,0);/* Frame sync polarity, left chennel is high */
 195             BW_I2S_RCR4_FRSZ(saiBaseAddr,1);/* I2S uses 2 word in a frame */
 196             break;
 197
 198         case kSaiBusAC97:
 199             BW_I2S_RCR2_BCP(saiBaseAddr,1); /* Bit clock active high */
 200             BW_I2S_RCR4_MF(saiBaseAddr,1); /* MSB transmitted first */
 201             BW_I2S_RCR4_FSE(saiBaseAddr,1);/* Frame sync one bit early */
 202             BW_I2S_RCR4_FRSZ(saiBaseAddr,12); /* There are 13 words in a frame in AC'97 */
 203             BW_I2S_RCR4_SYWD(saiBaseAddr,15); /* Length of frame sync, 16 bit transmitted in first word */
 204             BW_I2S_RCR5_W0W(saiBaseAddr,15); /* The first word have 16 bits */
 205             BW_I2S_RCR5_WNW(saiBaseAddr,19); /* Other word is 20 bits */
 206             break;
 207
 208         default:
 209             break;
 210     }
 211 }
 212
 213 /*FUNCTION**********************************************************************
 214  *
 215  * Function Name : SAI_HAL_SetMclkDiv
 216  * Description   : Set the divider from the clock source to get the master clock.
 217  *The function would compute the divider number and set the number to the registers.
 218  *END**************************************************************************/
 219 void SAI_HAL_SetMclkDiv(uint32_t saiBaseAddr, uint32_t mclk, uint32_t src_clk)
 220 {
 221     uint32_t freq = src_clk;
 222     uint16_t fract, divide;
 223     uint32_t remaind = 0;
 224     uint32_t current_remainder = 0xffffffff;
 225     uint16_t current_fract = 0;
 226     uint16_t current_divide = 0;
 227     uint32_t mul_freq = 0;
 228     uint32_t max_fract = SAI_FRACT_MAX;
 229     /*In order to prevent overflow */
 230     freq /= 10;
 231     mclk/= 10;
 232     max_fract = mclk * SAI_DIV_MAX/freq;
 233     if(max_fract > SAI_FRACT_MAX)
 234     {
 235         max_fract = SAI_FRACT_MAX;
 236     }
 237     /* Looking for the closet frequency */
 238     for (fract = 1; fract < max_fract; fract ++)
 239     {
 240         mul_freq = freq * fract;
 241         remaind = mul_freq % mclk;
 242         divide = mul_freq/mclk;
 243         /* Find the exactly frequency */
 244         if (remaind == 0)
 245         {
 246             current_fract = fract;
 247             current_divide = mul_freq/mclk;
 248             break;
 249         }
 250         /* closer to next one */
 251         if (remaind > mclk/2)
 252         {
 253             remaind = mclk - remaind;
 254             divide += 1;
 255         }
 256         /* Update the closest div and fract */
 257         if (remaind < current_remainder)
 258         {
 259             current_fract = fract;
 260             current_divide = divide;
 261             current_remainder = remaind;
 262         }
 263     }
 264     BW_I2S_MDR_DIVIDE(saiBaseAddr, current_divide -1);
 265     /* Waiting for the divider updated */
 266     while(BR_I2S_MCR_DUF(saiBaseAddr))
 267     {}
 268     BW_I2S_MDR_FRACT(saiBaseAddr, current_fract - 1);
 269     /* Waiting for the divider updated */
 270     while(BR_I2S_MCR_DUF(saiBaseAddr))
 271     {}
 272 }
 273
 274 /*FUNCTION**********************************************************************
 275  *
 276  * Function Name : SAI_HAL_TxSetMasterSlave
 277  * Description   : Set the tx master or slave mode.
 278  *The slave or master mode only would affect the clock direction relevant registers.
 279  *END**************************************************************************/
 280 void SAI_HAL_TxSetMasterSlave(uint32_t saiBaseAddr, sai_master_slave_t master_slave_mode)
 281 {
 282     if (master_slave_mode == kSaiMaster)
 283     {
 284         BW_I2S_TCR2_BCD(saiBaseAddr,1);/* Bit clock generated internal */
 285         BW_I2S_TCR4_FSD(saiBaseAddr,1);/* Frame sync generated internal */
 286         BW_I2S_MCR_MOE(saiBaseAddr,1);/* Master clock generated internal */
 287     }
 288     else
 289     {
 290         BW_I2S_TCR2_BCD(saiBaseAddr,0);/* Bit clock generated external */
 291         BW_I2S_TCR4_FSD(saiBaseAddr,0);/* Frame sync generated external */
 292         BW_I2S_MCR_MOE(saiBaseAddr,0);/* Master clock generated external */
 293     }
 294 }
 295
 296 /*FUNCTION**********************************************************************
 297  *
 298  * Function Name : SAI_HAL_RxSetMasterSlave
 299  * Description   : Set the rx master or slave mode.
 300  *The slave or master mode only would affect the clock direction relevant registers.
 301  *END**************************************************************************/
 302 void SAI_HAL_RxSetMasterSlave(uint32_t saiBaseAddr, sai_master_slave_t master_slave_mode)
 303 {
 304     if (master_slave_mode == kSaiMaster)
 305     {
 306         BW_I2S_RCR2_BCD(saiBaseAddr,1);/* Bit clock generated internal */
 307         BW_I2S_RCR4_FSD(saiBaseAddr,1);/* Frame sync generated internal */
 308         BW_I2S_MCR_MOE(saiBaseAddr,1);/* Master clock generated internal */
 309     }
 310     else
 311     {
 312         BW_I2S_RCR2_BCD(saiBaseAddr,0);/* Bit clock generated external */
 313         BW_I2S_RCR4_FSD(saiBaseAddr,0);/* Frame sync generated external */
 314         BW_I2S_MCR_MOE(saiBaseAddr,0);/* Master clock generated external */
 315     }
 316 }
 317
 318 /*FUNCTION**********************************************************************
 319  *
 320  * Function Name : SAI_HAL_TxSetSyncMode
 321  * Description   : Set the tx sync mode.
 322  *Theer are four kinds of sync mode, async, sync, sync with other sai tx, sync with other sai rx.
 323  *END**************************************************************************/
 324 void SAI_HAL_TxSetSyncMode(uint32_t saiBaseAddr, sai_sync_mode_t sync_mode)
 325 {
 326     switch (sync_mode)
 327     {
 328         case kSaiModeAsync:
 329             BW_I2S_TCR2_SYNC(saiBaseAddr,0);
 330             break;
 331         case kSaiModeSync:
 332             BW_I2S_TCR2_SYNC(saiBaseAddr,1);
 333             BW_I2S_RCR2_SYNC(saiBaseAddr,0);/* Receiver must be async mode */
 334             break;
 335         case kSaiModeSyncWithOtherTx:
 336             BW_I2S_TCR2_SYNC(saiBaseAddr,2);
 337             break;
 338         case kSaiModeSyncWithOtherRx:
 339             BW_I2S_TCR2_SYNC(saiBaseAddr,3);
 340             break;
 341         default:
 342             break;
 343     }
 344 }
 345
 346 /*FUNCTION**********************************************************************
 347  *
 348  * Function Name : SAI_HAL_RxSetSyncMode
 349  * Description   : Set the rx sync mode.
 350  *Theer are four kinds of sync mode, async, sync, sync with other sai tx, sync with other sai rx.
 351  *END**************************************************************************/
 352 void SAI_HAL_RxSetSyncMode(uint32_t saiBaseAddr,sai_sync_mode_t sync_mode)
 353 {
 354     switch (sync_mode)
 355     {
 356         case kSaiModeAsync:
 357             BW_I2S_RCR2_SYNC(saiBaseAddr,0);
 358             break;
 359         case kSaiModeSync:
 360             BW_I2S_RCR2_SYNC(saiBaseAddr,1);
 361             BW_I2S_TCR2_SYNC(saiBaseAddr,0);/* Receiver must be async mode */
 362             break;
 363         case kSaiModeSyncWithOtherTx:
 364             BW_I2S_RCR2_SYNC(saiBaseAddr,3);
 365             break;
 366         case kSaiModeSyncWithOtherRx:
 367             BW_I2S_RCR2_SYNC(saiBaseAddr,2);
 368             break;
 369         default:
 370             break;
 371     }
 372 }
 373
 374 /*FUNCTION**********************************************************************
 375  *
 376  * Function Name : SAI_HAL_TxSetIntCmd
 377  * Description   : Enable the interrupt request source for tx.
 378  *The source can be word start, sync error, FIFO empty, FIFO error and FIFO request.
 379  *END**************************************************************************/
 380 void SAI_HAL_TxSetIntCmd(uint32_t saiBaseAddr, sai_interrupt_request_t source, bool enable)
 381 {
 382     switch (source)
 383     {
 384         case kSaiIntrequestWordStart:
 385             BW_I2S_TCSR_WSIE(saiBaseAddr, enable);
 386             break;
 387         case kSaiIntrequestSyncError:
 388             BW_I2S_TCSR_SEIE(saiBaseAddr, enable);
 389             break;
 390         case kSaiIntrequestFIFOWarning:
 391             BW_I2S_TCSR_FWIE(saiBaseAddr, enable);
 392             break;
 393         case kSaiIntrequestFIFOError:
 394             BW_I2S_TCSR_FEIE(saiBaseAddr, enable);
 395             break;
 396         case kSaiIntrequestFIFORequest:
 397             BW_I2S_TCSR_FRIE(saiBaseAddr, enable);
 398             break;
 399         default:
 400             break;
 401     }
 402 }
 403
 404 /*FUNCTION**********************************************************************
 405  *
 406  * Function Name : SAI_HAL_RxSetIntCmd
 407  * Description   : Enable the interrupt request source for rx.
 408  *The source can be word start, sync error, FIFO empty, FIFO error and FIFO request.
 409  *END**************************************************************************/
 410 void SAI_HAL_RxSetIntCmd(uint32_t saiBaseAddr,sai_interrupt_request_t source,bool enable)
 411 {
 412     switch(source)
 413     {
 414         case kSaiIntrequestWordStart:
 415             BW_I2S_RCSR_WSIE(saiBaseAddr, enable);
 416             break;
 417         case kSaiIntrequestSyncError:
 418             BW_I2S_RCSR_SEIE(saiBaseAddr, enable);
 419             break;
 420         case kSaiIntrequestFIFOWarning:
 421             BW_I2S_RCSR_FWIE(saiBaseAddr, enable);
 422             break;
 423         case kSaiIntrequestFIFOError:
 424             BW_I2S_RCSR_FEIE(saiBaseAddr, enable);
 425             break;
 426         case kSaiIntrequestFIFORequest:
 427             BW_I2S_RCSR_FRIE(saiBaseAddr, enable);
 428             break;
 429         default:
 430             break;
 431     }
 432 }
 433
 434 /*FUNCTION**********************************************************************
 435  *
 436  * Function Name : SAI_HAL_TxGetIntCmd
 437  * Description   : Gets state of tx interrupt source.
 438  *The source can be word start, sync error, FIFO empty, FIFO error and FIFO request.
 439  *END**************************************************************************/
 440 bool SAI_HAL_TxGetIntCmd(uint32_t saiBaseAddr, sai_interrupt_request_t source)
 441 {
 442     bool ret = false;
 443     switch (source)
 444     {
 445         case kSaiIntrequestWordStart:
 446             ret = BR_I2S_TCSR_WSIE(saiBaseAddr);
 447             break;
 448         case kSaiIntrequestSyncError:
 449             ret = BR_I2S_TCSR_SEIE(saiBaseAddr);
 450             break;
 451         case kSaiIntrequestFIFOWarning:
 452             ret = BR_I2S_TCSR_FWIE(saiBaseAddr);
 453             break;
 454         case kSaiIntrequestFIFOError:
 455             ret = BR_I2S_TCSR_FEIE(saiBaseAddr);
 456             break;
 457         case kSaiIntrequestFIFORequest:
 458             ret = BR_I2S_TCSR_FRIE(saiBaseAddr);
 459             break;
 460         default:
 461             break;
 462     }
 463     return ret;
 464 }
 465
 466 /*FUNCTION**********************************************************************
 467  *
 468  * Function Name : SAI_HAL_RxGetIntCmd
 469  * Description   : Gets state of rx interrupt source.
 470  *The source can be word start, sync error, FIFO empty, FIFO error and FIFO request.
 471  *END**************************************************************************/
 472 bool SAI_HAL_RxGetIntCmd(uint32_t saiBaseAddr,sai_interrupt_request_t source)
 473 {
 474     bool ret = false;
 475     switch(source)
 476     {
 477         case kSaiIntrequestWordStart:
 478             ret = BR_I2S_RCSR_WSIE(saiBaseAddr);
 479             break;
 480         case kSaiIntrequestSyncError:
 481             ret = BR_I2S_RCSR_SEIE(saiBaseAddr);
 482             break;
 483         case kSaiIntrequestFIFOWarning:
 484             ret = BR_I2S_RCSR_FWIE(saiBaseAddr);
 485             break;
 486         case kSaiIntrequestFIFOError:
 487             ret = BR_I2S_RCSR_FEIE(saiBaseAddr);
 488             break;
 489         case kSaiIntrequestFIFORequest:
 490             ret= BR_I2S_RCSR_FRIE(saiBaseAddr);
 491             break;
 492         default:
 493             break;
 494     }
 495     return ret;
 496 }
 497
 498 /*FUNCTION**********************************************************************
 499  *
 500  * Function Name : SAI_HAL_TxSetDmaCmd
 501  * Description   : Enable the dma request source for tx.
 502  *The source can be FIFO empty or FIFO request.
 503  *END**************************************************************************/
 504 void SAI_HAL_TxSetDmaCmd(uint32_t saiBaseAddr, sai_dma_request_t source, bool enable)
 505 {
 506     switch (source)
 507     {
 508         case kSaiDmaReqFIFOWarning:
 509             BW_I2S_TCSR_FWDE(saiBaseAddr, enable);
 510             break;
 511         case kSaiDmaReqFIFORequest:
 512             BW_I2S_TCSR_FRDE(saiBaseAddr, enable);
 513             break;
 514         default:
 515             break;
 516     }
 517 }
 518
 519 /*FUNCTION**********************************************************************
 520  *
 521  * Function Name : SAI_HAL_RxSetDmaCmd
 522  * Description   : Enable the dma request source for rx.
 523  *The source can be FIFO empty or FIFO request.
 524  *END**************************************************************************/
 525 void SAI_HAL_RxSetDmaCmd(uint32_t saiBaseAddr,sai_dma_request_t source,bool enable)
 526 {
 527     switch (source)
 528     {
 529         case kSaiDmaReqFIFOWarning:
 530             BW_I2S_RCSR_FWDE(saiBaseAddr,enable);
 531             break;
 532         case kSaiDmaReqFIFORequest:
 533             BW_I2S_RCSR_FRDE(saiBaseAddr,enable);
 534             break;
 535         default:
 536             break;
 537     }
 538 }
 539
 540 /*FUNCTION**********************************************************************
 541  *
 542  * Function Name : SAI_HAL_TxGetDmaCmd
 543  * Description   : Gets state of tx dma request source.
 544  *The source can be FIFO empty or FIFO request.
 545  *END**************************************************************************/
 546 bool SAI_HAL_TxGetDmaCmd(uint32_t saiBaseAddr, sai_dma_request_t source)
 547 {
 548     bool ret = false;
 549     switch (source)
 550     {
 551         case kSaiDmaReqFIFOWarning:
 552             ret = BR_I2S_TCSR_FWDE(saiBaseAddr);
 553             break;
 554         case kSaiDmaReqFIFORequest:
 555             ret = BR_I2S_TCSR_FRDE(saiBaseAddr);
 556             break;
 557         default:
 558             break;
 559     }
 560     return ret;
 561 }
 562
 563 /*FUNCTION**********************************************************************
 564  *
 565  * Function Name : SAI_HAL_RxGetDmaCmd
 566  * Description   : Gets state of rx dma request source.
 567  *The source can be FIFO empty or FIFO request.
 568  *END**************************************************************************/
 569 bool SAI_HAL_RxGetDmaCmd(uint32_t saiBaseAddr,sai_dma_request_t source)
 570 {
 571     bool ret = false;
 572     switch (source)
 573     {
 574         case kSaiDmaReqFIFOWarning:
 575             ret = BR_I2S_RCSR_FWDE(saiBaseAddr);
 576             break;
 577         case kSaiDmaReqFIFORequest:
 578             ret = BR_I2S_RCSR_FRDE(saiBaseAddr);
 579             break;
 580         default:
 581             break;
 582     }
 583     return ret;
 584 }
 585
 586 /*FUNCTION**********************************************************************
 587  *
 588  * Function Name : SAI_HAL_TxClearStateFlag
 589  * Description   : Clear the state flag of tx registers.
 590  *The state flag incudes word start flag, sync error flag and fifo error flag.
 591  *END**************************************************************************/
 592 void SAI_HAL_TxClearStateFlag(uint32_t saiBaseAddr, sai_state_flag_t flag)
 593 {
 594     switch (flag)
 595     {
 596         case kSaiStateFlagWordStart:
 597             BW_I2S_TCSR_WSF(saiBaseAddr,1);/* Write logic 1 to clear this bit */
 598             break;
 599         case kSaiStateFlagSyncError:
 600             BW_I2S_TCSR_SEF(saiBaseAddr,1);/* Write logic 1 to clear this bit */
 601             break;
 602         case kSaiStateFlagFIFOError:
 603             BW_I2S_TCSR_FEF(saiBaseAddr,1);/* Write logic 1 to clear this bit */
 604             break;
 605         case kSaiStateFlagSoftReset:
 606             BW_I2S_TCSR_SR(saiBaseAddr, 0);
 607             break;
 608         default:
 609             break;
 610     }
 611 }
 612
 613 /*FUNCTION**********************************************************************
 614  *
 615  * Function Name : SAI_HAL_RxClearStateFlag
 616  * Description   : Clear the state flag of rx registers.
 617  *The state flag incudes word start flag, sync error flag and fifo error flag.
 618  *END**************************************************************************/
 619 void SAI_HAL_RxClearStateFlag(uint32_t saiBaseAddr,sai_state_flag_t flag)
 620 {
 621     switch (flag)
 622     {
 623         case kSaiStateFlagWordStart:
 624             BW_I2S_RCSR_WSF(saiBaseAddr,1);/* Write logic 1 to clear this bit */
 625             break;
 626         case kSaiStateFlagSyncError:
 627             BW_I2S_RCSR_SEF(saiBaseAddr,1);/* Write logic 1 to clear this bit */
 628             break;
 629         case kSaiStateFlagFIFOError:
 630             BW_I2S_RCSR_FEF(saiBaseAddr,1);/* Write logic 1 to clear this bit */
 631             break;
 632         case kSaiStateFlagSoftReset:
 633             BW_I2S_RCSR_SR(saiBaseAddr, 0);
 634             break;
 635         default:
 636             break;
 637     }
 638 }
 639
 640 /*FUNCTION**********************************************************************
 641  *
 642  * Function Name : SAI_HAL_TxSetReset
 643  * Description   : Reset tx according to reset mode.
 644  *The reset mode can be software reset and FIFO reset.
 645  *END**************************************************************************/
 646 void SAI_HAL_TxSetReset(uint32_t saiBaseAddr, sai_reset_type_t type)
 647 {
 648     switch (type)
 649     {
 650         case kSaiResetTypeSoftware:
 651             BW_I2S_TCSR_SR(saiBaseAddr,1);
 652             break;
 653         case kSaiResetTypeFIFO:
 654             BW_I2S_TCSR_FR(saiBaseAddr, 1);
 655             break;
 656         default:
 657             break;
 658     }
 659 }
 660
 661 /*FUNCTION**********************************************************************
 662  *
 663  * Function Name : SAI_HAL_RxSetReset
 664  * Description   : Reset rx according to reset mode.
 665  *The reset mode can be software reset and FIFO reset.
 666  *END**************************************************************************/
 667 void SAI_HAL_RxSetReset(uint32_t saiBaseAddr,sai_reset_type_t type)
 668 {
 669     switch (type)
 670     {
 671         case kSaiResetTypeSoftware:
 672             BW_I2S_RCSR_SR(saiBaseAddr,1);
 673             break;
 674         case kSaiResetTypeFIFO:
 675             BW_I2S_RCSR_FR(saiBaseAddr, 1);
 676             break;
 677         default:
 678             break;
 679     }
 680 }
 681
 682 /*FUNCTION**********************************************************************
 683  *
 684  * Function Name : SAI_HAL_TxSetRunModeCmd
 685  * Description   : Set the work mode for tx.
 686  *The work mode have stop mode, debug mode and normal mode.
 687  *END**************************************************************************/
 688 void SAI_HAL_TxSetRunModeCmd(uint32_t saiBaseAddr, sai_run_mode_t run_mode, bool enable)
 689 {
 690     switch (run_mode)
 691     {
 692         case kSaiRunModeStop:
 693             BW_I2S_TCSR_STOPE(saiBaseAddr, enable);/* Stop mode */
 694             break;
 695         case kSaiRunModeDebug:
 696             BW_I2S_TCSR_DBGE(saiBaseAddr, enable);/* Debug mode */
 697             break;
 698         default:
 699             break;
 700     }
 701 }
 702
 703 /*FUNCTION**********************************************************************
 704  *
 705  * Function Name : SAI_HAL_RxSetRunModeCmd
 706  * Description   : Set the work mode for rx.
 707  *The work mode have stop mode, debug mode and normal mode.
 708  *END**************************************************************************/
 709 void SAI_HAL_RxSetRunModeCmd(uint32_t saiBaseAddr,sai_run_mode_t run_mode,bool enable)
 710 {
 711     switch (run_mode)
 712     {
 713         case kSaiRunModeStop:
 714             BW_I2S_RCSR_STOPE(saiBaseAddr, enable);/* Stop mode */
 715             break;
 716         case kSaiRunModeDebug:
 717             BW_I2S_RCSR_DBGE(saiBaseAddr, enable);/* Debug mode */
 718             break;
 719         default:
 720             break;
 721     }
 722 }
 723
 724 /*FUNCTION**********************************************************************
 725  *
 726  * Function Name : SAI_HAL_TxGetFlagState
 727  * Description   : Get the state flag value of tx.
 728  *The state flag includes fifo error, fifo warning, fifo request, software reset,
 729  * sync error and word start.
 730  *END**************************************************************************/
 731 bool SAI_HAL_TxGetStateFlag(uint32_t saiBaseAddr,sai_state_flag_t flag)
 732 {
 733     bool ret = false;
 734     switch(flag)
 735     {
 736         case kSaiStateFlagFIFOError:
 737             ret = BR_I2S_TCSR_FEF(saiBaseAddr);
 738             break;
 739         case kSaiStateFlagFIFORequest:
 740             ret = BR_I2S_TCSR_FRF(saiBaseAddr);
 741             break;
 742         case kSaiStateFlagFIFOWarning:
 743             ret = BR_I2S_TCSR_FWF(saiBaseAddr);
 744             break;
 745         case kSaiStateFlagSoftReset:
 746             ret = BR_I2S_TCSR_SR(saiBaseAddr);
 747             break;
 748         case kSaiStateFlagSyncError:
 749             ret = BR_I2S_TCSR_SEF(saiBaseAddr);
 750             break;
 751         case kSaiStateFlagWordStart:
 752             ret = BR_I2S_TCSR_WSF(saiBaseAddr);
 753             break;
 754         default:
 755             break;
 756     }
 757     return ret;
 758 }
 759
 760 /*FUNCTION**********************************************************************
 761  *
 762  * Function Name : SAI_HAL_RxGetFlagState
 763  * Description   : Get the state flag value of rx.
 764  *The state flag includes fifo error, fifo warning, fifo request, software reset,
 765  * sync error and word start.
 766  *END**************************************************************************/
 767 bool SAI_HAL_RxGetStateFlag(uint32_t saiBaseAddr,sai_state_flag_t flag)
 768 {
 769     bool ret = false;
 770     switch(flag)
 771     {
 772         case kSaiStateFlagFIFOError:
 773             ret = BR_I2S_RCSR_FEF(saiBaseAddr);
 774             break;
 775         case kSaiStateFlagFIFORequest:
 776             ret = BR_I2S_RCSR_FRF(saiBaseAddr);
 777             break;
 778         case kSaiStateFlagFIFOWarning:
 779             ret = BR_I2S_RCSR_FWF(saiBaseAddr);
 780             break;
 781         case kSaiStateFlagSoftReset:
 782             ret = BR_I2S_RCSR_SR(saiBaseAddr);
 783             break;
 784         case kSaiStateFlagSyncError:
 785             ret = BR_I2S_RCSR_SEF(saiBaseAddr);
 786             break;
 787         case kSaiStateFlagWordStart:
 788             ret = BR_I2S_RCSR_WSF(saiBaseAddr);
 789             break;
 790         default:
 791             break;
 792     }
 793     return ret;
 794 }
 795
 796 /*FUNCTION**********************************************************************
 797  *
 798  * Function Name : SAI_HAL_ReceiveDataBlocking
 799  * Description   : Receive data in blocking way.
 800  *The sending would wait until there is vaild data in FIFO for reading.
 801  *END**************************************************************************/
 802 uint32_t SAI_HAL_ReceiveDataBlocking(uint32_t saiBaseAddr,uint32_t rx_channel)
 803 {
 804     assert(rx_channel < FSL_FEATURE_SAI_CHANNEL_COUNT);
 805     /* Wait while fifo is empty */
 806     uint8_t w_ptr = BR_I2S_RFRn_WFP(saiBaseAddr,rx_channel);
 807     uint8_t r_ptr = BR_I2S_RFRn_RFP(saiBaseAddr,rx_channel);
 808     while(w_ptr == r_ptr)
 809     {
 810         w_ptr = BR_I2S_RFRn_WFP(saiBaseAddr,rx_channel);
 811         r_ptr = BR_I2S_RFRn_RFP(saiBaseAddr,rx_channel);
 812     }
 813     return BR_I2S_RDRn_RDR(saiBaseAddr,rx_channel);
 814 }
 815
 816 /*FUNCTION**********************************************************************
 817  *
 818  * Function Name : SAI_HAL_SendDataBlocking
 819  * Description   : Send data in blocking way.
 820  *The sending would wait until there is space for writing.
 821  *END**************************************************************************/
 822 void SAI_HAL_SendDataBlocking(uint32_t saiBaseAddr,uint32_t tx_channel,uint32_t data)
 823 {
 824     assert(tx_channel < FSL_FEATURE_SAI_CHANNEL_COUNT);
 825     /* Wait while fifo is full */
 826     uint8_t w_ptr = BR_I2S_TFRn_WFP(saiBaseAddr,tx_channel);
 827     uint8_t r_ptr = BR_I2S_TFRn_RFP(saiBaseAddr,tx_channel);
 828     while((w_ptr ^ r_ptr) == 0x8)
 829     {
 830         w_ptr = BR_I2S_TFRn_WFP(saiBaseAddr,tx_channel);
 831         r_ptr = BR_I2S_TFRn_RFP(saiBaseAddr,tx_channel);
 832     }
 833     BW_I2S_TDRn_TDR(saiBaseAddr, tx_channel, data);
 834 }
 835