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31 #ifndef __FSL_SAI_HAL_H__
32 #define __FSL_SAI_HAL_H__
38 #include "fsl_device_registers.h"
39 #include "fsl_sai_features.h"
49 /*******************************************************************************
51 ******************************************************************************/
53 /* Define the bit limits of in a word*/
55 #define SAI_BIT_MAX 32
57 /* Define the max div and fract value for master clock divider. */
58 #define SAI_FRACT_MAX 256
59 #define SAI_DIV_MAX 4096
61 /*! @brief Define the bus type of sai */
62 typedef enum _sai_protocol
65 kSaiBusI2SRight
= 0x1,
72 /*! @brief Master or slave mode */
73 typedef enum _sai_master_slave
75 kSaiMaster
= 0x0,/*!< Master mode */
76 kSaiSlave
= 0x1/*!< Slave mode */
79 /*! @brief Polarity of SAI clock. */
80 typedef enum _sai_clk_polarity
82 kSaiClkPolarityHigh
= 0x0, /*!< Clock active high */
83 kSaiClkPolarityLow
= 0x1 /*!< Clock active low */
86 /*! @brief Clock generate direction. */
87 typedef enum _sai_clk_direction
89 kSaiClkInternal
= 0x0, /*!< Clock generated internal. */
90 kSaiClkExternal
= 0x1 /*!< Clock generated external. */
91 } sai_clk_direction_t
;
93 /*! @brief Data transfer polarity, means MSB first of LSB first.*/
94 typedef enum _sai_data_order
96 kSaiLSBFirst
= 0x0, /*!< Least significant bit transferred first. */
97 kSaiMSBFirst
= 0x1 /*!< Most significant bit transferred first. */
100 /*! @brief Synchronous or asynchronous mode */
101 typedef enum _sai_sync_mode
103 kSaiModeAsync
= 0x0,/*!< Asynchronous mode */
104 kSaiModeSync
= 0x1,/*!< Synchronous mode (with receiver or transmit) */
105 kSaiModeSyncWithOtherTx
= 0x2,/*!< Synchronous with another SAI transmit */
106 kSaiModeSyncWithOtherRx
= 0x3/*!< Synchronous with another SAI receiver */
109 /*! @brief Mater clock source */
110 typedef enum _sai_mclk_source
112 kSaiMclkSourceSysclk
= 0x0,/*!< Master clock from the system clock */
113 kSaiMclkSourceSelect1
= 0x1,/*!< Master clock from source 1 */
114 kSaiMclkSourceSelect2
= 0x2,/*!< Master clock from source 2 */
115 kSaiMclkSourceSelect3
= 0x3/*!< Master clock from source 3 */
118 /*! @brief Bit clock source */
119 typedef enum _sai_bclk_source
121 kSaiBclkSourceBusclk
= 0x0,/*!< Bit clock using bus clock */
122 kSaiBclkSourceMclkDiv
= 0x1,/*!< Bit clock using master clock divider */
123 kSaiBclkSourceOtherSai0
= 0x2,/*!< Bit clock from other SAI device */
124 kSaiBclkSourceOtherSai1
= 0x3/*!< Bit clock from other SAI device */
127 /*! @brief The SAI state flag. */
128 typedef enum _sai_interrupt_request
130 kSaiIntrequestWordStart
= 0x0,/*!< Word start flag, means the first word in a frame detected */
131 kSaiIntrequestSyncError
= 0x1,/*!< Sync error flag, means the sync error is detected */
132 kSaiIntrequestFIFOWarning
= 0x2,/*!< FIFO warning flag, means the FIFO is empty */
133 kSaiIntrequestFIFOError
= 0x3,/*!< FIFO error flag */
134 kSaiIntrequestFIFORequest
= 0x4/*!< FIFO request, means reached watermark */
135 } sai_interrupt_request_t
;
138 /*! @brief The DMA request sources */
139 typedef enum _sai_dma_request
141 kSaiDmaReqFIFOWarning
= 0x0,/*!< FIFO warning caused by the DMA request */
142 kSaiDmaReqFIFORequest
= 0x1/*!< FIFO request caused by the DMA request */
145 /*! @brief The SAI state flag */
146 typedef enum _sai_state_flag
148 kSaiStateFlagWordStart
= 0x0,/*!< Word start flag, means the first word in a frame detected. */
149 kSaiStateFlagSyncError
= 0x1,/*!< Sync error flag, means the sync error is detected */
150 kSaiStateFlagFIFOError
= 0x2,/*!< FIFO error flag */
151 kSaiStateFlagFIFORequest
= 0x3,
152 kSaiStateFlagFIFOWarning
= 0x4,
153 kSaiStateFlagSoftReset
= 0x5 /*!< Software reset flag */
156 /*! @brief The reset type */
157 typedef enum _sai_reset_type
159 kSaiResetTypeSoftware
= 0x0,/*!< Software reset, reset the logic state */
160 kSaiResetTypeFIFO
= 0x1/*!< FIFO reset, reset the FIFO read and write pointer */
164 * @brief The SAI running mode
165 * The mode includes normal mode, debug mode, and stop mode.
167 typedef enum _sai_running_mode
169 kSaiRunModeDebug
= 0x0,/*!< In debug mode */
170 kSaiRunModeStop
= 0x1/*!< In stop mode */
173 #if FSL_FEATURE_SAI_HAS_FIFO_PACKING
176 * @brief The SAI packing mode
177 * The mode includes 8 bit and 16 bit packing.
179 typedef enum _sai_fifo_packing
181 kSaiFifoPackingDisabled
= 0x0, /*!< Packing disabled. */
182 kSaiFifoPacking8bit
= 0x2,/*!< 8 bit packing enabled. */
183 kSaiFifoPacking16bit
= 0x3 /*!< 16bit packing enabled. */
184 } sai_fifo_packing_t
;
188 /*******************************************************************************
190 ******************************************************************************/
192 #if defined(__cplusplus)
197 * @name Module control
202 * @brief Initializes the SAI Tx.
204 * The initialization resets the SAI module by setting the SR bit of TCSR register.
205 * Note that the function writes 0 to every control registers.
206 * @param saiBaseAddr Register base address of SAI module.
208 void SAI_HAL_TxInit(uint32_t saiBaseAddr
);
211 * @brief Initializes the SAI Rx.
213 * The initialization resets the SAI module by setting the SR bit of RCSR register.
214 * Note that the function writes 0 to every control registers.
215 * @param saiBaseAddr Register base address of SAI module.
217 void SAI_HAL_RxInit(uint32_t saiBaseAddr
);
220 * @brief Sets Tx protocol relevant settings.
222 * The bus mode means which protocol SAI uses. It can be I2S left, right and so on. Each protocol
223 * has a different configuration on bit clock and frame sync.
224 * @param saiBaseAddr Register base address of SAI module.
225 * @param protocol The protocol selection. It can be I2S left aligned, I2S right aligned, etc.
227 void SAI_HAL_TxSetProtocol(uint32_t saiBaseAddr
, sai_protocol_t protocol
);
230 * @brief Sets Rx protocol relevant settings.
232 * The bus mode means which protocol SAI uses. It can be I2S left, right and so on. Each protocol
233 * has a different configuration on bit clock and frame sync.
234 * @param saiBaseAddr Register base address of SAI module.
235 * @param protocol The protocol selection. It can be I2S left aligned, I2S right aligned, etc.
237 void SAI_HAL_RxSetProtocol(uint32_t saiBaseAddr
, sai_protocol_t protocol
);
240 * @brief Sets master or slave mode.
242 * The function determines master or slave mode. Master mode provides its
243 * own clock and slave mode uses an external clock.
244 * @param saiBaseAddr Register base address of SAI module.
245 * @param master_slave_mode Mater or slave mode.
247 void SAI_HAL_TxSetMasterSlave(uint32_t saiBaseAddr
, sai_master_slave_t master_slave_mode
);
250 * @brief Sets master or slave mode.
252 * The function determines master or slave mode. Master mode provides its
253 * own clock and slave mode uses external clock.
254 * @param saiBaseAddr Register base address of SAI module.
255 * @param master_slave_mode Mater or slave mode.
257 void SAI_HAL_RxSetMasterSlave(uint32_t saiBaseAddr
, sai_master_slave_t master_slave_mode
);
262 * @name Master clock configuration
267 * @brief Sets the master clock source.
269 * The source of the clock is different from socs.
270 * This function sets the clock source for SAI master clock source.
271 * Master clock is used to produce the bit clock for the data transfer.
272 * @param saiBaseAddr Register base address of SAI module.
273 * @param source Mater clock source
275 static inline void SAI_HAL_SetMclkSrc(uint32_t saiBaseAddr
, sai_mclk_source_t source
)
277 BW_I2S_MCR_MICS(saiBaseAddr
,source
);
281 * @brief Gets the master clock source.
283 * The source of the clock is different from socs.
284 * This function gets the clock source for SAI master clock source.
285 * Master clock is used to produce the bit clock for the data transfer.
286 * @param saiBaseAddr Register base address of SAI module.
287 * @return Mater clock source
289 static inline uint32_t SAI_HAL_GetMclkSrc(uint32_t saiBaseAddr
)
291 return BR_I2S_MCR_MICS(saiBaseAddr
);
295 * @brief Sets the direction of the SAI master clock.
297 * This function would decides the direction of bit clock generated.
298 * @param saiBaseAddr Register base address of SAI module.
299 * @param enable True means enable, false means disable.
301 static inline void SAI_HAL_SetMclkDividerCmd(uint32_t saiBaseAddr
, bool enable
)
303 BW_I2S_MCR_MOE(saiBaseAddr
,enable
);
307 * @brief Sets the divider of the master clock.
309 * Using the divider to get the master clock frequency wanted from the source.
310 * mclk = clk_source * fract/divide. The input is the master clock frequency needed and the source clock frequency.
311 * The master clock is decided by the sample rate and the multi-clock number.
312 * Notice that mclk should less than src_clk, or it would do hang as the HW refuses to write in this situation.
313 * @param saiBaseAddr Register base address of SAI module.
314 * @param mclk Master clock frequency needed.
315 * @param src_clk The source clock frequency.
317 void SAI_HAL_SetMclkDiv(uint32_t saiBaseAddr
, uint32_t mclk
, uint32_t src_clk
);
320 * @brief Flag to see if the master clock divider is re-divided.
321 * @param saiBaseAddr Register base address of SAI module.
322 * @return True if the divider updated otherwise false.
324 static inline bool SAI_HAL_GetMclkDivUpdatingCmd(uint32_t saiBaseAddr
)
326 return BR_I2S_MCR_DUF(saiBaseAddr
);
332 * @name Bit clock configuration
337 * @brief Sets the bit clock source of Tx. It is generated by the master clock, bus clock and other devices.
339 * The function sets the source of the bit clock. The bit clock can be produced by the master
340 * clock and from the bus clock or other SAI Tx/Rx. Tx and Rx in the SAI module use the same bit
341 * clock either from Tx or Rx.
342 * @param saiBaseAddr Register base address of SAI module.
343 * @param source Bit clock source.
345 static inline void SAI_HAL_TxSetBclkSrc(uint32_t saiBaseAddr
, sai_bclk_source_t source
)
347 BW_I2S_TCR2_MSEL(saiBaseAddr
,source
);
351 * @brief Sets bit clock source of the Rx. It is generated by the master clock, bus clock and other devices.
353 * The function sets the source of the bit clock. The bit clock can be produced by the master
354 * clock, and from the bus clock or other SAI Tx/Rx. Tx and Rx in the SAI module use the same bit
355 * clock either from Tx or Rx.
356 * @param saiBaseAddr Register base address of SAI module.
357 * @param source Bit clock source.
359 static inline void SAI_HAL_RxSetBclkSrc(uint32_t saiBaseAddr
, sai_bclk_source_t source
)
361 BW_I2S_RCR2_MSEL(saiBaseAddr
,source
);
365 * @brief Gets the bit clock source of Tx. It is generated by the master clock, bus clock and other devices.
367 * The function gets the source of the bit clock. The bit clock can be produced by the master
368 * clock and from the bus clock or other SAI Tx/Rx. Tx and Rx in the SAI module use the same bit
369 * clock either from Tx or Rx.
370 * @param saiBaseAddr Register base address of SAI module.
371 * @return Bit clock source.
373 static inline uint32_t SAI_HAL_TxGetBclkSrc(uint32_t saiBaseAddr
)
375 return BR_I2S_TCR2_MSEL(saiBaseAddr
);
379 * @brief Gets bit clock source of the Rx. It is generated by the master clock, bus clock and other devices.
381 * The function gets the source of the bit clock. The bit clock can be produced by the master
382 * clock, and from the bus clock or other SAI Tx/Rx. Tx and Rx in the SAI module use the same bit
383 * clock either from Tx or Rx.
384 * @param saiBaseAddr Register base address of SAI module.
385 * @return Bit clock source.
387 static inline uint32_t SAI_HAL_RxGetBclkSrc(uint32_t saiBaseAddr
)
389 return BR_I2S_RCR2_MSEL(saiBaseAddr
);
393 * @brief Sets the Tx bit clock divider value.
395 * bclk = mclk / divider. At the same time, bclk = sample_rate * channel * bits. This means
396 * how much time is needed to transfer one bit.
397 * Notice: The function is called while the bit clock source is the master clock.
398 * @param saiBaseAddr Register base address of SAI module.
399 * @param divider The divide number of bit clock.
401 static inline void SAI_HAL_TxSetBclkDiv(uint32_t saiBaseAddr
, uint32_t divider
)
403 BW_I2S_TCR2_DIV(saiBaseAddr
,divider
/2 -1);
407 * @brief Sets the Rx bit clock divider value.
409 * bclk = mclk / divider. At the same time, bclk = sample_rate * channel * bits. This means
410 * how much time is needed to transfer one bit.
411 * Notice: The function is called while the bit clock source is the master clock.
412 * @param saiBaseAddr Register base address of SAI module.
413 * @param divider The divide number of bit clock.
415 static inline void SAI_HAL_RxSetBclkDiv(uint32_t saiBaseAddr
, uint32_t divider
)
417 BW_I2S_RCR2_DIV(saiBaseAddr
,divider
/2 -1);
421 * @brief Enables or disables the Tx bit clock.
423 * @param saiBaseAddr Register base address of SAI module.
424 * @param enable True means enable, false means disable.
426 static inline void SAI_HAL_TxSetBclkCmd(uint32_t saiBaseAddr
, bool enable
)
428 BW_I2S_TCSR_BCE(saiBaseAddr
,enable
);
432 * @brief Enables or disables the Rx bit clock.
434 * @param saiBaseAddr Register base address of SAI module.
435 * @param enable True means enable, false means disable.
437 static inline void SAI_HAL_RxSetBclkCmd(uint32_t saiBaseAddr
, bool enable
)
439 BW_I2S_RCSR_BCE(saiBaseAddr
, enable
);
443 * @brief Enables or disables the Tx bit clock input bit.
445 * @param saiBaseAddr Register base address of SAI module.
446 * @param enable True means enable, false means disable.
448 static inline void SAI_HAL_TxSetBclkInputCmd(uint32_t saiBaseAddr
, bool enable
)
450 BW_I2S_TCR2_BCI(saiBaseAddr
,enable
);
454 * @brief Enables or disables the Rx bit clock input bit.
456 * @param saiBaseAddr Register base address of SAI module.
457 * @param enable True means enable, false means disable.
459 static inline void SAI_HAL_RxSetBclkInputCmd(uint32_t saiBaseAddr
, bool enable
)
461 BW_I2S_RCR2_BCI(saiBaseAddr
,enable
);
465 * @brief Sets the Tx bit clock swap.
467 * This field swaps the bit clock used by the transmitter. When the transmitter is configured in
468 * asynchronous mode and this bit is set, the transmitter is clocked by the receiver bit clock.
469 * This allows the transmitter and receiver to share the same bit clock, but the transmitter
470 * continues to use the transmit frame sync (SAI_TX_SYNC).
471 * When the transmitter is configured in synchronous mode, the transmitter BCS field and receiver
472 * BCS field must be set to the same value. When both are set, the transmitter and receiver are both
473 * clocked by the transmitter bit clock (SAI_TX_BCLK) but use the receiver frame sync (SAI_RX_SYNC).
474 * @param saiBaseAddr Register base address of SAI module.
475 * @param enable True means swap bit closk, false means no swap.
477 static inline void SAI_HAL_TxSetSwapBclkCmd(uint32_t saiBaseAddr
, bool enable
)
479 BW_I2S_TCR2_BCS(saiBaseAddr
,enable
);
483 * @brief Sets the Rx bit clock swap.
485 * This field swaps the bit clock used by the receiver. When the receiver is configured in
486 * asynchronous mode and this bit is set, the receiver is clocked by the transmitter bit clock
487 * (SAI_TX_BCLK). This allows the transmitter and receiver to share the same bit clock, but the
488 * receiver continues to use the receiver frame sync (SAI_RX_SYNC).
489 * When the receiver is configured in synchronous mode, the transmitter BCS field and receiver BCS
490 * field must be set to the same value. When both are set, the transmitter and receiver are both
491 * clocked by the receiver bit clock (SAI_RX_BCLK) but use the transmitter frame sync (SAI_TX_SYNC).
492 * @param saiBaseAddr Register base address of SAI module.
493 * @param enable True means swap bit closk, false means no swap.
495 static inline void SAI_HAL_RxSetSwapBclkCmd(uint32_t saiBaseAddr
, bool enable
)
497 BW_I2S_RCR2_BCS(saiBaseAddr
, enable
);
501 * @brief Sets the direction of the Tx SAI bit clock.
503 * This function sets the direction of the bit clock generated.
504 * @param saiBaseAddr Register base address of SAI module.
505 * @param direction Bit clock generated internal or external.
507 static inline void SAI_HAL_TxSetBclkDir(uint32_t saiBaseAddr
, sai_clk_direction_t direction
)
509 BW_I2S_TCR2_BCD(saiBaseAddr
,direction
);
513 * @brief Sets the direction of the Rx SAI bit clock.
515 * This function sets the direction of the bit clock generated.
516 * @param saiBaseAddr Register base address of SAI module.
517 * @param direction Bit clock generated internal or external.
519 static inline void SAI_HAL_RxSetBclkDir(uint32_t saiBaseAddr
, sai_clk_direction_t direction
)
521 BW_I2S_RCR2_BCD(saiBaseAddr
,direction
);
525 * @brief Sets the polarity of the Tx SAI bit clock.
527 * @param saiBaseAddr Register base address of SAI module.
528 * @param pol Polarity of the SAI bit clock, which can be configured to active high or low.
530 static inline void SAI_HAL_TxSetBclkPolarity(uint32_t saiBaseAddr
, sai_clk_polarity_t pol
)
532 BW_I2S_TCR2_BCP(saiBaseAddr
, pol
);
536 * @brief Sets the polarity of the Rx SAI bit clock.
538 * @param saiBaseAddr Register base address of SAI module.
539 * @param pol Polarity of SAI bit clock, which can be configured to active high or low.
541 static inline void SAI_HAL_RxSetBclkPolarity(uint32_t saiBaseAddr
, sai_clk_polarity_t pol
)
543 BW_I2S_RCR2_BCP(saiBaseAddr
, pol
);
548 * @name Frame sync configuration
553 * @brief Sets the Tx frame size.
555 * The frame size means how many words are in a frame. For example 2-channel
556 * audio data, the frame size is 2, which means 2 words in a frame.
557 * @param saiBaseAddr Register base address of SAI module.
558 * @param size Words number in a frame.
560 static inline void SAI_HAL_TxSetFrameSize(uint32_t saiBaseAddr
, uint32_t size
)
562 BW_I2S_TCR4_FRSZ(saiBaseAddr
,size
-1);
566 * @brief Sets the Rx frame size.
568 * The frame size means how many words are in a frame. For example 2-channel
569 * audio data, the frame size is 2, which means 2 words in a frame.
570 * @param saiBaseAddr Register base address of SAI module.
571 * @param size Words number in a frame.
573 static inline void SAI_HAL_RxSetFrameSize(uint32_t saiBaseAddr
, uint32_t size
)
575 BW_I2S_RCR4_FRSZ(saiBaseAddr
,size
- 1);
579 * @brief Gets the Tx frame size.
581 * @param saiBaseAddr Register base address of SAI module.
583 static inline uint32_t SAI_HAL_TxGetFrameSize(uint32_t saiBaseAddr
)
585 return BR_I2S_TCR4_FRSZ(saiBaseAddr
);
589 * @brief Gets the Tx frame size.
591 * @param saiBaseAddr Register base address of SAI module.
593 static inline uint32_t SAI_HAL_RxGetFrameSize(uint32_t saiBaseAddr
)
595 return BR_I2S_RCR4_FRSZ(saiBaseAddr
);
599 * @brief Sets the Tx sync width.
601 * A sync is the number of bit clocks of a frame. The sync width cannot be longer than the
602 * length of the first word of the frame.
603 * @param saiBaseAddr Register base address of SAI module.
604 * @param width How many bit clock in a sync.
606 static inline void SAI_HAL_TxSetFrameSyncWidth(uint32_t saiBaseAddr
, uint32_t width
)
608 BW_I2S_TCR4_SYWD(saiBaseAddr
, width
-1);
612 * @brief Sets the Rx sync width.
614 * A sync is the number of bit clocks of a frame. The sync width cannot be longer than the
615 * length of the first word of the frame.
616 * @param saiBaseAddr Register base address of SAI module.
617 * @param width How many bit clock in a sync.
619 static inline void SAI_HAL_RxSetFrameSyncWidth(uint32_t saiBaseAddr
, uint32_t width
)
621 BW_I2S_RCR4_SYWD(saiBaseAddr
, width
-1);
625 * @brief Sets the polarity of the Tx frame sync.
627 * @param saiBaseAddr Register base address of SAI module.
628 * @param pol Polarity of sai frame sync, can be configured to active high or low.
630 static inline void SAI_HAL_TxSetFrameSyncPolarity(uint32_t saiBaseAddr
, sai_clk_polarity_t pol
)
632 BW_I2S_TCR4_FSP(saiBaseAddr
,pol
);
636 * @brief Sets the polarity of the Rx frame sync.
638 * @param saiBaseAddr Register base address of SAI module..
639 * @param pol Polarity of SAI frame sync, can be configured to active high or low.
641 static inline void SAI_HAL_RxSetFrameSyncPolarity(uint32_t saiBaseAddr
, sai_clk_polarity_t pol
)
643 BW_I2S_RCR4_FSP(saiBaseAddr
,pol
);
647 * @brief Sets the direction of the SAI Tx frame sync.
649 * This function sets the direction of frame sync.
650 * @param saiBaseAddr Register base address of SAI module.
651 * @param direction Frame sync generated internal or external.
653 static inline void SAI_HAL_TxSetFrameSyncDir(uint32_t saiBaseAddr
,sai_clk_direction_t direction
)
655 BW_I2S_TCR4_FSD(saiBaseAddr
,direction
);
659 * @brief Sets the direction of the SAI Rx frame sync.
661 * This function sets the direction of frame sync.
662 * @param saiBaseAddr Register base address of SAI module.
663 * @param direction Frame sync generated internal or external.
665 static inline void SAI_HAL_RxSetFrameSyncDir(uint32_t saiBaseAddr
,sai_clk_direction_t direction
)
667 BW_I2S_RCR4_FSD(saiBaseAddr
,direction
);
671 * @brief Sets the Tx data transfer order.
673 * This function sets the data transfer order. It can be set to MSB first or LSB first.
674 * @param saiBaseAddr Register base address of SAI module.
675 * @param order MSB transmit first or LSB transmit first.
677 static inline void SAI_HAL_TxSetBitOrder(uint32_t saiBaseAddr
, sai_data_order_t order
)
679 BW_I2S_TCR4_MF(saiBaseAddr
,order
);
683 * @brief Sets the Rx data transfer order.
685 * This function sets the data transfer order. It can be set to MSB first or LSB first.
686 * @param saiBaseAddr Register base address of SAI module.
687 * @param order MSB transmit first or LSB transmit first.
689 static inline void SAI_HAL_RxSetBitOrder(uint32_t saiBaseAddr
, sai_data_order_t order
)
691 BW_I2S_RCR4_MF(saiBaseAddr
,order
);
695 * @brief Tx Frame sync one bit early.
697 * @param saiBaseAddr Register base address of SAI module.
698 * @param enable True means the frame sync one bit early and false means no early.
700 static inline void SAI_HAL_TxSetFrameSyncEarlyCmd(uint32_t saiBaseAddr
, bool enable
)
702 BW_I2S_TCR4_FSE(saiBaseAddr
,enable
);
706 * @brief Rx Frame sync one bit early.
708 * @param saiBaseAddr Register base address of SAI module.
709 * @param enable True means the frame sync one bit early and false means no early.
711 static inline void SAI_HAL_RxSetFrameSyncEarlyCmd(uint32_t saiBaseAddr
, bool enable
)
713 BW_I2S_RCR4_FSE(saiBaseAddr
,enable
);
719 * @name Word configurations
724 * @brief Sets the word size for Tx.
726 * The word size means the quantization level of audio file.
727 * SAI supports the 8 bit, 16 bit, 24 bit, and 32 bit formats.
728 * @param saiBaseAddr Register base address of SAI module.
729 * @param bits How many bits in a word.
731 static inline void SAI_HAL_TxSetWordSize(uint32_t saiBaseAddr
,uint32_t bits
)
733 BW_I2S_TCR5_WNW(saiBaseAddr
,bits
-1);
737 * @brief Sets the word size for Rx.
739 * The word size means the quantization level of audio file.
740 * SAI supports 8 bit, 16 bit, 24 bit, and 32 bit formats.
741 * @param saiBaseAddr Register base address of SAI module.
742 * @param bits How many bits in a word.
744 static inline void SAI_HAL_RxSetWordSize(uint32_t saiBaseAddr
,uint32_t bits
)
746 BW_I2S_RCR5_WNW(saiBaseAddr
,bits
-1);
750 * @brief Gets the Tx word size.
751 * @param saiBaseAddr Register base address of SAI module.
753 static inline uint32_t SAI_HAL_TxGetWordSize(uint32_t saiBaseAddr
)
755 return BR_I2S_TCR5_WNW(saiBaseAddr
);
759 * @brief Gets the Rx word size.
760 * @param saiBaseAddr Register base address of SAI module.
762 static inline uint32_t SAI_HAL_RxGetWordSize(uint32_t saiBaseAddr
)
764 return BR_I2S_RCR5_WNW(saiBaseAddr
);
768 * @brief Sets the size of the first word of the Tx frame .
770 * In I2S protocol, the size of the first word is the same as the size of other words. In some protocols,
771 * for example, AC'97, the first word is not the same size as others. This function
772 * sets the length of the first word which is, in most situations, the same as others.
773 * @param saiBaseAddr Register base address of SAI module.
774 * @param size The length of frame head word.
776 static inline void SAI_HAL_TxSetFirstWordSize(uint32_t saiBaseAddr
, uint8_t size
)
778 BW_I2S_TCR5_W0W(saiBaseAddr
, size
-1);
782 * @brief Sets the size of the first word of Rx frame .
784 * In I2S protocol, the size of the first word is the same as the size of other words. In some protocols,
785 * for example, AC'97, the first word is not the same size as others. This function
786 * sets the length of the first word which is, in most situations, the same as others.
787 * @param saiBaseAddr Register base address of SAI module.
788 * @param size The length of frame head word.
790 static inline void SAI_HAL_RxSetFirstWordSize(uint32_t saiBaseAddr
, uint8_t size
)
792 BW_I2S_RCR5_W0W(saiBaseAddr
, size
-1);
796 * @brief Sets the FIFO index for the first bit data.
798 * The FIFO is 32-bit in SAI. However, not all audio data is 32-bit, but is mostly 16-bit.
799 * In this situation, the codec needs to know which bit of the FIFO marks the valid audio data.
800 * @param saiBaseAddr Register base address of SAI module.
801 * @param index First bit shifted in FIFO.
803 static inline void SAI_HAL_TxSetFirstBitShifted(uint32_t saiBaseAddr
, uint32_t index
)
805 BW_I2S_TCR5_FBT(saiBaseAddr
, index
-1);
809 * @brief Sets the index in FIFO for the first bit data.
811 * The FIFO is 32-bit in SAI. However, not all audio data is 32-bit, but is mostly 16-bit.
812 * In this situation, the codec needs to know which bit of the FIFO marks the valid audio data.
813 * @param saiBaseAddr Register base address of SAI module.
814 * @param index First bit shifted in FIFO.
816 static inline void SAI_HAL_RxSetFirstBitShifted(uint32_t saiBaseAddr
, uint32_t index
)
818 BW_I2S_RCR5_FBT(saiBaseAddr
, index
-1);
824 * @name watermark settings
829 * @brief Sets the Tx watermark value.
831 * While the value in the FIFO is less or equal to the watermark , it generates an interrupt
832 * request or a DMA request. The watermark value cannot be greater than the depth of FIFO.
833 * @param saiBaseAddr Register base address of SAI module.
834 * @param watermark Watermark value of a FIFO.
836 static inline void SAI_HAL_TxSetWatermark(uint32_t saiBaseAddr
, uint32_t watermark
)
838 BW_I2S_TCR1_TFW(saiBaseAddr
, watermark
);
842 * @brief Sets the Tx watermark value.
844 * While the value in the FIFO is more or equal to the watermark , it generates an interrupt
845 * request or a DMA request. The watermark value cannot be greater than the depth of FIFO.
846 * @param saiBaseAddr Register base address of SAI module.
847 * @param watermark Watermark value of a FIFO.
849 static inline void SAI_HAL_RxSetWatermark(uint32_t saiBaseAddr
, uint32_t watermark
)
851 BW_I2S_RCR1_RFW(saiBaseAddr
, watermark
);
855 * @brief Gets the Tx watermark value.
857 * @param saiBaseAddr Register base address of SAI module.
859 static inline uint32_t SAI_HAL_TxGetWatermark(uint32_t saiBaseAddr
)
861 return BR_I2S_TCR1_TFW(saiBaseAddr
);
865 * @brief Gets the Rx watermark value.
867 * @param saiBaseAddr Register base address of SAI module.
869 static inline uint32_t SAI_HAL_RxGetWatermark(uint32_t saiBaseAddr
)
871 return BR_I2S_RCR1_RFW(saiBaseAddr
);
877 * @brief SAI Tx sync mode setting.
879 * The mode can be asynchronous mode, synchronous, or synchronous with another SAI device.
880 * When configured for a synchronous mode of operation, the receiver must be configured for the
881 * asynchronous operation.
882 * @param saiBaseAddr Register base address of SAI module.
883 * @param sync_mode Synchronous mode or Asynchronous mode.
885 void SAI_HAL_TxSetSyncMode(uint32_t saiBaseAddr
, sai_sync_mode_t sync_mode
);
888 * @brief SAI Rx sync mode setting.
890 * The mode can be asynchronous mode, synchronous, or synchronous with another SAI device.
891 * When configured for a synchronous mode of operation, the receiver must be configured for the
892 * asynchronous operation.
893 * @param saiBaseAddr Register base address of SAI module.
894 * @param sync_mode Synchronous mode or Asynchronous mode.
896 void SAI_HAL_RxSetSyncMode(uint32_t saiBaseAddr
, sai_sync_mode_t sync_mode
);
899 * @brief Gets the Tx FIFO read pointer.
901 * It is used to determine whether the FIFO is full or empty and know how much space there is for FIFO.
902 * If read_ptr == write_ptr, the FIFO is empty. While the bit of the read_ptr and the write_ptr are
903 * equal except for the MSB, the FIFO is full.
904 * @param saiBaseAddr Register base address of SAI module.
905 * @param fifo_channel FIFO channel selected.
906 * @return FIFO read pointer value.
908 static inline uint8_t SAI_HAL_TxGetFifoReadPointer(uint32_t saiBaseAddr
, uint32_t fifo_channel
)
910 return BR_I2S_TFRn_RFP(saiBaseAddr
,fifo_channel
);
914 * @brief Gets the Rx FIFO read pointer.
916 * It is used to determine whether the FIFO is full or empty and know how much space there is for FIFO.
917 * If read_ptr == write_ptr, the FIFO is empty. While the bit of the read_ptr and the write_ptr are
918 * equal except for the MSB, the FIFO is full.
919 * @param saiBaseAddr Register base address of SAI module.
920 * @param fifo_channel FIFO channel selected.
921 * @return FIFO read pointer value.
923 static inline uint8_t SAI_HAL_RxGetFifoReadPointer(uint32_t saiBaseAddr
, uint32_t fifo_channel
)
925 return BR_I2S_RFRn_RFP(saiBaseAddr
,fifo_channel
);
929 * @brief Gets the Tx FIFO write pointer.
931 * It is used to determine whether the FIFO is full or empty and know how much space there is for FIFO.
932 * If read_ptr == write_ptr, the FIFO is empty. While the bit of the read_ptr and write_ptr are
933 * equal except for the MSB, the FIFO is full.
934 * @param saiBaseAddr Register base address of SAI module.
935 * @param fifo_channel FIFO channel selected.
936 * @return FIFO read pointer value.
938 static inline uint8_t SAI_HAL_TxGetFifoWritePointer(uint32_t saiBaseAddr
,uint32_t fifo_channel
)
940 return BR_I2S_TFRn_WFP(saiBaseAddr
,fifo_channel
);
944 * @brief Gets the Rx FIFO write pointer.
946 * It is used to determine whether the FIFO is full or empty and know how much space there is for FIFO.
947 * If read_ptr == write_ptr, the FIFO is empty. While the bit of the read_ptr and write_ptr are
948 * equal except for the MSB, the FIFO is full.
949 * @param saiBaseAddr Register base address of SAI module.
950 * @param fifo_channel FIFO channel selected.
951 * @return FIFO read pointer value.
953 static inline uint8_t SAI_HAL_RxGetFifoWritePointer(uint32_t saiBaseAddr
,uint32_t fifo_channel
)
955 return BR_I2S_RFRn_WFP(saiBaseAddr
,fifo_channel
);
959 * @brief Gets the TDR register address.
961 * This function determines the dest/src address of the DMA transfer.
962 * @param saiBaseAddr Register base address of SAI module.
963 * @param fifo_channel FIFO channel selected.
964 * @return TDR register or RDR register address
966 static inline uint32_t* SAI_HAL_TxGetFifoAddr(uint32_t saiBaseAddr
, uint32_t fifo_channel
)
968 return (uint32_t *)HW_I2S_TDRn_ADDR(saiBaseAddr
, fifo_channel
);
972 * @brief Gets the RDR register address.
974 * This function determines the dest/src address of the DMA transfer.
975 * @param saiBaseAddr Register base address of SAI module.
976 * @param fifo_channel FIFO channel selected.
977 * @return TDR register or RDR register address
979 static inline uint32_t* SAI_HAL_RxGetFifoAddr(uint32_t saiBaseAddr
, uint32_t fifo_channel
)
981 return (uint32_t *)HW_I2S_RDRn_ADDR(saiBaseAddr
, fifo_channel
);
985 * @brief Enables the SAI Tx module.
987 * Enables the Tx. This function enables both the bit clock and the transfer channel.
988 * @param saiBaseAddr Register base address of SAI module.
990 static inline void SAI_HAL_TxEnable(uint32_t saiBaseAddr
)
992 BW_I2S_TCSR_BCE(saiBaseAddr
,true);
993 BW_I2S_TCSR_TE(saiBaseAddr
,true);
997 * @brief Enables the SAI Rx module.
999 * Enables the Rx. This function enables both the bit clock and the receive channel.
1000 * @param saiBaseAddr Register base address of SAI module.
1002 static inline void SAI_HAL_RxEnable(uint32_t saiBaseAddr
)
1004 BW_I2S_RCSR_BCE(saiBaseAddr
,true);
1005 BW_I2S_RCSR_RE(saiBaseAddr
,true);
1009 * @brief Disables the Tx module.
1011 * Disables the Tx. This function disables both the bit clock and the transfer channel.
1012 * @param saiBaseAddr Register base address of SAI module.
1014 static inline void SAI_HAL_TxDisable(uint32_t saiBaseAddr
)
1016 BW_I2S_TCSR_TE(saiBaseAddr
,false);
1017 BW_I2S_TCSR_BCE(saiBaseAddr
,false);
1021 * @brief Disables the Rx module.
1023 * Disables the Rx. This function disables both the bit clock and the receive channel.
1024 * @param saiBaseAddr Register base address of SAI module.
1026 static inline void SAI_HAL_RxDisable(uint32_t saiBaseAddr
)
1028 BW_I2S_RCSR_RE(saiBaseAddr
,false);
1029 BW_I2S_RCSR_BCE(saiBaseAddr
,false);
1033 * @brief Enables the Tx interrupt from different interrupt sources.
1035 * The interrupt source can be : Word start flag, Sync error flag, FIFO error flag, FIFO warning flag, FIFO request flag.
1036 * This function sets which flag causes an interrupt request.
1037 * @param saiBaseAddr Register base address of SAI module.
1038 * @param source SAI interrupt request source.
1039 * @param enable Enable or disable.
1041 void SAI_HAL_TxSetIntCmd(uint32_t saiBaseAddr
,sai_interrupt_request_t source
, bool enable
);
1044 * @brief Enables the Rx interrupt from different interrupt sources.
1046 * The interrupt source can be : Word start flag, Sync error flag, FIFO error flag, FIFO warning flag, FIFO request flag.
1047 * This function sets which flag causes an interrupt request.
1048 * @param saiBaseAddr Register base address of SAI module.
1049 * @param source SAI interrupt request source.
1050 * @param enable Enable or disable.
1052 void SAI_HAL_RxSetIntCmd(uint32_t saiBaseAddr
,sai_interrupt_request_t source
, bool enable
);
1055 * @brief Gets the status as to whether the Tx interrupt source is enabled.
1057 * The interrupt source can be : Word start flag, Sync error flag, FIFO error flag, FIFO warning flag, FIFO request flag.
1058 * This function sets which flag causes an interrupt request.
1059 * @param saiBaseAddr Register base address of SAI module.
1060 * @param source SAI interrupt request source.
1061 * @return Enabled or disabled.
1063 bool SAI_HAL_TxGetIntCmd(uint32_t saiBaseAddr
,sai_interrupt_request_t source
);
1066 * @brief Gets the status as to whether the Rx interrupt source is enabled.
1068 * The interrupt source can be : Word start flag, Sync error flag, FIFO error flag, FIFO warning flag, FIFO request flag.
1069 * This function sets which flag causes an interrupt request.
1070 * @param saiBaseAddr Register base address of SAI module.
1071 * @param source SAI interrupt request source.
1072 * @return Enabled or disabled.
1074 bool SAI_HAL_RxGetIntCmd(uint32_t saiBaseAddr
,sai_interrupt_request_t source
);
1077 * @brief Enables the Tx DMA request from different sources.
1079 * The DMA sources can be: FIFO warning and FIFO request.
1080 * This function enables the DMA request from different DMA request sources.
1081 * @param saiBaseAddr Register base address of SAI module.
1082 * @param source SAI DMA request source.
1083 * @param enable Enable or disable.
1085 void SAI_HAL_TxSetDmaCmd(uint32_t saiBaseAddr
, sai_dma_request_t source
, bool enable
);
1088 * @brief Enables the Rx DMA request from different sources.
1090 * The DMA sources can be: FIFO warning and FIFO request.
1091 * This function enables the DMA request from different DMA request sources.
1092 * @param saiBaseAddr Register base address of SAI module.
1093 * @param source SAI DMA request source.
1094 * @param enable Enable or disable.
1096 void SAI_HAL_RxSetDmaCmd(uint32_t saiBaseAddr
, sai_dma_request_t source
, bool enable
);
1099 * @brief Gets the status whether the Tx DMA source is enabled.
1101 * The DMA sources can be: FIFO warning and FIFO request.
1102 * This function enables the DMA request from different DMA request sources.
1103 * @param saiBaseAddr Register base address of SAI module.
1104 * @param source SAI DMA request source.
1105 * @param Enable or disable.
1107 bool SAI_HAL_TxGetDmaCmd(uint32_t saiBaseAddr
, sai_dma_request_t source
);
1110 * @brief Gets the status whether the Rx DMA source is enabled.
1112 * The DMA sources can be: FIFO warning and FIFO request.
1113 * This function enables the DMA request from different DMA request sources.
1114 * @param saiBaseAddr Register base address of SAI module.
1115 * @param source SAI DMA request source.
1116 * @return Enable or disable.
1118 bool SAI_HAL_RxGetDmaCmd(uint32_t saiBaseAddr
, sai_dma_request_t source
);
1121 * @brief Clears the Tx state flags.
1123 * The function is used to clear the flags manually. It can clear word start, FIFO warning, FIFO error,
1124 * FIFO request flag.
1125 * @param saiBaseAddr Register base address of SAI module.
1126 * @param flag SAI state flag type. The flag can be word start, sync error, FIFO error/warning.
1128 void SAI_HAL_TxClearStateFlag(uint32_t saiBaseAddr
, sai_state_flag_t flag
);
1131 * @brief Clears the Rx state flags.
1133 * The function is used to clear the flags manually. It can clear word start, FIFO warning, FIFO error,
1134 * FIFO request flag.
1135 * @param saiBaseAddr Register base address of SAI module.
1136 * @param flag SAI state flag type. The flag can be word start, sync error, FIFO error/warning.
1138 void SAI_HAL_RxClearStateFlag(uint32_t saiBaseAddr
, sai_state_flag_t flag
);
1141 * @brief Resets the Tx module.
1143 * There are two kinds of resets: Software reset and FIFO reset.
1144 * Software reset: resets all transmitter internal logic, including the bit clock generation,
1145 * status flags and FIFO pointers. It does not reset the configuration registers.
1146 * FIFO reset: synchronizes the FIFO write pointer to the same value as the FIFO read pointer.
1147 * This empties the FIFO contents and is to be used after the Transmit FIFO Error Flag is set,
1148 * and before the FIFO is re-initialized and the Error Flag is cleared.
1149 * @param saiBaseAddr Register base address of SAI module.
1150 * @param type SAI reset type.
1152 void SAI_HAL_TxSetReset(uint32_t saiBaseAddr
, sai_reset_type_t type
);
1155 * @brief Resets the Rx module.
1157 * There are two kinds of resets: Software reset and FIFO reset.
1158 * Software reset: resets all transmitter internal logic, including the bit clock generation,
1159 * status flags and FIFO pointers. It does not reset the configuration registers.
1160 * FIFO reset: synchronizes the FIFO write pointer to the same value as the FIFO read pointer.
1161 * This empties the FIFO contents and is to be used after the Transmit FIFO Error Flag is set,
1162 * and before the FIFO is re-initialized and the Error Flag is cleared.
1163 * @param saiBaseAddr Register base address of SAI module.
1164 * @param type SAI reset type.
1166 void SAI_HAL_RxSetReset(uint32_t saiBaseAddr
, sai_reset_type_t type
);
1169 * @brief Sets the Tx mask word of the frame.
1171 * Each bit number represent the mask word index. For example, 0 represents mask the 0th word, 3
1172 * represents mask 0th and 1st word. The TMR register can be different from frame to frame. If the
1173 * user wants a mono audio, set the mask to 0/1.
1174 * @param saiBaseAddr Register base address of SAI module.
1175 * @param mask Which bits need to be masked in a frame.
1177 static inline void SAI_HAL_TxSetWordMask(uint32_t saiBaseAddr
, uint32_t mask
)
1179 BW_I2S_TMR_TWM(saiBaseAddr
, mask
);
1183 * @brief Sets the Rx mask word of the frame.
1185 * Each bit number represent the mask word index. For example, 0 represents mask the 0th word, 3
1186 * represents mask 0th and 1st word. The TMR register can be different from frame to frame. If the
1187 * user wants a mono audio, set the mask to 0/1.
1188 * @param saiBaseAddr Register base address of SAI module.
1189 * @param mask Which bits need to be masked in a frame.
1191 static inline void SAI_HAL_RxSetWordMask(uint32_t saiBaseAddr
, uint32_t mask
)
1193 BW_I2S_RMR_RWM(saiBaseAddr
, mask
);
1197 * @brief Sets the Tx FIFO channel.
1199 * A SAI saiBaseAddr includes a Tx and an Rx. Each has several channels according to
1200 * different platforms. A channel means a path for the audio data input/output.
1201 * @param saiBaseAddr Register base address of SAI module.
1202 * @param fifo_channel FIFO channel number.
1204 static inline void SAI_HAL_TxSetDataChn(uint32_t saiBaseAddr
, uint8_t fifo_channel
)
1206 BW_I2S_TCR3_TCE(saiBaseAddr
, 1u << fifo_channel
);
1210 * @brief Sets the Rx FIFO channel.
1212 * A SAI saiBaseAddr includes a Tx and a Rx. Each has several channels according to
1213 * different platforms. A channel means a path for the audio data input/output.
1214 * @param saiBaseAddr Register base address of SAI module.
1215 * @param fifo_channel FIFO channel number.
1217 static inline void SAI_HAL_RxSetDataChn(uint32_t saiBaseAddr
, uint8_t fifo_channel
)
1219 BW_I2S_RCR3_RCE(saiBaseAddr
, 1u << fifo_channel
);
1223 * @brief Sets the running mode of the Tx. There is a debug mode, stop mode, and a normal mode.
1225 * This function can set the working mode of the SAI saiBaseAddr. Stop mode is always
1226 * used in low power cases, and the debug mode disables the SAI after the current
1227 * transmit/receive is completed.
1228 * @param saiBaseAddr Register base address of SAI module.
1229 * @param run_mode SAI running mode.
1230 * @param enable Enable or disable a mode.
1232 void SAI_HAL_TxSetRunModeCmd(uint32_t saiBaseAddr
, sai_run_mode_t run_mode
, bool enable
);
1235 * @brief Sets the running mode of the Rx. There is a debug mode, stop mode, and a normal mode.
1237 * This function can set the working mode of the SAI saiBaseAddr. Stop mode is always
1238 * used in low power cases, and the debug mode disables the SAI after the current
1239 * transmit/receive is completed.
1240 * @param saiBaseAddr Register base address of SAI module.
1241 * @param run_mode SAI running mode.
1242 * @param enable Enable or disable a mode.
1244 void SAI_HAL_RxSetRunModeCmd(uint32_t saiBaseAddr
, sai_run_mode_t run_mode
, bool enable
);
1247 * @brief Configures at which word the start of word flag is set in the Tx.
1249 * @param saiBaseAddr Register base address of SAI module.
1250 * @param index Which word triggers word start flag.
1252 static inline void SAI_HAL_TxSetWordStartIndex(uint32_t saiBaseAddr
,uint32_t index
)
1254 assert(index
<= FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME
);
1255 BW_I2S_TCR3_WDFL(saiBaseAddr
, index
-1);
1259 * @brief Configures at which word the start of word flag is set in the Tx.
1261 * @param saiBaseAddr Register base address of SAI module.
1262 * @param index Which word triggers word start flag.
1264 static inline void SAI_HAL_RxSetWordStartIndex(uint32_t saiBaseAddr
,uint32_t index
)
1266 assert(index
<= FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME
);
1267 BW_I2S_RCR3_WDFL(saiBaseAddr
, index
-1);
1271 * @brief Gets the state of the flags in the TCSR.
1272 * @param saiBaseAddr Register base address of SAI module.
1273 * @param flag State flag type, it can be FIFO error, FIFO warning and so on.
1274 * @return True if detect word start otherwise false.
1276 bool SAI_HAL_TxGetStateFlag(uint32_t saiBaseAddr
, sai_state_flag_t flag
);
1279 * @brief Gets the state of the flags in the RCSR.
1280 * @param saiBaseAddr Register base address of SAI module.
1281 * @param flag State flag type, it can be FIFO error, FIFO warning and so on.
1282 * @return True if detect word start otherwise false.
1284 bool SAI_HAL_RxGetStateFlag(uint32_t saiBaseAddr
, sai_state_flag_t flag
);
1287 * @brief Receives the data from the FIFO.
1288 * @param saiBaseAddr Register base address of SAI module.
1289 * @param rx_channel Rx FIFO channel.
1290 * @param data Pointer to the address to be written in.
1292 static inline uint32_t SAI_HAL_ReceiveData(uint32_t saiBaseAddr
, uint32_t rx_channel
)
1294 assert(rx_channel
< FSL_FEATURE_SAI_CHANNEL_COUNT
);
1295 return HW_I2S_RDRn_RD(saiBaseAddr
, rx_channel
);
1299 * @brief Transmits data to the FIFO.
1300 * @param saiBaseAddr Register base address of SAI module.
1301 * @param tx_channel Tx FIFO channel.
1302 * @param data Data value which needs to be written into FIFO.
1304 static inline void SAI_HAL_SendData(uint32_t saiBaseAddr
, uint32_t tx_channel
, uint32_t data
)
1306 assert(tx_channel
< FSL_FEATURE_SAI_CHANNEL_COUNT
);
1307 HW_I2S_TDRn_WR(saiBaseAddr
,tx_channel
,data
);
1311 * @brief Uses blocking to receive data.
1312 * @param saiBaseAddr The SAI saiBaseAddr.
1313 * @param rx_channel Rx FIFO channel.
1314 * @return Received data.
1316 uint32_t SAI_HAL_ReceiveDataBlocking(uint32_t saiBaseAddr
, uint32_t rx_channel
);
1319 * @brief Uses blocking to send data.
1320 * @param saiBaseAddr The SAI saiBaseAddr.
1321 * @param tx_channel Tx FIFO channel.
1322 * @param data Data value which needs to be written into FIFO.
1324 void SAI_HAL_SendDataBlocking(uint32_t saiBaseAddr
, uint32_t tx_channel
, uint32_t data
);
1326 #if FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE
1328 * @brief Tx on-demand mode setting.
1330 * When set, the frame sync is generated internally. A frame sync is only generated when the
1331 * FIFO warning flag is clear.
1332 * @param saiBaseAddr Register base address of SAI module.
1333 * @param enable True means on demand mode enable, false means disable.
1335 static inline void SAI_HAL_TxSetOndemandCmd(uint32_t saiBaseAddr
, bool enable
)
1337 BW_I2S_TCR4_ONDEM(saiBaseAddr
, enable
);
1341 * @brief Rx on-demand mode setting.
1343 * When set, the frame sync is generated internally. A frame sync is only generated when the
1344 * FIFO warning flag is clear.
1345 * @param saiBaseAddr Register base address of SAI module.
1346 * @param enable True means on demand mode enable, false means disable.
1348 static inline void SAI_HAL_RxSetOndemandCmd(uint32_t saiBaseAddr
, bool enable
)
1350 BW_I2S_RCR4_ONDEM(saiBaseAddr
, enable
);
1354 #if FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
1356 * @brief Tx FIFO continues on error.
1358 * Configures when the SAI continues transmitting after a FIFO error has been detected.
1359 * @param saiBaseAddr Register base address of SAI module.
1360 * @param enable True means on demand mode enable, false means disable.
1362 static inline void SAI_HAL_TxSetFIFOErrorContinueCmd(uint32_t saiBaseAddr
, bool enable
)
1364 BW_I2S_TCR4_FCONT(saiBaseAddr
, enable
);
1368 * @brief Rx FIFO continues on error.
1370 * Configures when the SAI continues transmitting after a FIFO error has been detected.
1371 * @param saiBaseAddr Register base address of SAI module.
1372 * @param enable True means on demand mode enable, false means disable.
1374 static inline void SAI_HAL_RxSetFIFOErrorContinueCmd(uint32_t saiBaseAddr
, bool enable
)
1376 BW_I2S_RCR4_FCONT(saiBaseAddr
, enable
);
1380 #if FSL_FEATURE_SAI_HAS_FIFO_PACKING
1382 * @brief Tx FIFO packing mode setting.
1384 * Enables packing 8-bit data or 16-bit data into each 32-bit FIFO word. If the word size is
1385 * greater than 8-bit or 16-bit, only the first 8-bit or 16-bits are loaded from the FIFO.
1386 * The first word in each frame always starts with a new 32-bit FIFO word and the first bit shifted
1387 * must be configured within the first packed word. When FIFO packing is enabled, the FIFO write
1388 * pointer only increments when the full 32-bit FIFO word has been written by software.
1389 * @param saiBaseAddr Register base address of SAI module.
1390 * @param mode FIFO packing mode.
1392 static inline void SAI_HAL_TxSetFIFOPackingMode(uint32_t saiBaseAddr
, sai_fifo_packing_t mode
)
1394 BW_I2S_TCR4_FPACK(saiBaseAddr
,mode
);
1398 * @brief Rx FIFO packing mode setting.
1400 * Enables packing 8-bit data or 16-bit data into each 32-bit FIFO word. If the word size is
1401 * greater than 8-bit or 16-bit, only the first 8-bit or 16-bits are loaded from the FIFO.
1402 * The first word in each frame always starts with a new 32-bit FIFO word and the first bit shifted
1403 * must be configured within the first packed word. When FIFO packing is enabled, the FIFO write
1404 * pointer only increments when the full 32-bit FIFO word has been written by software.
1405 * @param saiBaseAddr Register base address of SAI module.
1406 * @param mode FIFO packing mode.
1408 static inline void SAI_HAL_RxSetFIFOPackingMode(uint32_t saiBaseAddr
, sai_fifo_packing_t mode
)
1410 BW_I2S_RCR4_FPACK(saiBaseAddr
,mode
);
1414 #if defined(__cplusplus)
1420 #endif /* __FSL_SAI_HAL_H__ */
1421 /*******************************************************************************
1423 *******************************************************************************/