tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/sdhc/fsl_sdhc_features.h

   1 /*
   2 ** ###################################################################
   3 **     Version:             rev. 1.0, 2014-05-14
   4 **     Build:               b140519
   5 **
   6 **     Abstract:
   7 **         Chip specific module features.
   8 **
   9 **     Copyright: 2014 Freescale Semiconductor, Inc.
  10 **     All rights reserved.
  11 **
  12 **     Redistribution and use in source and binary forms, with or without modification,
  13 **     are permitted provided that the following conditions are met:
  14 **
  15 **     o Redistributions of source code must retain the above copyright notice, this list
  16 **       of conditions and the following disclaimer.
  17 **
  18 **     o Redistributions in binary form must reproduce the above copyright notice, this
  19 **       list of conditions and the following disclaimer in the documentation and/or
  20 **       other materials provided with the distribution.
  21 **
  22 **     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  23 **       contributors may be used to endorse or promote products derived from this
  24 **       software without specific prior written permission.
  25 **
  26 **     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  27 **     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  28 **     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  29 **     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  30 **     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  31 **     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  32 **     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  33 **     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34 **     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  35 **     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36 **
  37 **     http:                 www.freescale.com
  38 **     mail:                 support@freescale.com
  39 **
  40 **     Revisions:
  41 **     - rev. 1.0 (2014-05-14)
  42 **         Customer release.
  43 **
  44 ** ###################################################################
  45 */
  46
  47 #if !defined(__FSL_SDHC_FEATURES_H__)
  48 #define __FSL_SDHC_FEATURES_H__
  49
  50 #if defined(CPU_MK24FN1M0VDC12) || defined(CPU_MK24FN1M0VLL12) || defined(CPU_MK24FN1M0VLQ12) || defined(CPU_MK63FN1M0VLQ12) || \
  51     defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK64FX512VDC12) || defined(CPU_MK64FN1M0VDC12) || defined(CPU_MK64FX512VLL12) || \
  52     defined(CPU_MK64FN1M0VLL12) || defined(CPU_MK64FX512VLQ12) || defined(CPU_MK64FN1M0VLQ12) || defined(CPU_MK64FX512VMD12) || \
  53     defined(CPU_MK64FN1M0VMD12)
  54     /* @brief Has external DMA support (register bit VENDOR[EXTDMAEN]). */
  55     #define FSL_FEATURE_SDHC_HAS_EXTERNAL_DMA_SUPPORT (1)
  56     /* @brief Has support of 3.0V voltage (register bit HTCAPBLT[VS30]). */
  57     #define FSL_FEATURE_SDHC_HAS_V300_SUPPORT (0)
  58     /* @brief Has support of 1.8V voltage (register bit HTCAPBLT[VS18]). */
  59     #define FSL_FEATURE_SDHC_HAS_V180_SUPPORT (0)
  60 #elif defined(CPU_MK65FN2M0CAC18) || defined(CPU_MK65FX1M0CAC18) || defined(CPU_MK65FN2M0VMI18) || defined(CPU_MK65FX1M0VMI18) || \
  61     defined(CPU_MK66FN2M0VLQ18) || defined(CPU_MK66FX1M0VLQ18) || defined(CPU_MK66FN2M0VMD18) || defined(CPU_MK66FX1M0VMD18)
  62     /* @brief Has external DMA support (register bit VENDOR[EXTDMAEN]). */
  63     #define FSL_FEATURE_SDHC_HAS_EXTERNAL_DMA_SUPPORT (0)
  64     /* @brief Has support of 3.0V voltage (register bit HTCAPBLT[VS30]). */
  65     #define FSL_FEATURE_SDHC_HAS_V300_SUPPORT (0)
  66     /* @brief Has support of 1.8V voltage (register bit HTCAPBLT[VS18]). */
  67     #define FSL_FEATURE_SDHC_HAS_V180_SUPPORT (0)
  68 #elif defined(CPU_MK70FN1M0VMF12) || defined(CPU_MK70FX512VMF12) || defined(CPU_MK70FN1M0VMF15) || defined(CPU_MK70FX512VMF15) || \
  69     defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FX512VMJ12) || defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15)
  70     /* @brief Has external DMA support (register bit VENDOR[EXTDMAEN]). */
  71     #define FSL_FEATURE_SDHC_HAS_EXTERNAL_DMA_SUPPORT (1)
  72     /* @brief Has support of 3.0V voltage (register bit HTCAPBLT[VS30]). */
  73     #define FSL_FEATURE_SDHC_HAS_V300_SUPPORT (1)
  74     /* @brief Has support of 1.8V voltage (register bit HTCAPBLT[VS18]). */
  75     #define FSL_FEATURE_SDHC_HAS_V180_SUPPORT (1)
  76 #else
  77     #define MBED_NO_SDHC
  78 #endif
  79
  80 #endif /* __FSL_SDHC_FEATURES_H__ */
  81
  82 /*******************************************************************************
  83  * EOF
  84  ******************************************************************************/