tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/TARGET_MTS_GAMBIT/PeripheralNames.h

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #ifndef MBED_PERIPHERALNAMES_H
  17 #define MBED_PERIPHERALNAMES_H
  18
  19 #include "cmsis.h"
  20
  21 #ifdef __cplusplus
  22 extern "C" {
  23 #endif
  24
  25 typedef enum {
  26     OSC32KCLK = 0,
  27 } RTCName;
  28
  29 typedef enum {
  30     UART_0 = 0,
  31     UART_2 = 2,
  32     UART_3 = 3,
  33     UART_5 = 5,
  34 } UARTName;
  35
  36 #define STDIO_UART_TX     USBTX
  37 #define STDIO_UART_RX     USBRX
  38 #define STDIO_UART        UART_0
  39
  40 typedef enum {
  41     I2C_0 = 0,
  42     I2C_1 = 1,
  43 } I2CName;
  44
  45
  46 #define TPM_SHIFT   8
  47 typedef enum {
  48     PWM_1  = (0 << TPM_SHIFT) | (0),  // FTM0 CH0
  49     PWM_2  = (0 << TPM_SHIFT) | (1),  // FTM0 CH1
  50     PWM_3  = (0 << TPM_SHIFT) | (2),  // FTM0 CH2
  51     PWM_4  = (0 << TPM_SHIFT) | (3),  // FTM0 CH3
  52     PWM_5  = (0 << TPM_SHIFT) | (4),  // FTM0 CH4
  53     PWM_6  = (0 << TPM_SHIFT) | (5),  // FTM0 CH5
  54     PWM_7  = (0 << TPM_SHIFT) | (6),  // FTM0 CH6
  55     PWM_8  = (0 << TPM_SHIFT) | (7),  // FTM0 CH7
  56     PWM_9  = (1 << TPM_SHIFT) | (0),  // FTM1 CH0
  57     PWM_10 = (1 << TPM_SHIFT) | (1),  // FTM1 CH1
  58     PWM_11 = (1 << TPM_SHIFT) | (2),  // FTM1 CH2
  59     PWM_12 = (1 << TPM_SHIFT) | (3),  // FTM1 CH3
  60     PWM_13 = (1 << TPM_SHIFT) | (4),  // FTM1 CH4
  61     PWM_14 = (1 << TPM_SHIFT) | (5),  // FTM1 CH5
  62     PWM_15 = (1 << TPM_SHIFT) | (6),  // FTM1 CH6
  63     PWM_16 = (1 << TPM_SHIFT) | (7),  // FTM1 CH7
  64     PWM_17 = (2 << TPM_SHIFT) | (0),  // FTM2 CH0
  65     PWM_18 = (2 << TPM_SHIFT) | (1),  // FTM2 CH1
  66     PWM_19 = (2 << TPM_SHIFT) | (2),  // FTM2 CH2
  67     PWM_20 = (2 << TPM_SHIFT) | (3),  // FTM2 CH3
  68     PWM_21 = (2 << TPM_SHIFT) | (4),  // FTM2 CH4
  69     PWM_22 = (2 << TPM_SHIFT) | (5),  // FTM2 CH5
  70     PWM_23 = (2 << TPM_SHIFT) | (6),  // FTM2 CH6
  71     PWM_24 = (2 << TPM_SHIFT) | (7),  // FTM2 CH7
  72     // could be 4 or could be 3... not sure what register
  73     //  this is for... too much abstraction
  74     PWM_25 = (3 << TPM_SHIFT) | (0),  // FTM3 CH0
  75     PWM_26 = (3 << TPM_SHIFT) | (1),  // FTM3 CH1
  76     PWM_27 = (3 << TPM_SHIFT) | (2),  // FTM3 CH2
  77     PWM_28 = (3 << TPM_SHIFT) | (3),  // FTM3 CH3
  78     PWM_29 = (3 << TPM_SHIFT) | (4),  // FTM3 CH4
  79     PWM_30 = (3 << TPM_SHIFT) | (5),  // FTM3 CH5
  80     PWM_31 = (3 << TPM_SHIFT) | (6),  // FTM3 CH6
  81     PWM_32 = (3 << TPM_SHIFT) | (7),  // FTM3 CH7
  82 } PWMName;
  83
  84
  85
  86 #define ADC_INSTANCE_SHIFT           8
  87 #define ADC_B_CHANNEL_SHIFT          5
  88 typedef enum {
  89     ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
  90     ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
  91     ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
  92     ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
  93     ADC0_SE8  = (0 << ADC_INSTANCE_SHIFT) | 8,
  94     ADC0_SE9  = (0 << ADC_INSTANCE_SHIFT) | 9,
  95     ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
  96     ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
  97     ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
  98     ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
  99     ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
 100     ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
 101     ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
 102     ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | 4,
 103     ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | 5,
 104     ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | 6,
 105     ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | 7,
 106     ADC1_SE8  = (1 << ADC_INSTANCE_SHIFT) | 8,
 107     ADC1_SE9  = (1 << ADC_INSTANCE_SHIFT) | 9,
 108     ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
 109     ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
 110     ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
 111     ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
 112     ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
 113     ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
 114     ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
 115 } ADCName;
 116
 117
 118
 119 typedef enum {
 120     DAC_0 = 0
 121 } DACName;
 122
 123
 124 typedef enum {
 125     SPI_0 = 0,
 126     SPI_1 = 1,
 127 } SPIName;
 128
 129 #ifdef __cplusplus
 130 }
 131 #endif
 132
 133 #endif