tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_rfvbat.h

   1 /*
   2 ** ###################################################################
   3 **     Compilers:           Keil ARM C/C++ Compiler
   4 **                          Freescale C/C++ for Embedded ARM
   5 **                          GNU C Compiler
   6 **                          IAR ANSI C/C++ Compiler for ARM
   7 **
   8 **     Reference manual:    K64P144M120SF5RM, Rev.2, January 2014
   9 **     Version:             rev. 2.5, 2014-02-10
  10 **     Build:               b140604
  11 **
  12 **     Abstract:
  13 **         Extension to the CMSIS register access layer header.
  14 **
  15 **     Copyright (c) 2014 Freescale Semiconductor, Inc.
  16 **     All rights reserved.
  17 **
  18 **     Redistribution and use in source and binary forms, with or without modification,
  19 **     are permitted provided that the following conditions are met:
  20 **
  21 **     o Redistributions of source code must retain the above copyright notice, this list
  22 **       of conditions and the following disclaimer.
  23 **
  24 **     o Redistributions in binary form must reproduce the above copyright notice, this
  25 **       list of conditions and the following disclaimer in the documentation and/or
  26 **       other materials provided with the distribution.
  27 **
  28 **     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
  29 **       contributors may be used to endorse or promote products derived from this
  30 **       software without specific prior written permission.
  31 **
  32 **     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  33 **     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  34 **     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35 **     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  36 **     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  37 **     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  38 **     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  39 **     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 **     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  41 **     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 **
  43 **     http:                 www.freescale.com
  44 **     mail:                 support@freescale.com
  45 **
  46 **     Revisions:
  47 **     - rev. 1.0 (2013-08-12)
  48 **         Initial version.
  49 **     - rev. 2.0 (2013-10-29)
  50 **         Register accessor macros added to the memory map.
  51 **         Symbols for Processor Expert memory map compatibility added to the memory map.
  52 **         Startup file for gcc has been updated according to CMSIS 3.2.
  53 **         System initialization updated.
  54 **         MCG - registers updated.
  55 **         PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
  56 **     - rev. 2.1 (2013-10-30)
  57 **         Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
  58 **     - rev. 2.2 (2013-12-09)
  59 **         DMA - EARS register removed.
  60 **         AIPS0, AIPS1 - MPRA register updated.
  61 **     - rev. 2.3 (2014-01-24)
  62 **         Update according to reference manual rev. 2
  63 **         ENET, MCG, MCM, SIM, USB - registers updated
  64 **     - rev. 2.4 (2014-02-10)
  65 **         The declaration of clock configurations has been moved to separate header file system_MK64F12.h
  66 **         Update of SystemInit() and SystemCoreClockUpdate() functions.
  67 **     - rev. 2.5 (2014-02-10)
  68 **         The declaration of clock configurations has been moved to separate header file system_MK64F12.h
  69 **         Update of SystemInit() and SystemCoreClockUpdate() functions.
  70 **         Module access macro module_BASES replaced by module_BASE_PTRS.
  71 **
  72 ** ###################################################################
  73 */
  74
  75 /*
  76  * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
  77  *
  78  * This file was generated automatically and any changes may be lost.
  79  */
  80 #ifndef __HW_RFVBAT_REGISTERS_H__
  81 #define __HW_RFVBAT_REGISTERS_H__
  82
  83 #include "MK64F12.h"
  84 #include "fsl_bitaccess.h"
  85
  86 /*
  87  * MK64F12 RFVBAT
  88  *
  89  * VBAT register file
  90  *
  91  * Registers defined in this header file:
  92  * - HW_RFVBAT_REGn - VBAT register file register
  93  *
  94  * - hw_rfvbat_t - Struct containing all module registers.
  95  */
  96
  97 #define HW_RFVBAT_INSTANCE_COUNT (1U) /*!< Number of instances of the RFVBAT module. */
  98
  99 /*******************************************************************************
 100  * HW_RFVBAT_REGn - VBAT register file register
 101  ******************************************************************************/
 102
 103 /*!
 104  * @brief HW_RFVBAT_REGn - VBAT register file register (RW)
 105  *
 106  * Reset value: 0x00000000U
 107  *
 108  * Each register can be accessed as 8-, 16-, or 32-bits.
 109  */
 110 typedef union _hw_rfvbat_regn
 111 {
 112     uint32_t U;
 113     struct _hw_rfvbat_regn_bitfields
 114     {
 115         uint32_t LL : 8;               /*!< [7:0]  */
 116         uint32_t LH : 8;               /*!< [15:8]  */
 117         uint32_t HL : 8;               /*!< [23:16]  */
 118         uint32_t HH : 8;               /*!< [31:24]  */
 119     } B;
 120 } hw_rfvbat_regn_t;
 121
 122 /*!
 123  * @name Constants and macros for entire RFVBAT_REGn register
 124  */
 125 /*@{*/
 126 #define HW_RFVBAT_REGn_COUNT (8U)
 127
 128 #define HW_RFVBAT_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
 129
 130 #define HW_RFVBAT_REGn(x, n)     (*(__IO hw_rfvbat_regn_t *) HW_RFVBAT_REGn_ADDR(x, n))
 131 #define HW_RFVBAT_REGn_RD(x, n)  (HW_RFVBAT_REGn(x, n).U)
 132 #define HW_RFVBAT_REGn_WR(x, n, v) (HW_RFVBAT_REGn(x, n).U = (v))
 133 #define HW_RFVBAT_REGn_SET(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) |  (v)))
 134 #define HW_RFVBAT_REGn_CLR(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) & ~(v)))
 135 #define HW_RFVBAT_REGn_TOG(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) ^  (v)))
 136 /*@}*/
 137
 138 /*
 139  * Constants & macros for individual RFVBAT_REGn bitfields
 140  */
 141
 142 /*!
 143  * @name Register RFVBAT_REGn, field LL[7:0] (RW)
 144  *
 145  * Low lower byte
 146  */
 147 /*@{*/
 148 #define BP_RFVBAT_REGn_LL    (0U)          /*!< Bit position for RFVBAT_REGn_LL. */
 149 #define BM_RFVBAT_REGn_LL    (0x000000FFU) /*!< Bit mask for RFVBAT_REGn_LL. */
 150 #define BS_RFVBAT_REGn_LL    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_LL. */
 151
 152 /*! @brief Read current value of the RFVBAT_REGn_LL field. */
 153 #define BR_RFVBAT_REGn_LL(x, n) (HW_RFVBAT_REGn(x, n).B.LL)
 154
 155 /*! @brief Format value for bitfield RFVBAT_REGn_LL. */
 156 #define BF_RFVBAT_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LL) & BM_RFVBAT_REGn_LL)
 157
 158 /*! @brief Set the LL field to a new value. */
 159 #define BW_RFVBAT_REGn_LL(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_LL) | BF_RFVBAT_REGn_LL(v)))
 160 /*@}*/
 161
 162 /*!
 163  * @name Register RFVBAT_REGn, field LH[15:8] (RW)
 164  *
 165  * Low higher byte
 166  */
 167 /*@{*/
 168 #define BP_RFVBAT_REGn_LH    (8U)          /*!< Bit position for RFVBAT_REGn_LH. */
 169 #define BM_RFVBAT_REGn_LH    (0x0000FF00U) /*!< Bit mask for RFVBAT_REGn_LH. */
 170 #define BS_RFVBAT_REGn_LH    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_LH. */
 171
 172 /*! @brief Read current value of the RFVBAT_REGn_LH field. */
 173 #define BR_RFVBAT_REGn_LH(x, n) (HW_RFVBAT_REGn(x, n).B.LH)
 174
 175 /*! @brief Format value for bitfield RFVBAT_REGn_LH. */
 176 #define BF_RFVBAT_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LH) & BM_RFVBAT_REGn_LH)
 177
 178 /*! @brief Set the LH field to a new value. */
 179 #define BW_RFVBAT_REGn_LH(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_LH) | BF_RFVBAT_REGn_LH(v)))
 180 /*@}*/
 181
 182 /*!
 183  * @name Register RFVBAT_REGn, field HL[23:16] (RW)
 184  *
 185  * High lower byte
 186  */
 187 /*@{*/
 188 #define BP_RFVBAT_REGn_HL    (16U)         /*!< Bit position for RFVBAT_REGn_HL. */
 189 #define BM_RFVBAT_REGn_HL    (0x00FF0000U) /*!< Bit mask for RFVBAT_REGn_HL. */
 190 #define BS_RFVBAT_REGn_HL    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_HL. */
 191
 192 /*! @brief Read current value of the RFVBAT_REGn_HL field. */
 193 #define BR_RFVBAT_REGn_HL(x, n) (HW_RFVBAT_REGn(x, n).B.HL)
 194
 195 /*! @brief Format value for bitfield RFVBAT_REGn_HL. */
 196 #define BF_RFVBAT_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HL) & BM_RFVBAT_REGn_HL)
 197
 198 /*! @brief Set the HL field to a new value. */
 199 #define BW_RFVBAT_REGn_HL(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_HL) | BF_RFVBAT_REGn_HL(v)))
 200 /*@}*/
 201
 202 /*!
 203  * @name Register RFVBAT_REGn, field HH[31:24] (RW)
 204  *
 205  * High higher byte
 206  */
 207 /*@{*/
 208 #define BP_RFVBAT_REGn_HH    (24U)         /*!< Bit position for RFVBAT_REGn_HH. */
 209 #define BM_RFVBAT_REGn_HH    (0xFF000000U) /*!< Bit mask for RFVBAT_REGn_HH. */
 210 #define BS_RFVBAT_REGn_HH    (8U)          /*!< Bit field size in bits for RFVBAT_REGn_HH. */
 211
 212 /*! @brief Read current value of the RFVBAT_REGn_HH field. */
 213 #define BR_RFVBAT_REGn_HH(x, n) (HW_RFVBAT_REGn(x, n).B.HH)
 214
 215 /*! @brief Format value for bitfield RFVBAT_REGn_HH. */
 216 #define BF_RFVBAT_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HH) & BM_RFVBAT_REGn_HH)
 217
 218 /*! @brief Set the HH field to a new value. */
 219 #define BW_RFVBAT_REGn_HH(x, n, v) (HW_RFVBAT_REGn_WR(x, n, (HW_RFVBAT_REGn_RD(x, n) & ~BM_RFVBAT_REGn_HH) | BF_RFVBAT_REGn_HH(v)))
 220 /*@}*/
 221
 222 /*******************************************************************************
 223  * hw_rfvbat_t - module struct
 224  ******************************************************************************/
 225 /*!
 226  * @brief All RFVBAT module registers.
 227  */
 228 #pragma pack(1)
 229 typedef struct _hw_rfvbat
 230 {
 231     __IO hw_rfvbat_regn_t REGn[8];         /*!< [0x0] VBAT register file register */
 232 } hw_rfvbat_t;
 233 #pragma pack()
 234
 235 /*! @brief Macro to access all RFVBAT registers. */
 236 /*! @param x RFVBAT module instance base address. */
 237 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
 238  *     use the '&' operator, like <code>&HW_RFVBAT(RFVBAT_BASE)</code>. */
 239 #define HW_RFVBAT(x)   (*(hw_rfvbat_t *)(x))
 240
 241 #endif /* __HW_RFVBAT_REGISTERS_H__ */
 242 /* EOF */