]> git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_NXP / TARGET_LPC11UXX / i2c_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include "mbed_assert.h"
17 #include "i2c_api.h"
18 #include "cmsis.h"
19 #include "pinmap.h"
20 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
21
22 #define I2C_CONSET(x) (x->i2c->CONSET)
23 #define I2C_CONCLR(x) (x->i2c->CONCLR)
24 #define I2C_STAT(x) (x->i2c->STAT)
25 #define I2C_DAT(x) (x->i2c->DAT)
26 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
27 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
28
29 static const uint32_t I2C_addr_offset[2][4] = {
30 {0x0C, 0x20, 0x24, 0x28},
31 {0x30, 0x34, 0x38, 0x3C}
32 };
33
34 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
35 I2C_CONCLR(obj) = (start << 5)
36 | (stop << 4)
37 | (interrupt << 3)
38 | (acknowledge << 2);
39 }
40
41 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
42 I2C_CONSET(obj) = (start << 5)
43 | (stop << 4)
44 | (interrupt << 3)
45 | (acknowledge << 2);
46 }
47
48 // Clear the Serial Interrupt (SI)
49 static inline void i2c_clear_SI(i2c_t *obj) {
50 i2c_conclr(obj, 0, 0, 1, 0);
51 }
52
53 static inline int i2c_status(i2c_t *obj) {
54 return I2C_STAT(obj);
55 }
56
57 // Wait until the Serial Interrupt (SI) is set
58 static int i2c_wait_SI(i2c_t *obj) {
59 int timeout = 0;
60 while (!(I2C_CONSET(obj) & (1 << 3))) {
61 timeout++;
62 if (timeout > 100000) return -1;
63 }
64 return 0;
65 }
66
67 static inline void i2c_interface_enable(i2c_t *obj) {
68 I2C_CONSET(obj) = 0x40;
69 }
70
71 static inline void i2c_power_enable(i2c_t *obj) {
72 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
73 LPC_SYSCON->PRESETCTRL |= 1 << 1;
74 }
75
76 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
77 // determine the SPI to use
78 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
79 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
80 obj->i2c = (LPC_I2C_Type *)pinmap_merge(i2c_sda, i2c_scl);
81 MBED_ASSERT((int)obj->i2c != NC);
82
83 // enable power
84 i2c_power_enable(obj);
85
86 // set default frequency at 100k
87 i2c_frequency(obj, 100000);
88 i2c_conclr(obj, 1, 1, 1, 1);
89 i2c_interface_enable(obj);
90
91 pinmap_pinout(sda, PinMap_I2C_SDA);
92 pinmap_pinout(scl, PinMap_I2C_SCL);
93 }
94
95 inline int i2c_start(i2c_t *obj) {
96 int status = 0;
97 // 8.1 Before master mode can be entered, I2CON must be initialised to:
98 // - I2EN STA STO SI AA - -
99 // - 1 0 0 0 x - -
100 // if AA = 0, it can't enter slave mode
101 i2c_conclr(obj, 1, 1, 1, 1);
102
103 // The master mode may now be entered by setting the STA bit
104 // this will generate a start condition when the bus becomes free
105 i2c_conset(obj, 1, 0, 0, 1);
106
107 i2c_wait_SI(obj);
108 status = i2c_status(obj);
109
110 // Clear start bit now transmitted, and interrupt bit
111 i2c_conclr(obj, 1, 0, 0, 0);
112 return status;
113 }
114
115 inline int i2c_stop(i2c_t *obj) {
116 int timeout = 0;
117
118 // write the stop bit
119 i2c_conset(obj, 0, 1, 0, 0);
120 i2c_clear_SI(obj);
121
122 // wait for STO bit to reset
123 while(I2C_CONSET(obj) & (1 << 4)) {
124 timeout ++;
125 if (timeout > 100000) return 1;
126 }
127
128 return 0;
129 }
130
131
132 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
133 // write the data
134 I2C_DAT(obj) = value;
135
136 // clear SI to init a send
137 i2c_clear_SI(obj);
138
139 // wait and return status
140 i2c_wait_SI(obj);
141 return i2c_status(obj);
142 }
143
144 static inline int i2c_do_read(i2c_t *obj, int last) {
145 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
146 if (last) {
147 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
148 } else {
149 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
150 }
151
152 // accept byte
153 i2c_clear_SI(obj);
154
155 // wait for it to arrive
156 i2c_wait_SI(obj);
157
158 // return the data
159 return (I2C_DAT(obj) & 0xFF);
160 }
161
162 void i2c_frequency(i2c_t *obj, int hz) {
163 // No peripheral clock divider on the M0
164 uint32_t PCLK = SystemCoreClock;
165
166 uint32_t pulse = PCLK / (hz * 2);
167
168 // I2C Rate
169 I2C_SCLL(obj, pulse);
170 I2C_SCLH(obj, pulse);
171 }
172
173 // The I2C does a read or a write as a whole operation
174 // There are two types of error conditions it can encounter
175 // 1) it can not obtain the bus
176 // 2) it gets error responses at part of the transmission
177 //
178 // We tackle them as follows:
179 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
180 // which basically turns it in to a 2)
181 // 2) on error, we use the standard error mechanisms to report/debug
182 //
183 // Therefore an I2C transaction should always complete. If it doesn't it is usually
184 // because something is setup wrong (e.g. wiring), and we don't need to programatically
185 // check for that
186
187 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
188 int count, status;
189
190 status = i2c_start(obj);
191
192 if ((status != 0x10) && (status != 0x08)) {
193 i2c_stop(obj);
194 return I2C_ERROR_BUS_BUSY;
195 }
196
197 status = i2c_do_write(obj, (address | 0x01), 1);
198 if (status != 0x40) {
199 i2c_stop(obj);
200 return I2C_ERROR_NO_SLAVE;
201 }
202
203 // Read in all except last byte
204 for (count = 0; count < (length - 1); count++) {
205 int value = i2c_do_read(obj, 0);
206 status = i2c_status(obj);
207 if (status != 0x50) {
208 i2c_stop(obj);
209 return count;
210 }
211 data[count] = (char) value;
212 }
213
214 // read in last byte
215 int value = i2c_do_read(obj, 1);
216 status = i2c_status(obj);
217 if (status != 0x58) {
218 i2c_stop(obj);
219 return length - 1;
220 }
221
222 data[count] = (char) value;
223
224 // If not repeated start, send stop.
225 if (stop) {
226 i2c_stop(obj);
227 }
228
229 return length;
230 }
231
232 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
233 int i, status;
234
235 status = i2c_start(obj);
236
237 if ((status != 0x10) && (status != 0x08)) {
238 i2c_stop(obj);
239 return I2C_ERROR_BUS_BUSY;
240 }
241
242 status = i2c_do_write(obj, (address & 0xFE), 1);
243 if (status != 0x18) {
244 i2c_stop(obj);
245 return I2C_ERROR_NO_SLAVE;
246 }
247
248 for (i=0; i<length; i++) {
249 status = i2c_do_write(obj, data[i], 0);
250 if(status != 0x28) {
251 i2c_stop(obj);
252 return i;
253 }
254 }
255
256 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
257 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
258 // i2c_clear_SI(obj);
259
260 // If not repeated start, send stop.
261 if (stop) {
262 i2c_stop(obj);
263 }
264
265 return length;
266 }
267
268 void i2c_reset(i2c_t *obj) {
269 i2c_stop(obj);
270 }
271
272 int i2c_byte_read(i2c_t *obj, int last) {
273 return (i2c_do_read(obj, last) & 0xFF);
274 }
275
276 int i2c_byte_write(i2c_t *obj, int data) {
277 int ack;
278 int status = i2c_do_write(obj, (data & 0xFF), 0);
279
280 switch(status) {
281 case 0x18: case 0x28: // Master transmit ACKs
282 ack = 1;
283 break;
284 case 0x40: // Master receive address transmitted ACK
285 ack = 1;
286 break;
287 case 0xB8: // Slave transmit ACK
288 ack = 1;
289 break;
290 default:
291 ack = 0;
292 break;
293 }
294
295 return ack;
296 }
297
298 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
299 if (enable_slave != 0) {
300 i2c_conclr(obj, 1, 1, 1, 0);
301 i2c_conset(obj, 0, 0, 0, 1);
302 } else {
303 i2c_conclr(obj, 1, 1, 1, 1);
304 }
305 }
306
307 int i2c_slave_receive(i2c_t *obj) {
308 int status;
309 int retval;
310
311 status = i2c_status(obj);
312 switch(status) {
313 case 0x60: retval = 3; break;
314 case 0x70: retval = 2; break;
315 case 0xA8: retval = 1; break;
316 default : retval = 0; break;
317 }
318
319 return(retval);
320 }
321
322 int i2c_slave_read(i2c_t *obj, char *data, int length) {
323 int count = 0;
324 int status;
325
326 do {
327 i2c_clear_SI(obj);
328 i2c_wait_SI(obj);
329 status = i2c_status(obj);
330 if((status == 0x80) || (status == 0x90)) {
331 data[count] = I2C_DAT(obj) & 0xFF;
332 }
333 count++;
334 } while (((status == 0x80) || (status == 0x90) ||
335 (status == 0x060) || (status == 0x70)) && (count < length));
336
337 if(status != 0xA0) {
338 i2c_stop(obj);
339 }
340
341 i2c_clear_SI(obj);
342
343 return count;
344 }
345
346 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
347 int count = 0;
348 int status;
349
350 if(length <= 0) {
351 return(0);
352 }
353
354 do {
355 status = i2c_do_write(obj, data[count], 0);
356 count++;
357 } while ((count < length) && (status == 0xB8));
358
359 if((status != 0xC0) && (status != 0xC8)) {
360 i2c_stop(obj);
361 }
362
363 i2c_clear_SI(obj);
364
365 return(count);
366 }
367
368 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
369 uint32_t addr;
370
371 if ((idx >= 0) && (idx <= 3)) {
372 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
373 *((uint32_t *) addr) = address & 0xFF;
374 }
375 }
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