]> git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c
Squashed 'tmk_core/' changes from 7967731..b9e0ea0
[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_NXP / TARGET_LPC11XX_11CXX / i2c_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include "mbed_assert.h"
17 #include "i2c_api.h"
18 #include "cmsis.h"
19 #include "pinmap.h"
20 #include "mbed_error.h"
21
22 static const PinMap PinMap_I2C_SDA[] = {
23 {P0_5, I2C_0, 1},
24 {NC , NC , 0}
25 };
26
27 static const PinMap PinMap_I2C_SCL[] = {
28 {P0_4, I2C_0, 1},
29 {NC , NC, 0}
30 };
31
32 #define I2C_CONSET(x) (x->i2c->CONSET)
33 #define I2C_CONCLR(x) (x->i2c->CONCLR)
34 #define I2C_STAT(x) (x->i2c->STAT)
35 #define I2C_DAT(x) (x->i2c->DAT)
36 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
37 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
38
39 static const uint32_t I2C_addr_offset[2][4] = {
40 {0x0C, 0x20, 0x24, 0x28},
41 {0x30, 0x34, 0x38, 0x3C}
42 };
43
44 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
45 I2C_CONCLR(obj) = (start << 5)
46 | (stop << 4)
47 | (interrupt << 3)
48 | (acknowledge << 2);
49 }
50
51 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
52 I2C_CONSET(obj) = (start << 5)
53 | (stop << 4)
54 | (interrupt << 3)
55 | (acknowledge << 2);
56 }
57
58 // Clear the Serial Interrupt (SI)
59 static inline void i2c_clear_SI(i2c_t *obj) {
60 i2c_conclr(obj, 0, 0, 1, 0);
61 }
62
63 static inline int i2c_status(i2c_t *obj) {
64 return I2C_STAT(obj);
65 }
66
67 // Wait until the Serial Interrupt (SI) is set
68 static int i2c_wait_SI(i2c_t *obj) {
69 int timeout = 0;
70 while (!(I2C_CONSET(obj) & (1 << 3))) {
71 timeout++;
72 if (timeout > 100000) return -1;
73 }
74 return 0;
75 }
76
77 static inline void i2c_interface_enable(i2c_t *obj) {
78 I2C_CONSET(obj) = 0x40;
79 }
80
81 static inline void i2c_power_enable(i2c_t *obj) {
82 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
83 LPC_SYSCON->PRESETCTRL |= 1 << 1;
84 }
85
86 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
87 // determine the SPI to use
88 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
89 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
90 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
91 MBED_ASSERT((int)obj->i2c != NC);
92
93 // enable power
94 i2c_power_enable(obj);
95
96 // set default frequency at 100k
97 i2c_frequency(obj, 100000);
98 i2c_conclr(obj, 1, 1, 1, 1);
99 i2c_interface_enable(obj);
100
101 pinmap_pinout(sda, PinMap_I2C_SDA);
102 pinmap_pinout(scl, PinMap_I2C_SCL);
103 }
104
105 inline int i2c_start(i2c_t *obj) {
106 int status = 0;
107 // 8.1 Before master mode can be entered, I2CON must be initialised to:
108 // - I2EN STA STO SI AA - -
109 // - 1 0 0 0 x - -
110 // if AA = 0, it can't enter slave mode
111 i2c_conclr(obj, 1, 1, 1, 1);
112
113 // The master mode may now be entered by setting the STA bit
114 // this will generate a start condition when the bus becomes free
115 i2c_conset(obj, 1, 0, 0, 1);
116
117 i2c_wait_SI(obj);
118 status = i2c_status(obj);
119
120 // Clear start bit now transmitted, and interrupt bit
121 i2c_conclr(obj, 1, 0, 0, 0);
122 return status;
123 }
124
125 inline int i2c_stop(i2c_t *obj) {
126 int timeout = 0;
127
128 // write the stop bit
129 i2c_conset(obj, 0, 1, 0, 0);
130 i2c_clear_SI(obj);
131
132 // wait for STO bit to reset
133 while(I2C_CONSET(obj) & (1 << 4)) {
134 timeout ++;
135 if (timeout > 100000) return 1;
136 }
137
138 return 0;
139 }
140
141
142 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
143 // write the data
144 I2C_DAT(obj) = value;
145
146 // clear SI to init a send
147 i2c_clear_SI(obj);
148
149 // wait and return status
150 i2c_wait_SI(obj);
151 return i2c_status(obj);
152 }
153
154 static inline int i2c_do_read(i2c_t *obj, int last) {
155 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
156 if (last) {
157 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
158 } else {
159 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
160 }
161
162 // accept byte
163 i2c_clear_SI(obj);
164
165 // wait for it to arrive
166 i2c_wait_SI(obj);
167
168 // return the data
169 return (I2C_DAT(obj) & 0xFF);
170 }
171
172 void i2c_frequency(i2c_t *obj, int hz) {
173 // No peripheral clock divider on the M0
174 uint32_t PCLK = SystemCoreClock;
175
176 uint32_t pulse = PCLK / (hz * 2);
177
178 // I2C Rate
179 I2C_SCLL(obj, pulse);
180 I2C_SCLH(obj, pulse);
181 }
182
183 // The I2C does a read or a write as a whole operation
184 // There are two types of error conditions it can encounter
185 // 1) it can not obtain the bus
186 // 2) it gets error responses at part of the transmission
187 //
188 // We tackle them as follows:
189 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
190 // which basically turns it in to a 2)
191 // 2) on error, we use the standard error mechanisms to report/debug
192 //
193 // Therefore an I2C transaction should always complete. If it doesn't it is usually
194 // because something is setup wrong (e.g. wiring), and we don't need to programatically
195 // check for that
196
197 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
198 int count, status;
199
200 status = i2c_start(obj);
201
202 if ((status != 0x10) && (status != 0x08)) {
203 i2c_stop(obj);
204 return I2C_ERROR_BUS_BUSY;
205 }
206
207 status = i2c_do_write(obj, (address | 0x01), 1);
208 if (status != 0x40) {
209 i2c_stop(obj);
210 return I2C_ERROR_NO_SLAVE;
211 }
212
213 // Read in all except last byte
214 for (count = 0; count < (length - 1); count++) {
215 int value = i2c_do_read(obj, 0);
216 status = i2c_status(obj);
217 if (status != 0x50) {
218 i2c_stop(obj);
219 return count;
220 }
221 data[count] = (char) value;
222 }
223
224 // read in last byte
225 int value = i2c_do_read(obj, 1);
226 status = i2c_status(obj);
227 if (status != 0x58) {
228 i2c_stop(obj);
229 return length - 1;
230 }
231
232 data[count] = (char) value;
233
234 // If not repeated start, send stop.
235 if (stop) {
236 i2c_stop(obj);
237 }
238
239 return length;
240 }
241
242 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
243 int i, status;
244
245 status = i2c_start(obj);
246
247 if ((status != 0x10) && (status != 0x08)) {
248 i2c_stop(obj);
249 return I2C_ERROR_BUS_BUSY;
250 }
251
252 status = i2c_do_write(obj, (address & 0xFE), 1);
253 if (status != 0x18) {
254 i2c_stop(obj);
255 return I2C_ERROR_NO_SLAVE;
256 }
257
258 for (i=0; i<length; i++) {
259 status = i2c_do_write(obj, data[i], 0);
260 if(status != 0x28) {
261 i2c_stop(obj);
262 return i;
263 }
264 }
265
266 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
267 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
268 // i2c_clear_SI(obj);
269
270 // If not repeated start, send stop.
271 if (stop) {
272 i2c_stop(obj);
273 }
274
275 return length;
276 }
277
278 void i2c_reset(i2c_t *obj) {
279 i2c_stop(obj);
280 }
281
282 int i2c_byte_read(i2c_t *obj, int last) {
283 return (i2c_do_read(obj, last) & 0xFF);
284 }
285
286 int i2c_byte_write(i2c_t *obj, int data) {
287 int ack;
288 int status = i2c_do_write(obj, (data & 0xFF), 0);
289
290 switch(status) {
291 case 0x18: case 0x28: // Master transmit ACKs
292 ack = 1;
293 break;
294 case 0x40: // Master receive address transmitted ACK
295 ack = 1;
296 break;
297 case 0xB8: // Slave transmit ACK
298 ack = 1;
299 break;
300 default:
301 ack = 0;
302 break;
303 }
304
305 return ack;
306 }
307
308 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
309 if (enable_slave != 0) {
310 i2c_conclr(obj, 1, 1, 1, 0);
311 i2c_conset(obj, 0, 0, 0, 1);
312 } else {
313 i2c_conclr(obj, 1, 1, 1, 1);
314 }
315 }
316
317 int i2c_slave_receive(i2c_t *obj) {
318 int status;
319 int retval;
320
321 status = i2c_status(obj);
322 switch(status) {
323 case 0x60: retval = 3; break;
324 case 0x70: retval = 2; break;
325 case 0xA8: retval = 1; break;
326 default : retval = 0; break;
327 }
328
329 return(retval);
330 }
331
332 int i2c_slave_read(i2c_t *obj, char *data, int length) {
333 int count = 0;
334 int status;
335
336 do {
337 i2c_clear_SI(obj);
338 i2c_wait_SI(obj);
339 status = i2c_status(obj);
340 if((status == 0x80) || (status == 0x90)) {
341 data[count] = I2C_DAT(obj) & 0xFF;
342 }
343 count++;
344 } while (((status == 0x80) || (status == 0x90) ||
345 (status == 0x060) || (status == 0x70)) && (count < length));
346
347 if(status != 0xA0) {
348 i2c_stop(obj);
349 }
350
351 i2c_clear_SI(obj);
352
353 return count;
354 }
355
356 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
357 int count = 0;
358 int status;
359
360 if(length <= 0) {
361 return(0);
362 }
363
364 do {
365 status = i2c_do_write(obj, data[count], 0);
366 count++;
367 } while ((count < length) && (status == 0xB8));
368
369 if((status != 0xC0) && (status != 0xC8)) {
370 i2c_stop(obj);
371 }
372
373 i2c_clear_SI(obj);
374
375 return(count);
376 }
377
378 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
379 uint32_t addr;
380
381 if ((idx >= 0) && (idx <= 3)) {
382 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
383 *((uint32_t *) addr) = address & 0xFF;
384 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
385 *((uint32_t *) addr) = mask & 0xFE;
386 }
387 }
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