tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include <math.h>
  17
  18 #include "spi_api.h"
  19 #include "cmsis.h"
  20 #include "pinmap.h"
  21 #include "mbed_error.h"
  22
  23 static const PinMap PinMap_SPI_SCLK[] = {
  24     {P0_7 , SPI_1, 2},
  25     {P1_19, SPI_1, 5},
  26     {P1_20, SPI_0, 5},
  27     {P2_22, SPI_0, 2},
  28     {P5_2,  SPI_2, 2},
  29     {NC   , NC   , 0}
  30 };
  31
  32 static const PinMap PinMap_SPI_MOSI[] = {
  33     {P0_9 , SPI_1, 2},
  34     {P1_24, SPI_0, 5},
  35     {P2_27, SPI_0, 2},
  36     {P5_0,  SPI_2, 2},
  37     {NC   , NC   , 0}
  38 };
  39
  40 static const PinMap PinMap_SPI_MISO[] = {
  41     {P0_8 , SPI_1, 2},
  42     {P1_23, SPI_0, 5},
  43     {P2_26, SPI_0, 2},
  44     {P5_1,  SPI_2, 2},
  45     {NC   , NC   , 0}
  46 };
  47
  48 static const PinMap PinMap_SPI_SSEL[] = {
  49     {P0_6 , SPI_1, 2},
  50     {P2_23, SPI_0, 2},
  51     {P5_3, SPI_2, 2},
  52     {NC   , NC   , 0}
  53 };
  54
  55 static inline int ssp_disable(spi_t *obj);
  56 static inline int ssp_enable(spi_t *obj);
  57
  58 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
  59     // determine the SPI to use
  60     SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
  61     SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
  62     SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
  63     SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
  64     SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
  65     SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
  66     obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
  67     MBED_ASSERT((int)obj->spi != NC);
  68
  69     // enable power and clocking
  70     switch ((int)obj->spi) {
  71         case SPI_0: LPC_SC->PCONP |= 1 << 21; break;
  72         case SPI_1: LPC_SC->PCONP |= 1 << 10; break;
  73         case SPI_2: LPC_SC->PCONP |= 1 << 20; break;
  74     }
  75
  76     // set default format and frequency
  77     if (ssel == NC) {
  78         spi_format(obj, 8, 0, 0);  // 8 bits, mode 0, master
  79     } else {
  80         spi_format(obj, 8, 0, 1);  // 8 bits, mode 0, slave
  81     }
  82     spi_frequency(obj, 1000000);
  83
  84     // enable the ssp channel
  85     ssp_enable(obj);
  86
  87     // pin out the spi pins
  88     pinmap_pinout(mosi, PinMap_SPI_MOSI);
  89     pinmap_pinout(miso, PinMap_SPI_MISO);
  90     pinmap_pinout(sclk, PinMap_SPI_SCLK);
  91     if (ssel != NC) {
  92         pinmap_pinout(ssel, PinMap_SPI_SSEL);
  93     }
  94 }
  95
  96 void spi_free(spi_t *obj) {}
  97
  98 void spi_format(spi_t *obj, int bits, int mode, int slave) {
  99     MBED_ASSERT(((bits >= 4) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
 100     ssp_disable(obj);
 101
 102     int polarity = (mode & 0x2) ? 1 : 0;
 103     int phase = (mode & 0x1) ? 1 : 0;
 104
 105     // set it up
 106     int DSS = bits - 1;            // DSS (data select size)
 107     int SPO = (polarity) ? 1 : 0;  // SPO - clock out polarity
 108     int SPH = (phase) ? 1 : 0;     // SPH - clock out phase
 109
 110     int FRF = 0;                   // FRF (frame format) = SPI
 111     uint32_t tmp = obj->spi->CR0;
 112     tmp &= ~(0xFFFF);
 113     tmp |= DSS << 0
 114         | FRF << 4
 115         | SPO << 6
 116         | SPH << 7;
 117     obj->spi->CR0 = tmp;
 118
 119     tmp = obj->spi->CR1;
 120     tmp &= ~(0xD);
 121     tmp |= 0 << 0                   // LBM - loop back mode - off
 122         | ((slave) ? 1 : 0) << 2   // MS - master slave mode, 1 = slave
 123         | 0 << 3;                  // SOD - slave output disable - na
 124     obj->spi->CR1 = tmp;
 125     ssp_enable(obj);
 126 }
 127
 128 void spi_frequency(spi_t *obj, int hz) {
 129     ssp_disable(obj);
 130
 131     uint32_t PCLK = PeripheralClock;
 132
 133     int prescaler;
 134
 135     for (prescaler = 2; prescaler <= 254; prescaler += 2) {
 136         int prescale_hz = PCLK / prescaler;
 137
 138         // calculate the divider
 139         int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
 140
 141         // check we can support the divider
 142         if (divider < 256) {
 143             // prescaler
 144             obj->spi->CPSR = prescaler;
 145
 146             // divider
 147             obj->spi->CR0 &= ~(0xFFFF << 8);
 148             obj->spi->CR0 |= (divider - 1) << 8;
 149             ssp_enable(obj);
 150             return;
 151         }
 152     }
 153     error("Couldn't setup requested SPI frequency");
 154 }
 155
 156 static inline int ssp_disable(spi_t *obj) {
 157     return obj->spi->CR1 &= ~(1 << 1);
 158 }
 159
 160 static inline int ssp_enable(spi_t *obj) {
 161     return obj->spi->CR1 |= (1 << 1);
 162 }
 163
 164 static inline int ssp_readable(spi_t *obj) {
 165     return obj->spi->SR & (1 << 2);
 166 }
 167
 168 static inline int ssp_writeable(spi_t *obj) {
 169     return obj->spi->SR & (1 << 1);
 170 }
 171
 172 static inline void ssp_write(spi_t *obj, int value) {
 173     while (!ssp_writeable(obj));
 174     obj->spi->DR = value;
 175 }
 176
 177 static inline int ssp_read(spi_t *obj) {
 178     while (!ssp_readable(obj));
 179     return obj->spi->DR;
 180 }
 181
 182 static inline int ssp_busy(spi_t *obj) {
 183     return (obj->spi->SR & (1 << 4)) ? (1) : (0);
 184 }
 185
 186 int spi_master_write(spi_t *obj, int value) {
 187     ssp_write(obj, value);
 188     return ssp_read(obj);
 189 }
 190
 191 int spi_slave_receive(spi_t *obj) {
 192     return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
 193 }
 194
 195 int spi_slave_read(spi_t *obj) {
 196     return obj->spi->DR;
 197 }
 198
 199 void spi_slave_write(spi_t *obj, int value) {
 200     while (ssp_writeable(obj) == 0) ;
 201     obj->spi->DR = value;
 202 }
 203
 204 int spi_busy(spi_t *obj) {
 205     return ssp_busy(obj);
 206 }