tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC43XX/pwmout_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  *
  16  * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
  17  */
  18 #include "mbed_assert.h"
  19 #include "pwmout_api.h"
  20 #include "cmsis.h"
  21 #include "pinmap.h"
  22 #include "mbed_error.h"
  23
  24 // PWM implementation for the LPC43xx using State Configurable Timer (SCT)
  25 //   * PWM_0 to PWM_15 on mbed use CTOUT_0 to CTOUT_15 outputs on LPC43xx
  26 //   * Event 0 is PWM period, events 1 to PWM_EVENT_MAX are PWM channels
  27 //   * Default is unified 32-bit timer, but could be configured to use
  28 //     a 16-bit timer so a timer is available for other SCT functions
  29
  30 // configuration options
  31 #define PWM_FREQ_BASE   1000000                 // Base frequency 1 MHz = 1000000
  32 #define PWM_MODE        1                       // 0 = 32-bit, 1 = 16-bit low, 2 = 16-bit high
  33
  34 // macros
  35 #define PWM_SETCOUNT(x) (x - 1)                 // set count value
  36 #define PWM_GETCOUNT(x) (x + 1)                 // get count value
  37 #if (PWM_MODE == 0) // unified 32-bit counter, events 1 to 15
  38   #define PWM_EVENT_MAX (CONFIG_SCT_nEV - 1)    // Max PWM channels
  39   #define PWM_CONFIG    SCT_CONFIG_32BIT_COUNTER // default config
  40   #define PWM_CTRL      &LPC_SCT->CTRL_U        // control register
  41   #define PWM_HALT      SCT_CTRL_HALT_L         // halt counter
  42   #define PWM_CLEAR     SCT_CTRL_CLRCTR_L       // clock clear
  43   #define PWM_PRE(x)    SCT_CTRL_PRE_L(x)       // clock prescale
  44   #define PWM_EVT_MASK  (1 << 12)               // event control mask
  45   #define PWM_LIMIT     &LPC_SCT->LIMIT_L       // limit register
  46   #define PWM_MATCH(x)  &LPC_SCT->MATCH[x].U    // match register
  47   #define PWM_MR(x)     &LPC_SCT->MATCHREL[x].U // 32-bit match reload register
  48 #elif (PWM_MODE == 1) // 16-bit low counter, events 1 to 7
  49   #define PWM_EVENT_MAX (CONFIG_SCT_nEV/2 - 1)  // Max PWM channels
  50   #define PWM_CONFIG    SCT_CONFIG_16BIT_COUNTER // default config
  51   #define PWM_CTRL      &LPC_SCT->CTRL_L        // control register
  52   #define PWM_HALT      SCT_CTRL_HALT_L         // halt counter
  53   #define PWM_CLEAR     SCT_CTRL_CLRCTR_L       // clock clear
  54   #define PWM_PRE(x)    SCT_CTRL_PRE_L(x)       // clock prescale
  55   #define PWM_EVT_MASK  (1 << 12)               // event control mask
  56   #define PWM_LIMIT     &LPC_SCT->LIMIT_L       // limit register
  57   #define PWM_MATCH(x)  &LPC_SCT->MATCH[x].L    // match register
  58   #define PWM_MR(x)     &LPC_SCT->MATCHREL[x].L // 16-bit match reload register
  59 #elif (PWM_MODE == 2) // 16-bit high counter, events 1 to 7
  60   // [TODO] use events 8 to 15 on mode 2
  61   #define PWM_EVENT_MAX (CONFIG_SCT_nEV/2 - 1)  // Max PWM channels
  62   #define PWM_CONFIG    SCT_CONFIG_16BIT_COUNTER // default config
  63   #define PWM_CTRL      &LPC_SCT->CTRL_H        // control register
  64   #define PWM_HALT      SCT_CTRL_HALT_L         // halt counter
  65   #define PWM_CLEAR     SCT_CTRL_CLRCTR_L       // clock clear
  66   #define PWM_PRE(x)    SCT_CTRL_PRE_L(x)       // clock prescale
  67   #define PWM_EVT_MASK  ((1 << 4) | (1 << 12))  // event control mask
  68   #define PWM_LIMIT     &LPC_SCT->LIMIT_H       // limit register
  69   #define PWM_MATCH(x)  &LPC_SCT->MATCH[x].H    // match register
  70   #define PWM_MR(x)     &LPC_SCT->MATCHREL[x].H // 16-bit match reload register
  71 #else
  72   #error "PWM mode not implemented"
  73 #endif
  74 #define PWM_MR0         PWM_MR(0)               // MR register 0 is for period
  75
  76 static uint8_t event = 0;
  77
  78 //  PORT ID, PWM ID, Pin function
  79 static const PinMap PinMap_PWM[] = {
  80     {P1_1,  PWM_7,  (SCU_PINIO_FAST | 1)},
  81     {P1_2,  PWM_6,  (SCU_PINIO_FAST | 1)},
  82     {P1_3,  PWM_8,  (SCU_PINIO_FAST | 1)},
  83     {P1_4,  PWM_9,  (SCU_PINIO_FAST | 1)},
  84     {P1_5,  PWM_10, (SCU_PINIO_FAST | 1)},
  85     {P1_7,  PWM_13, (SCU_PINIO_FAST | 2)},
  86     {P1_8,  PWM_12, (SCU_PINIO_FAST | 2)},
  87     {P1_9,  PWM_11, (SCU_PINIO_FAST | 2)},
  88     {P1_10, PWM_14, (SCU_PINIO_FAST | 2)},
  89     {P1_11, PWM_15, (SCU_PINIO_FAST | 2)},
  90     {P2_7,  PWM_1,  (SCU_PINIO_FAST | 1)},
  91     {P2_8,  PWM_0,  (SCU_PINIO_FAST | 1)},
  92     {P2_9,  PWM_3,  (SCU_PINIO_FAST | 1)},
  93     {P2_10, PWM_2,  (SCU_PINIO_FAST | 1)},
  94     {P2_11, PWM_5,  (SCU_PINIO_FAST | 1)},
  95     {P2_12, PWM_4,  (SCU_PINIO_FAST | 1)},
  96     {P4_1,  PWM_1,  (SCU_PINIO_FAST | 1)},
  97     {P4_2,  PWM_0,  (SCU_PINIO_FAST | 1)},
  98     {P4_3,  PWM_3,  (SCU_PINIO_FAST | 1)},
  99     {P4_4,  PWM_2,  (SCU_PINIO_FAST | 1)},
 100     {P4_5,  PWM_5,  (SCU_PINIO_FAST | 1)},
 101     {P4_6,  PWM_4,  (SCU_PINIO_FAST | 1)},
 102     {P6_5,  PWM_6,  (SCU_PINIO_FAST | 1)},
 103     {P6_12, PWM_7,  (SCU_PINIO_FAST | 1)},
 104     {P7_0,  PWM_14, (SCU_PINIO_FAST | 1)},
 105     {P7_1,  PWM_15, (SCU_PINIO_FAST | 1)},
 106     {P7_4,  PWM_13, (SCU_PINIO_FAST | 1)},
 107     {P7_5,  PWM_12, (SCU_PINIO_FAST | 1)},
 108     {P7_6,  PWM_11, (SCU_PINIO_FAST | 1)},
 109     {P7_7,  PWM_8,  (SCU_PINIO_FAST | 1)},
 110     {PA_4,  PWM_9,  (SCU_PINIO_FAST | 1)},
 111     {PB_0,  PWM_10, (SCU_PINIO_FAST | 1)},
 112     {PB_1,  PWM_6,  (SCU_PINIO_FAST | 5)},
 113     {PB_2,  PWM_7,  (SCU_PINIO_FAST | 5)},
 114     {PB_3,  PWM_8,  (SCU_PINIO_FAST | 5)},
 115     {PD_0,  PWM_15, (SCU_PINIO_FAST | 1)},
 116     {PD_2,  PWM_7,  (SCU_PINIO_FAST | 1)},
 117     {PD_3,  PWM_6,  (SCU_PINIO_FAST | 1)},
 118     {PD_4,  PWM_8,  (SCU_PINIO_FAST | 1)},
 119     {PD_5,  PWM_9,  (SCU_PINIO_FAST | 1)},
 120     {PD_6,  PWM_10, (SCU_PINIO_FAST | 1)},
 121     {PD_9,  PWM_13, (SCU_PINIO_FAST | 1)},
 122     {PD_11, PWM_14, (SCU_PINIO_FAST | 6)},
 123     {PD_12, PWM_10, (SCU_PINIO_FAST | 6)},
 124     {PD_13, PWM_13, (SCU_PINIO_FAST | 6)},
 125     {PD_14, PWM_11, (SCU_PINIO_FAST | 6)},
 126     {PD_15, PWM_8,  (SCU_PINIO_FAST | 6)},
 127     {PD_16, PWM_12, (SCU_PINIO_FAST | 6)},
 128     {PE_5,  PWM_3,  (SCU_PINIO_FAST | 1)},
 129     {PE_6,  PWM_2,  (SCU_PINIO_FAST | 1)},
 130     {PE_7,  PWM_5,  (SCU_PINIO_FAST | 1)},
 131     {PE_8,  PWM_4,  (SCU_PINIO_FAST | 1)},
 132     {PE_11, PWM_12, (SCU_PINIO_FAST | 1)},
 133     {PE_12, PWM_11, (SCU_PINIO_FAST | 1)},
 134     {PE_13, PWM_14, (SCU_PINIO_FAST | 1)},
 135     {PE_15, PWM_0,  (SCU_PINIO_FAST | 1)},
 136     {PF_9,  PWM_1,  (SCU_PINIO_FAST | 2)},
 137     {NC,    NC, 0}
 138 };
 139
 140 static unsigned int pwm_clock_mhz;
 141
 142 static void _pwmout_dev_init() {
 143     uint32_t i;
 144
 145     // set SCT clock and config
 146     LPC_CCU1->CLKCCU[CLK_MX_SCT].CFG = (1 << 0); // enable SCT clock in CCU1
 147     LPC_SCT->CONFIG |= PWM_CONFIG; // set config options
 148     *PWM_CTRL |= PWM_HALT; // set HALT bit to stop counter
 149     // clear counter and set prescaler for desired freq
 150     *PWM_CTRL |= PWM_CLEAR | PWM_PRE(SystemCoreClock / PWM_FREQ_BASE - 1);
 151     pwm_clock_mhz = PWM_FREQ_BASE / 1000000;
 152
 153     // configure SCT events
 154     for (i = 0; i < PWM_EVENT_MAX; i++) {
 155         *PWM_MATCH(i) = 0; // match register
 156         *PWM_MR(i) = 0; // match reload register
 157         LPC_SCT->EVENT[i].STATE = 0xFFFFFFFF; // event happens in all states
 158         LPC_SCT->EVENT[i].CTRL  = (i << 0) | PWM_EVT_MASK; // match condition only
 159     }
 160     *PWM_LIMIT = (1 << 0) ; // set event 0 as limit
 161     // initialize period to 20ms: standard for servos, and fine for e.g. brightness control
 162     *PWM_MR0 = PWM_SETCOUNT((uint32_t)(((20 * PWM_FREQ_BASE) / 1000000) * 1000));
 163
 164     // initialize SCT outputs
 165     for (i = 0; i < CONFIG_SCT_nOU; i++) {
 166         LPC_SCT->OUT[i].SET = (1 << 0); // event 0 will set SCTOUT_xx
 167         LPC_SCT->OUT[i].CLR = 0; // set clear event when duty cycle
 168     }
 169     LPC_SCT->OUTPUT = 0; // default outputs to clear
 170
 171     *PWM_CTRL &= ~PWM_HALT; // clear HALT bit to start counter
 172 }
 173
 174 void pwmout_init(pwmout_t* obj, PinName pin) {
 175     // determine the channel
 176     PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
 177     MBED_ASSERT((pwm != (PWMName)NC) && (event < PWM_EVENT_MAX));
 178
 179     // init SCT clock and outputs on first PWM init
 180     if (event == 0) {
 181         _pwmout_dev_init();
 182     }
 183     // init PWM object
 184     event++;
 185     obj->pwm = pwm; // pwm output
 186     obj->mr = event; // index of match reload register
 187
 188     // initial duty cycle is 0
 189     pwmout_write(obj, 0);
 190
 191     // Wire pinout
 192     pinmap_pinout(pin, PinMap_PWM);
 193 }
 194
 195 void pwmout_free(pwmout_t* obj) {
 196     // [TODO]
 197 }
 198
 199 void pwmout_write(pwmout_t* obj, float value) {
 200     if (value < 0.0f) {
 201         value = 0.0;
 202     } else if (value > 1.0f) {
 203         value = 1.0;
 204     }
 205
 206     // set new pulse width
 207     uint32_t us = (uint32_t)((float)PWM_GETCOUNT(*PWM_MR0) * value) * pwm_clock_mhz;
 208     pwmout_pulsewidth_us(obj, us);
 209 }
 210
 211 float pwmout_read(pwmout_t* obj) {
 212     float v = (float)PWM_GETCOUNT(*PWM_MR(obj->mr)) / (float)PWM_GETCOUNT(*PWM_MR0);
 213     return (v > 1.0f) ? (1.0f) : (v);
 214 }
 215
 216 void pwmout_period(pwmout_t* obj, float seconds) {
 217     pwmout_period_us(obj, seconds * 1000000.0f);
 218 }
 219
 220 void pwmout_period_ms(pwmout_t* obj, int ms) {
 221     pwmout_period_us(obj, ms * 1000);
 222 }
 223
 224 // Set the PWM period, keeping the duty cycle the same.
 225 void pwmout_period_us(pwmout_t* obj, int us) {
 226     // calculate number of ticks
 227     uint32_t ticks = pwm_clock_mhz * us;
 228     uint32_t old_ticks = PWM_GETCOUNT(*PWM_MR0);
 229     uint32_t i, v;
 230
 231     // set new period
 232     *PWM_MR0 = PWM_SETCOUNT(ticks);
 233
 234     // Scale pulse widths to preserve the duty ratio
 235     for (i = 1; i < PWM_EVENT_MAX; i++) {
 236         v = PWM_GETCOUNT(*PWM_MR(i));
 237         if (v > 1) {
 238             v = (v * ticks) / old_ticks;
 239             *PWM_MR(i) = PWM_SETCOUNT(v);
 240         }
 241     }
 242 }
 243
 244 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
 245     pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
 246 }
 247
 248 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 249     pwmout_pulsewidth_us(obj, ms * 1000);
 250 }
 251
 252 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
 253     // calculate number of ticks
 254     uint32_t v = pwm_clock_mhz * us;
 255     //MBED_ASSERT(PWM_GETCOUNT(*PWM_MR0) >= v);
 256
 257     if (v > 0) {
 258         // set new match register value and enable SCT output
 259         *PWM_MR(obj->mr) = PWM_SETCOUNT(v);
 260         LPC_SCT->OUT[obj->pwm].CLR = (1 << obj->mr);  // on event will clear PWM_XX
 261     } else {
 262         // set match to zero and disable SCT output
 263         *PWM_MR(obj->mr) = 0;
 264         LPC_SCT->OUT[obj->pwm].CLR = 0;
 265     }
 266 }