tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC43XX/spi_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  *
  16  * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
  17  */
  18 #include "mbed_assert.h"
  19 #include <math.h>
  20
  21 #include "spi_api.h"
  22 #include "cmsis.h"
  23 #include "pinmap.h"
  24 #include "mbed_error.h"
  25
  26 // SCU mode for SPI pins
  27 #define SCU_PINIO_SPI       SCU_PINIO_FAST
  28
  29 static const PinMap PinMap_SPI_SCLK[] = {
  30     {P1_19, SPI_1, (SCU_PINIO_SPI | 1)},
  31     {P3_0,  SPI_0, (SCU_PINIO_SPI | 4)},
  32     {P3_3,  SPI_0, (SCU_PINIO_SPI | 2)},
  33     {PF_0,  SPI_0, (SCU_PINIO_SPI | 0)},
  34     {PF_4,  SPI_1, (SCU_PINIO_SPI | 0)},
  35     {NC,    NC,    0}
  36 };
  37
  38 static const PinMap PinMap_SPI_MOSI[] = {
  39     {P0_1,  SPI_1, (SCU_PINIO_SPI | 1)},
  40     {P1_2,  SPI_0, (SCU_PINIO_SPI | 5)},
  41     {P1_4,  SPI_1, (SCU_PINIO_SPI | 5)},
  42     {P3_7,  SPI_0, (SCU_PINIO_SPI | 5)},
  43     {P3_8,  SPI_0, (SCU_PINIO_SPI | 2)},
  44     {P9_2,  SPI_0, (SCU_PINIO_SPI | 7)},
  45     {PF_3,  SPI_0, (SCU_PINIO_SPI | 2)},
  46     {PF_7,  SPI_1, (SCU_PINIO_SPI | 2)},
  47     {NC,    NC,    0}
  48 };
  49
  50 static const PinMap PinMap_SPI_MISO[] = {
  51     {P0_0,  SPI_1, (SCU_PINIO_SPI | 1)},
  52     {P1_1,  SPI_0, (SCU_PINIO_SPI | 5)},
  53     {P1_3,  SPI_1, (SCU_PINIO_SPI | 5)},
  54     {P3_6,  SPI_0, (SCU_PINIO_SPI | 5)},
  55     {P3_7,  SPI_0, (SCU_PINIO_SPI | 2)},
  56     {P9_1,  SPI_0, (SCU_PINIO_SPI | 7)},
  57     {PF_2,  SPI_0, (SCU_PINIO_SPI | 2)},
  58     {PF_6,  SPI_1, (SCU_PINIO_SPI | 2)},
  59     {NC,    NC,    0}
  60 };
  61
  62 static const PinMap PinMap_SPI_SSEL[] = {
  63     {P1_0,  SPI_0, (SCU_PINIO_SPI | 5)},
  64     {P1_5,  SPI_1, (SCU_PINIO_SPI | 5)},
  65     {P1_20, SPI_1, (SCU_PINIO_SPI | 2)},
  66     {P3_6,  SPI_0, (SCU_PINIO_SPI | 2)},
  67     {P3_8,  SPI_0, (SCU_PINIO_SPI | 5)},
  68     {P9_0,  SPI_0, (SCU_PINIO_SPI | 7)},
  69     {PF_1,  SPI_0, (SCU_PINIO_SPI | 2)},
  70     {PF_5,  SPI_1, (SCU_PINIO_SPI | 2)},
  71     {NC,    NC,    0}
  72 };
  73
  74 static inline int ssp_disable(spi_t *obj);
  75 static inline int ssp_enable(spi_t *obj);
  76
  77 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
  78     // determine the SPI to use
  79     SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
  80     SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
  81     SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
  82     SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
  83     SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
  84     SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
  85
  86     obj->spi = (LPC_SSP_T*)pinmap_merge(spi_data, spi_cntl);
  87     MBED_ASSERT((int)obj->spi != NC);
  88
  89     // enable clocking
  90     switch ((int)obj->spi) {
  91         case SPI_0: LPC_CGU->BASE_CLK[CLK_BASE_SSP0] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
  92         case SPI_1: LPC_CGU->BASE_CLK[CLK_BASE_SSP1] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
  93     }
  94
  95     // set default format and frequency
  96     if (ssel == NC) {
  97         spi_format(obj, 8, 0, 0);  // 8 bits, mode 0, master
  98     } else {
  99         spi_format(obj, 8, 0, 1);  // 8 bits, mode 0, slave
 100     }
 101     spi_frequency(obj, 1000000);
 102
 103     // enable the ssp channel
 104     ssp_enable(obj);
 105
 106     // pin out the spi pins
 107     pinmap_pinout(mosi, PinMap_SPI_MOSI);
 108     pinmap_pinout(miso, PinMap_SPI_MISO);
 109     pinmap_pinout(sclk, PinMap_SPI_SCLK);
 110     if (ssel != NC) {
 111         pinmap_pinout(ssel, PinMap_SPI_SSEL);
 112     }
 113 }
 114
 115 void spi_free(spi_t *obj) {}
 116
 117 void spi_format(spi_t *obj, int bits, int mode, int slave) {
 118     MBED_ASSERT(((bits >= 4) && (bits <= 16)) || ((mode >= 0) && (mode <= 3)));
 119     ssp_disable(obj);
 120
 121     int polarity = (mode & 0x2) ? 1 : 0;
 122     int phase = (mode & 0x1) ? 1 : 0;
 123
 124     // set it up
 125     int DSS = bits - 1;            // DSS (data select size)
 126     int SPO = (polarity) ? 1 : 0;  // SPO - clock out polarity
 127     int SPH = (phase) ? 1 : 0;     // SPH - clock out phase
 128
 129     int FRF = 0;                   // FRF (frame format) = SPI
 130     uint32_t tmp = obj->spi->CR0;
 131     tmp &= ~(0xFFFF);
 132     tmp |= DSS << 0
 133         | FRF << 4
 134         | SPO << 6
 135         | SPH << 7;
 136     obj->spi->CR0 = tmp;
 137
 138     tmp = obj->spi->CR1;
 139     tmp &= ~(0xD);
 140     tmp |= 0 << 0                   // LBM - loop back mode - off
 141         | ((slave) ? 1 : 0) << 2   // MS - master slave mode, 1 = slave
 142         | 0 << 3;                  // SOD - slave output disable - na
 143     obj->spi->CR1 = tmp;
 144     ssp_enable(obj);
 145 }
 146
 147 void spi_frequency(spi_t *obj, int hz) {
 148     ssp_disable(obj);
 149
 150     uint32_t PCLK = SystemCoreClock;
 151
 152     int prescaler;
 153
 154     for (prescaler = 2; prescaler <= 254; prescaler += 2) {
 155         int prescale_hz = PCLK / prescaler;
 156
 157         // calculate the divider
 158         int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
 159
 160         // check we can support the divider
 161         if (divider < 256) {
 162             // prescaler
 163             obj->spi->CPSR = prescaler;
 164
 165             // divider
 166             obj->spi->CR0 &= ~(0xFFFF << 8);
 167             obj->spi->CR0 |= (divider - 1) << 8;
 168             ssp_enable(obj);
 169             return;
 170         }
 171     }
 172     error("Couldn't setup requested SPI frequency");
 173 }
 174
 175 static inline int ssp_disable(spi_t *obj) {
 176     return obj->spi->CR1 &= ~(1 << 1);
 177 }
 178
 179 static inline int ssp_enable(spi_t *obj) {
 180     return obj->spi->CR1 |= (1 << 1);
 181 }
 182
 183 static inline int ssp_readable(spi_t *obj) {
 184     return obj->spi->SR & (1 << 2);
 185 }
 186
 187 static inline int ssp_writeable(spi_t *obj) {
 188     return obj->spi->SR & (1 << 1);
 189 }
 190
 191 static inline void ssp_write(spi_t *obj, int value) {
 192     while (!ssp_writeable(obj));
 193     obj->spi->DR = value;
 194 }
 195
 196 static inline int ssp_read(spi_t *obj) {
 197     while (!ssp_readable(obj));
 198     return obj->spi->DR;
 199 }
 200
 201 static inline int ssp_busy(spi_t *obj) {
 202     return (obj->spi->SR & (1 << 4)) ? (1) : (0);
 203 }
 204
 205 int spi_master_write(spi_t *obj, int value) {
 206     ssp_write(obj, value);
 207     return ssp_read(obj);
 208 }
 209
 210 int spi_slave_receive(spi_t *obj) {
 211     return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
 212 }
 213
 214 int spi_slave_read(spi_t *obj) {
 215     return obj->spi->DR;
 216 }
 217
 218 void spi_slave_write(spi_t *obj, int value) {
 219     while (ssp_writeable(obj) == 0) ;
 220     obj->spi->DR = value;
 221 }
 222
 223 int spi_busy(spi_t *obj) {
 224     return ssp_busy(obj);
 225 }