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git.gir.st - tmk_keyboard.git/blob - tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/rtc_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2015 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
17 #include "mbed_assert.h"
23 #include "rtc_iodefine.h"
26 #define RCR1_VAL_ON (0x08u) // AIE = 1
27 #define RCR1_VAL_OFF (0x00u)
28 #define RCR2_VAL_ALLSTOP (0x00u)
29 #define RCR2_VAL_START (0x01u) // START = 1
30 #define RCR2_VAL_RESET (0x02u) // RESET = 1
31 #define RCR3_VAL (0x00u)
32 #define RCR5_VAL_EXTAL (0x01u) // RCKSEL = connect EXTAL
33 #define RCR5_VAL_RTCX1 (0x00u) // RCKSEL = disconnect EXTAL
34 #define RFRH_VAL_13333 (0x8003u) // 13.3333MHz (= 64Hz * 0x32DCD)
35 #define RFRL_VAL_13333 (0x2DCDu) //
36 #define RFRH_VAL_MAX (0x0007u) // MAX value (= 128Hz * 0x7FFFF)
37 #define RFRL_VAL_MAX (0xFFFFu) //
39 #define MASK_00_03_POS (0x000Fu)
40 #define MASK_04_07_POS (0x00F0u)
41 #define MASK_08_11_POS (0x0F00u)
42 #define MASK_12_15_POS (0xF000u)
43 #define MASK_16_20_POS (0x000F0000u)
44 #define SHIFT_1_HBYTE (4u)
45 #define SHIFT_2_HBYTE (8u)
46 #define SHIFT_3_HBYTE (12u)
47 #define SHIFT_1BYTE (8u)
48 #define SHIFT_2BYTE (16u)
50 #define TIME_ERROR_VAL (0xFFFFFFFFu)
52 static int rtc_dec8_to_hex(uint8_t dec_val
, uint8_t offset
, int *hex_val
);
53 static int rtc_dec16_to_hex(uint16_t dec_val
, uint16_t offset
, int *hex_val
);
54 static uint8_t rtc_hex8_to_dec(uint8_t hex_val
);
55 static uint16_t rtc_hex16_to_dec(uint16_t hex_val
);
59 * Setup the RTC based on a time structure.
60 * The rtc_init function should be executed first.
67 volatile uint8_t dummy_read
;
69 // Set control register
70 RTC
.RCR2
= RCR2_VAL_ALLSTOP
;
71 RTC
.RCR1
= RCR1_VAL_ON
;
73 RTC
.RCR5
= RCR5_VAL_EXTAL
;
74 RTC
.RFRH
= RFRH_VAL_13333
;
75 RTC
.RFRL
= RFRL_VAL_13333
;
78 dummy_read
= RTC
.RCR2
;
79 dummy_read
= RTC
.RCR2
;
81 RTC
.RCR2
= RCR2_VAL_RESET
; // RESET = 1
84 dummy_read
= RTC
.RCR2
;
85 dummy_read
= RTC
.RCR2
;
87 // Set timer and alarm. Default value :01-01-1970 00:00:00
104 dummy_read
= RTC
.RYRCNT
;
105 dummy_read
= RTC
.RYRCNT
;
111 * Release the RTC based on a time structure.
117 void rtc_free(void) {
118 volatile uint8_t dummy_read
;
120 // Set control register
121 RTC
.RCR2
= RCR2_VAL_ALLSTOP
;
122 RTC
.RCR1
= RCR1_VAL_OFF
;
124 RTC
.RCR5
= RCR5_VAL_RTCX1
;
125 RTC
.RFRH
= RFRH_VAL_MAX
;
126 RTC
.RFRL
= RFRL_VAL_MAX
;
129 dummy_read
= RTC
.RCR2
;
130 dummy_read
= RTC
.RCR2
;
131 RTC
.RCR2
= RCR2_VAL_RESET
; // RESET = 1
134 dummy_read
= RTC
.RCR2
;
135 dummy_read
= RTC
.RCR2
;
137 // Set timer and alarm. Default value :01-01-1970 00:00:00
154 dummy_read
= RTC
.RYRCNT
;
155 dummy_read
= RTC
.RYRCNT
;
161 * Check the RTC has been enabled.
162 * Clock Control Register RTC.RCR1(bit3): 0 = Disabled, 1 = Enabled.
166 * 0:Disabled, 1:Enabled.
168 int rtc_isenabled(void) {
171 if ((RTC
.RCR1
& RCR1_VAL_ON
) != 0) { // RTC ON ?
184 * UNIX timestamp value.
186 time_t rtc_read(void) {
193 if (rtc_isenabled() != 0) {
194 RTC
.RCR1
&= ~0x10u
; // CIE = 0
196 // before reading process
197 tmp_regdata
= RTC
.RCR1
;
198 tmp_regdata
&= ~0x80u
; // CF = 0
199 tmp_regdata
|= 0x01u
; // AF = 1
200 RTC
.RCR1
= tmp_regdata
;
203 err
= rtc_dec8_to_hex(RTC
.RSECCNT
, 0 , &timeinfo
.tm_sec
);
204 err
+= rtc_dec8_to_hex(RTC
.RMINCNT
, 0 , &timeinfo
.tm_min
);
205 err
+= rtc_dec8_to_hex(RTC
.RHRCNT
, 0 , &timeinfo
.tm_hour
);
206 err
+= rtc_dec8_to_hex(RTC
.RDAYCNT
, 0 , &timeinfo
.tm_mday
);
207 err
+= rtc_dec8_to_hex(RTC
.RMONCNT
, 1 , &timeinfo
.tm_mon
);
208 err
+= rtc_dec16_to_hex(RTC
.RYRCNT
, 1900 , &timeinfo
.tm_year
);
209 } while ((RTC
.RCR1
& 0x80u
) != 0);
215 // Convert to timestamp
216 t
= mktime(&timeinfo
);
226 * Dec(8bit) to Hex function for RTC.
228 * dec_val:Decimal value (from 0x00 to 0x99).
229 * offset:Subtract offset from dec_val.
230 * hex_val:Pointer of output hexadecimal value.
235 static int rtc_dec8_to_hex(uint8_t dec_val
, uint8_t offset
, int *hex_val
) {
239 if (hex_val
!= NULL
) {
240 if (((dec_val
& MASK_04_07_POS
) >= (0x0A << SHIFT_1_HBYTE
)) ||
241 ((dec_val
& MASK_00_03_POS
) >= 0x0A)) {
244 ret_val
= ((dec_val
& MASK_04_07_POS
) >> SHIFT_1_HBYTE
) * 10 +
245 (dec_val
& MASK_00_03_POS
);
246 if (ret_val
< offset
) {
249 *hex_val
= ret_val
- offset
;
260 * Dec(16bit) to Hex function for RTC
262 * dec_val:Decimal value (from 0x0000 to 0x9999).
263 * offset:Subtract offset from dec_val.
264 * hex_val:Pointer of output hexadecimal value.
269 static int rtc_dec16_to_hex(uint16_t dec_val
, uint16_t offset
, int *hex_val
) {
273 if (hex_val
!= NULL
) {
274 if (((dec_val
& MASK_12_15_POS
) >= (0x0A << SHIFT_3_HBYTE
)) ||
275 ((dec_val
& MASK_08_11_POS
) >= (0x0A << SHIFT_2_HBYTE
)) ||
276 ((dec_val
& MASK_04_07_POS
) >= (0x0A << SHIFT_1_HBYTE
)) ||
277 ((dec_val
& MASK_00_03_POS
) >= 0x0A)) {
281 ret_val
= (((dec_val
& MASK_12_15_POS
)) >> SHIFT_3_HBYTE
) * 1000 +
282 (((dec_val
& MASK_08_11_POS
)) >> SHIFT_2_HBYTE
) * 100 +
283 (((dec_val
& MASK_04_07_POS
)) >> SHIFT_1_HBYTE
) * 10 +
284 (dec_val
& MASK_00_03_POS
);
285 if (ret_val
< offset
) {
288 *hex_val
= ret_val
- offset
;
300 * t:UNIX timestamp value
304 void rtc_write(time_t t
) {
306 struct tm
*timeinfo
= localtime(&t
);
307 volatile uint16_t dummy_read
;
309 if (rtc_isenabled() != 0) {
310 RTC
.RCR2
= RCR2_VAL_ALLSTOP
;
311 dummy_read
= (uint16_t)RTC
.RCR2
;
312 dummy_read
= (uint16_t)RTC
.RCR2
;
313 RTC
.RCR2
= RCR2_VAL_RESET
; // RESET = 1
314 dummy_read
= (uint16_t)RTC
.RCR2
;
315 dummy_read
= (uint16_t)RTC
.RCR2
;
317 RTC
.RSECCNT
= rtc_hex8_to_dec(timeinfo
->tm_sec
);
318 RTC
.RMINCNT
= rtc_hex8_to_dec(timeinfo
->tm_min
);
319 RTC
.RHRCNT
= rtc_hex8_to_dec(timeinfo
->tm_hour
);
320 RTC
.RDAYCNT
= rtc_hex8_to_dec(timeinfo
->tm_mday
);
321 RTC
.RMONCNT
= rtc_hex8_to_dec(timeinfo
->tm_mon
+ 1);
322 RTC
.RYRCNT
= rtc_hex16_to_dec(timeinfo
->tm_year
+ 1900);
323 dummy_read
= (uint16_t)RTC
.RYRCNT
;
324 dummy_read
= (uint16_t)RTC
.RYRCNT
;
326 RTC
.RCR2
= RCR2_VAL_START
; // START = 1
328 dummy_read
= (uint16_t)RTC
.RCR2
;
329 dummy_read
= (uint16_t)RTC
.RCR2
;
334 * HEX to Dec(8bit) function for RTC.
336 * hex_val:Hexadecimal value.
338 * decimal value:From 0x00 to 0x99.
340 static uint8_t rtc_hex8_to_dec(uint8_t hex_val
) {
343 calc_data
= hex_val
/ 10 * 0x10;
344 calc_data
+= hex_val
% 10;
346 if (calc_data
> 0x99) {
350 return (uint8_t)calc_data
;
354 * HEX to Dec(16bit) function for RTC.
356 * hex_val:Hexadecimal value.
358 * decimal value:From 0x0000 to 0x9999.
360 static uint16_t rtc_hex16_to_dec(uint16_t hex_val
) {
362 calc_data
= hex_val
/ 1000 * 0x1000;
363 calc_data
+= ((hex_val
/ 100) % 10) * 0x100;
364 calc_data
+= ((hex_val
/ 10) % 10) * 0x10;
365 calc_data
+= hex_val
% 10;
367 if (calc_data
> 0x9999) {
370 return (uint16_t)calc_data
;
374 #endif /* DEVICE_RTC */