tool/mbed/mbed-sdk/libraries/net/eth/lwip-eth/arch/TARGET_STM/stm32f4_emac.c

   1
   2 #include "stm32f4xx_hal.h"
   3 #include "lwip/opt.h"
   4
   5 #include "lwip/timers.h"
   6 #include "netif/etharp.h"
   7 #include "lwip/tcpip.h"
   8 #include <string.h>
   9 #include "cmsis_os.h"
  10 #include "mbed_interface.h"
  11
  12 /** @defgroup lwipstm32f4xx_emac_DRIVER stm32f4 EMAC driver for LWIP
  13  * @ingroup lwip_emac
  14  *
  15  * @{
  16  */
  17
  18 #define RECV_TASK_PRI           (osPriorityHigh)
  19 #define PHY_TASK_PRI            (osPriorityLow)
  20 #define PHY_TASK_WAIT           (200)
  21
  22
  23 #if defined (__ICCARM__)   /*!< IAR Compiler */
  24   #pragma data_alignment=4
  25 #endif
  26 __ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END; /* Ethernet Rx MA Descriptor */
  27
  28 #if defined (__ICCARM__)   /*!< IAR Compiler */
  29   #pragma data_alignment=4
  30 #endif
  31 __ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END; /* Ethernet Tx DMA Descriptor */
  32
  33 #if defined (__ICCARM__)   /*!< IAR Compiler */
  34   #pragma data_alignment=4
  35 #endif
  36 __ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
  37
  38 #if defined (__ICCARM__)   /*!< IAR Compiler */
  39   #pragma data_alignment=4
  40 #endif
  41 __ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
  42
  43
  44 ETH_HandleTypeDef heth;
  45
  46 static sys_sem_t rx_ready_sem;    /* receive ready semaphore */
  47 static sys_mutex_t tx_lock_mutex;
  48
  49 /* function */
  50 static void stm32f4_rx_task(void *arg);
  51 static void stm32f4_phy_task(void *arg);
  52 static err_t stm32f4_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr);
  53 static err_t stm32f4_low_level_output(struct netif *netif, struct pbuf *p);
  54
  55 /**
  56  * Override HAL Eth Init function
  57  */
  58 void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
  59 {
  60     GPIO_InitTypeDef GPIO_InitStruct;
  61     if (heth->Instance == ETH) {
  62         /* Peripheral clock enable */
  63         __ETH_CLK_ENABLE();
  64
  65         __GPIOA_CLK_ENABLE();
  66         __GPIOB_CLK_ENABLE();
  67         __GPIOC_CLK_ENABLE();
  68
  69         /**ETH GPIO Configuration
  70            PC1     ------> ETH_MDC
  71            PA1     ------> ETH_REF_CLK
  72            PA2     ------> ETH_MDIO
  73            PA7     ------> ETH_CRS_DV
  74            PC4     ------> ETH_RXD0
  75            PC5     ------> ETH_RXD1
  76            PB11     ------> ETH_TX_EN
  77            PB12     ------> ETH_TXD0
  78            PB13     ------> ETH_TXD1
  79          */
  80         GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
  81         GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  82         GPIO_InitStruct.Pull = GPIO_NOPULL;
  83         GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
  84         GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
  85         HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  86
  87         GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
  88         GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  89         GPIO_InitStruct.Pull = GPIO_NOPULL;
  90         GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
  91         GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
  92         HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  93
  94         GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
  95         GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  96         GPIO_InitStruct.Pull = GPIO_NOPULL;
  97         GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
  98         GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
  99         HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 100
 101         /* Peripheral interrupt init*/
 102         /* Sets the priority grouping field */
 103         HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 104         HAL_NVIC_SetPriority(ETH_IRQn, 0, 0);
 105         HAL_NVIC_EnableIRQ(ETH_IRQn);
 106     }
 107 }
 108
 109 /**
 110  * Override HAL Eth DeInit function
 111  */
 112 void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
 113 {
 114     if (heth->Instance == ETH) {
 115         /* Peripheral clock disable */
 116         __ETH_CLK_DISABLE();
 117
 118         /**ETH GPIO Configuration
 119            PC1     ------> ETH_MDC
 120            PA1     ------> ETH_REF_CLK
 121            PA2     ------> ETH_MDIO
 122            PA7     ------> ETH_CRS_DV
 123            PC4     ------> ETH_RXD0
 124            PC5     ------> ETH_RXD1
 125            PB11     ------> ETH_TX_EN
 126            PB12     ------> ETH_TXD0
 127            PB13     ------> ETH_TXD1
 128          */
 129         HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
 130
 131         HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
 132
 133         HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13);
 134
 135         /* Peripheral interrupt Deinit*/
 136         HAL_NVIC_DisableIRQ(ETH_IRQn);
 137     }
 138 }
 139
 140 /**
 141  * Ethernet Rx Transfer completed callback
 142  *
 143  * @param  heth: ETH handle
 144  * @retval None
 145  */
 146 void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
 147 {
 148
 149     sys_sem_signal(&rx_ready_sem);
 150 }
 151
 152
 153 /**
 154  * Ethernet IRQ Handler
 155  *
 156  * @param  None
 157  * @retval None
 158  */
 159 void ETH_IRQHandler(void)
 160 {
 161     HAL_ETH_IRQHandler(&heth);
 162 }
 163
 164
 165
 166 /**
 167  * In this function, the hardware should be initialized.
 168  * Called from eth_arch_enetif_init().
 169  *
 170  * @param netif the already initialized lwip network interface structure
 171  *        for this ethernetif
 172  */
 173 static void stm32f4_low_level_init(struct netif *netif)
 174 {
 175     uint32_t regvalue = 0;
 176     HAL_StatusTypeDef hal_eth_init_status;
 177
 178     /* Init ETH */
 179     uint8_t MACAddr[6];
 180     heth.Instance = ETH;
 181     heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
 182     heth.Init.Speed = ETH_SPEED_10M;
 183     heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
 184     heth.Init.PhyAddress = 1;
 185 #if (MBED_MAC_ADDRESS_SUM != MBED_MAC_ADDR_INTERFACE)
 186     MACAddr[0] = MBED_MAC_ADDR_0;
 187     MACAddr[1] = MBED_MAC_ADDR_1;
 188     MACAddr[2] = MBED_MAC_ADDR_2;
 189     MACAddr[3] = MBED_MAC_ADDR_3;
 190     MACAddr[4] = MBED_MAC_ADDR_4;
 191     MACAddr[5] = MBED_MAC_ADDR_5;
 192 #else
 193         mbed_mac_address((char *)MACAddr);
 194 #endif
 195     heth.Init.MACAddr = &MACAddr[0];
 196     heth.Init.RxMode = ETH_RXINTERRUPT_MODE;
 197     heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
 198     heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
 199     hal_eth_init_status = HAL_ETH_Init(&heth);
 200
 201     if (hal_eth_init_status == HAL_OK) {
 202        /* Set netif link flag */
 203        netif->flags |= NETIF_FLAG_LINK_UP;
 204    }
 205
 206     /* Initialize Tx Descriptors list: Chain Mode */
 207     HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
 208
 209     /* Initialize Rx Descriptors list: Chain Mode  */
 210     HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
 211
 212  #if LWIP_ARP || LWIP_ETHERNET
 213     /* set MAC hardware address length */
 214     netif->hwaddr_len = ETHARP_HWADDR_LEN;
 215
 216     /* set MAC hardware address */
 217     netif->hwaddr[0] = heth.Init.MACAddr[0];
 218     netif->hwaddr[1] = heth.Init.MACAddr[1];
 219     netif->hwaddr[2] = heth.Init.MACAddr[2];
 220     netif->hwaddr[3] = heth.Init.MACAddr[3];
 221     netif->hwaddr[4] = heth.Init.MACAddr[4];
 222     netif->hwaddr[5] = heth.Init.MACAddr[5];
 223
 224     /* maximum transfer unit */
 225     netif->mtu = 1500;
 226
 227     /* device capabilities */
 228     /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
 229     netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
 230
 231     /* Enable MAC and DMA transmission and reception */
 232     HAL_ETH_Start(&heth);
 233
 234     /**** Configure PHY to generate an interrupt when Eth Link state changes ****/
 235     /* Read Register Configuration */
 236     HAL_ETH_ReadPHYRegister(&heth, PHY_MICR, &regvalue);
 237
 238     regvalue |= (PHY_MICR_INT_EN | PHY_MICR_INT_OE);
 239
 240     /* Enable Interrupts */
 241     HAL_ETH_WritePHYRegister(&heth, PHY_MICR, regvalue);
 242
 243     /* Read Register Configuration */
 244     HAL_ETH_ReadPHYRegister(&heth, PHY_MISR, &regvalue);
 245
 246     regvalue |= PHY_MISR_LINK_INT_EN;
 247
 248     /* Enable Interrupt on change of link status */
 249     HAL_ETH_WritePHYRegister(&heth, PHY_MISR, regvalue);
 250 #endif
 251 }
 252
 253 /**
 254  * This function should do the actual transmission of the packet. The packet is
 255  * contained in the pbuf that is passed to the function. This pbuf
 256  * might be chained.
 257  *
 258  * @param netif the lwip network interface structure for this ethernetif
 259  * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
 260  * @return ERR_OK if the packet could be sent
 261  *         an err_t value if the packet couldn't be sent
 262  *
 263  * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
 264  *       strange results. You might consider waiting for space in the DMA queue
 265  *       to become availale since the stack doesn't retry to send a packet
 266  *       dropped because of memory failure (except for the TCP timers).
 267  */
 268
 269 static err_t stm32f4_low_level_output(struct netif *netif, struct pbuf *p)
 270 {
 271     err_t errval;
 272     struct pbuf *q;
 273     uint8_t *buffer = (uint8_t*)(heth.TxDesc->Buffer1Addr);
 274     __IO ETH_DMADescTypeDef *DmaTxDesc;
 275     uint32_t framelength = 0;
 276     uint32_t bufferoffset = 0;
 277     uint32_t byteslefttocopy = 0;
 278     uint32_t payloadoffset = 0;
 279     DmaTxDesc = heth.TxDesc;
 280     bufferoffset = 0;
 281
 282
 283     sys_mutex_lock(&tx_lock_mutex);
 284
 285     /* copy frame from pbufs to driver buffers */
 286     for (q = p; q != NULL; q = q->next) {
 287         /* Is this buffer available? If not, goto error */
 288         if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
 289             errval = ERR_USE;
 290             goto error;
 291         }
 292
 293         /* Get bytes in current lwIP buffer */
 294         byteslefttocopy = q->len;
 295         payloadoffset = 0;
 296
 297         /* Check if the length of data to copy is bigger than Tx buffer size*/
 298         while ((byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE) {
 299             /* Copy data to Tx buffer*/
 300             memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset));
 301
 302             /* Point to next descriptor */
 303             DmaTxDesc = (ETH_DMADescTypeDef*)(DmaTxDesc->Buffer2NextDescAddr);
 304
 305             /* Check if the buffer is available */
 306             if ((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET) {
 307                 errval = ERR_USE;
 308                 goto error;
 309             }
 310
 311             buffer = (uint8_t*)(DmaTxDesc->Buffer1Addr);
 312
 313             byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
 314             payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
 315             framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
 316             bufferoffset = 0;
 317         }
 318
 319         /* Copy the remaining bytes */
 320         memcpy((uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy);
 321         bufferoffset = bufferoffset + byteslefttocopy;
 322         framelength = framelength + byteslefttocopy;
 323     }
 324
 325     /* Prepare transmit descriptors to give to DMA */
 326     HAL_ETH_TransmitFrame(&heth, framelength);
 327
 328     errval = ERR_OK;
 329
 330 error:
 331
 332     /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
 333     if ((heth.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET) {
 334         /* Clear TUS ETHERNET DMA flag */
 335         heth.Instance->DMASR = ETH_DMASR_TUS;
 336
 337         /* Resume DMA transmission*/
 338         heth.Instance->DMATPDR = 0;
 339     }
 340
 341     sys_mutex_unlock(&tx_lock_mutex);
 342
 343     return errval;
 344 }
 345
 346
 347 /**
 348  * Should allocate a pbuf and transfer the bytes of the incoming
 349  * packet from the interface into the pbuf.
 350  *
 351  * @param netif the lwip network interface structure for this ethernetif
 352  * @return a pbuf filled with the received packet (including MAC header)
 353  *         NULL on memory error
 354  */
 355 static struct pbuf * stm32f4_low_level_input(struct netif *netif)
 356 {
 357     struct pbuf *p = NULL;
 358     struct pbuf *q;
 359     uint16_t len = 0;
 360     uint8_t *buffer;
 361     __IO ETH_DMADescTypeDef *dmarxdesc;
 362     uint32_t bufferoffset = 0;
 363     uint32_t payloadoffset = 0;
 364     uint32_t byteslefttocopy = 0;
 365     uint32_t i = 0;
 366
 367
 368     /* get received frame */
 369     if (HAL_ETH_GetReceivedFrame(&heth) != HAL_OK)
 370         return NULL;
 371
 372     /* Obtain the size of the packet and put it into the "len" variable. */
 373     len = heth.RxFrameInfos.length;
 374     buffer = (uint8_t*)heth.RxFrameInfos.buffer;
 375
 376     if (len > 0) {
 377         /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
 378         p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
 379     }
 380
 381     if (p != NULL) {
 382         dmarxdesc = heth.RxFrameInfos.FSRxDesc;
 383         bufferoffset = 0;
 384         for (q = p; q != NULL; q = q->next) {
 385             byteslefttocopy = q->len;
 386             payloadoffset = 0;
 387
 388             /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
 389             while ((byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE) {
 390                 /* Copy data to pbuf */
 391                 memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
 392
 393                 /* Point to next descriptor */
 394                 dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
 395                 buffer = (uint8_t*)(dmarxdesc->Buffer1Addr);
 396
 397                 byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
 398                 payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
 399                 bufferoffset = 0;
 400             }
 401             /* Copy remaining data in pbuf */
 402             memcpy((uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
 403             bufferoffset = bufferoffset + byteslefttocopy;
 404         }
 405
 406         /* Release descriptors to DMA */
 407         /* Point to first descriptor */
 408         dmarxdesc = heth.RxFrameInfos.FSRxDesc;
 409         /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
 410         for (i = 0; i < heth.RxFrameInfos.SegCount; i++) {
 411             dmarxdesc->Status |= ETH_DMARXDESC_OWN;
 412             dmarxdesc = (ETH_DMADescTypeDef*)(dmarxdesc->Buffer2NextDescAddr);
 413         }
 414
 415         /* Clear Segment_Count */
 416         heth.RxFrameInfos.SegCount = 0;
 417     }
 418
 419     /* When Rx Buffer unavailable flag is set: clear it and resume reception */
 420     if ((heth.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET) {
 421         /* Clear RBUS ETHERNET DMA flag */
 422         heth.Instance->DMASR = ETH_DMASR_RBUS;
 423         /* Resume DMA reception */
 424         heth.Instance->DMARPDR = 0;
 425     }
 426     return p;
 427 }
 428
 429 /**
 430  * This task receives input data
 431  *
 432  * \param[in] netif the lwip network interface structure
 433  */
 434 static void stm32f4_rx_task(void *arg)
 435 {
 436     struct netif   *netif = (struct netif*)arg;
 437     struct pbuf    *p;
 438
 439     while (1) {
 440         sys_arch_sem_wait(&rx_ready_sem, 0);
 441         p = stm32f4_low_level_input(netif);
 442         if (p != NULL) {
 443             if (netif->input(p, netif) != ERR_OK) {
 444                 pbuf_free(p);
 445                 p = NULL;
 446             }
 447         }
 448     }
 449 }
 450
 451 /**
 452  * This task checks phy link status and updates net status
 453  *
 454  * \param[in] netif the lwip network interface structure
 455  */
 456 static void stm32f4_phy_task(void *arg)
 457 {
 458     struct netif   *netif = (struct netif*)arg;
 459     uint32_t phy_status = 0;
 460
 461     while (1) {
 462         uint32_t status;
 463         if (HAL_ETH_ReadPHYRegister(&heth, PHY_SR, &status) == HAL_OK) {
 464             if ((status & PHY_LINK_STATUS) && !(phy_status & PHY_LINK_STATUS)) {
 465                 tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_up, (void*) netif, 1);
 466             } else if (!(status & PHY_LINK_STATUS) && (phy_status & PHY_LINK_STATUS)) {
 467                 tcpip_callback_with_block((tcpip_callback_fn)netif_set_link_down, (void*) netif, 1);
 468             }
 469
 470             phy_status = status;
 471         }
 472
 473         osDelay(PHY_TASK_WAIT);
 474     }
 475 }
 476
 477 /**
 478  * This function is the ethernet packet send function. It calls
 479  * etharp_output after checking link status.
 480  *
 481  * \param[in] netif the lwip network interface structure for this lpc_enetif
 482  * \param[in] q Pointer to pbug to send
 483  * \param[in] ipaddr IP address
 484  * \return ERR_OK or error code
 485  */
 486 static err_t stm32f4_etharp_output(struct netif *netif, struct pbuf *q, ip_addr_t *ipaddr)
 487 {
 488     /* Only send packet is link is up */
 489     if (netif->flags & NETIF_FLAG_LINK_UP) {
 490         return etharp_output(netif, q, ipaddr);
 491     }
 492
 493     return ERR_CONN;
 494 }
 495
 496 /**
 497  * Should be called at the beginning of the program to set up the
 498  * network interface.
 499  *
 500  * This function should be passed as a parameter to netif_add().
 501  *
 502  * @param[in] netif the lwip network interface structure for this lpc_enetif
 503  * @return ERR_OK if the loopif is initialized
 504  *         ERR_MEM if private data couldn't be allocated
 505  *         any other err_t on error
 506  */
 507 err_t eth_arch_enetif_init(struct netif *netif)
 508 {
 509     /* set MAC hardware address */
 510     netif->hwaddr_len = ETHARP_HWADDR_LEN;
 511
 512     /* maximum transfer unit */
 513     netif->mtu = 1500;
 514
 515     /* device capabilities */
 516     netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET | NETIF_FLAG_IGMP;
 517
 518 #if LWIP_NETIF_HOSTNAME
 519     /* Initialize interface hostname */
 520     netif->hostname = "lwipstm32f4";
 521 #endif /* LWIP_NETIF_HOSTNAME */
 522
 523     netif->name[0] = 'e';
 524     netif->name[1] = 'n';
 525
 526     netif->output = stm32f4_etharp_output;
 527     netif->linkoutput = stm32f4_low_level_output;
 528
 529     /* semaphore */
 530     sys_sem_new(&rx_ready_sem, 0);
 531
 532     sys_mutex_new(&tx_lock_mutex);
 533
 534     /* task */
 535     sys_thread_new("stm32f4_recv_task", stm32f4_rx_task, netif, DEFAULT_THREAD_STACKSIZE, RECV_TASK_PRI);
 536     sys_thread_new("stm32f4_phy_task", stm32f4_phy_task, netif, DEFAULT_THREAD_STACKSIZE, PHY_TASK_PRI);
 537
 538     /* initialize the hardware */
 539     stm32f4_low_level_init(netif);
 540
 541     return ERR_OK;
 542 }
 543
 544 void eth_arch_enable_interrupts(void)
 545 {
 546     HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 547     HAL_NVIC_SetPriority(ETH_IRQn, 0, 0);
 548     HAL_NVIC_EnableIRQ(ETH_IRQn);
 549 }
 550
 551 void eth_arch_disable_interrupts(void)
 552 {
 553     NVIC_DisableIRQ(ETH_IRQn);
 554 }
 555
 556 /**
 557  * @}
 558  */
 559
 560 /* --------------------------------- End Of File ------------------------------ */