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[tmk_keyboard.git] / tool / mbed / mbed-sdk / libraries / rtos / rtx / TARGET_CORTEX_A / RTX_Conf_CA.c
1 /*----------------------------------------------------------------------------
2 * RL-ARM - RTX
3 *----------------------------------------------------------------------------
4 * Name: RTX_Conf_CM.C
5 * Purpose: Configuration of CMSIS RTX Kernel
6 * Rev.: V4.60
7 *----------------------------------------------------------------------------
8 *
9 * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
10 * All rights reserved.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 * - Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * - Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * - Neither the name of ARM nor the names of its contributors may be used
19 * to endorse or promote products derived from this software without
20 * specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 *---------------------------------------------------------------------------*/
34
35 #include "cmsis_os.h"
36
37 /*----------------------------------------------------------------------------
38 * RTX User configuration part BEGIN
39 *---------------------------------------------------------------------------*/
40
41 //-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
42 //
43 // <h>Thread Configuration
44 // =======================
45 //
46 // <o>Number of concurrent running threads <0-250>
47 // <i> Defines max. number of threads that will run at the same time.
48 // <i> Default: 6
49 #ifndef OS_TASKCNT
50 #define OS_TASKCNT 25
51 #endif
52
53 // <o>Default Thread stack size [bytes] <64-4096:8><#/4>
54 // <i> Defines default stack size for threads with osThreadDef stacksz = 0
55 // <i> Default: 200
56 #ifndef OS_STKSIZE
57 #define OS_STKSIZE 200
58 #endif
59
60 // <o>Main Thread stack size [bytes] <64-4096:8><#/4>
61 // <i> Defines stack size for main thread.
62 // <i> Default: 200
63 #ifndef OS_MAINSTKSIZE
64 #define OS_MAINSTKSIZE 2048
65 #endif
66
67 // <o>Number of threads with user-provided stack size <0-250>
68 // <i> Defines the number of threads with user-provided stack size.
69 // <i> Default: 0
70 #ifndef OS_PRIVCNT
71 #define OS_PRIVCNT 10
72 #endif
73
74 // <o>Total stack size [bytes] for threads with user-provided stack size <0-4096:8><#/4>
75 // <i> Defines the combined stack size for threads with user-provided stack size.
76 // <i> Default: 0
77 #ifndef OS_PRIVSTKSIZE
78 #define OS_PRIVSTKSIZE 8192
79 #endif
80
81 // <q>Check for stack overflow
82 // <i> Includes the stack checking code for stack overflow.
83 // <i> Note that additional code reduces the Kernel performance.
84 #ifndef OS_STKCHECK
85 #define OS_STKCHECK 1
86 #endif
87
88 // <o>Processor mode for thread execution
89 // <0=> Unprivileged mode
90 // <1=> Privileged mode
91 // <i> Default: Privileged mode
92 #ifndef OS_RUNPRIV
93 #define OS_RUNPRIV 1
94 #endif
95
96 // </h>
97
98 // <h>RTX Kernel Timer Tick Configuration
99 // ======================================
100 // <q> Use Cortex-M SysTick timer as RTX Kernel Timer
101 // <i> Use the Cortex-M SysTick timer as a time-base for RTX.
102 #ifndef OS_SYSTICK
103 #define OS_SYSTICK 0
104 #endif
105 //
106 // <o>Timer clock value [Hz] <1-1000000000>
107 // <i> Defines the timer clock value.
108 // <i> Default: 12000000 (12MHz)
109 #ifndef OS_CLOCK
110 # if defined(TARGET_RZ_A1H)
111 #define OS_CLOCK 12000000
112 # else
113 # error "no target defined"
114 # endif
115 #endif
116
117 // <o>Timer tick value [us] <1-1000000>
118 // <i> Defines the timer tick value.
119 // <i> Default: 1000 (1ms)
120 #ifndef OS_TICK
121 #define OS_TICK 1000
122 #endif
123
124 // </h>
125
126 // <h>System Configuration
127 // =======================
128 //
129 // <e>Round-Robin Thread switching
130 // ===============================
131 //
132 // <i> Enables Round-Robin Thread switching.
133 #ifndef OS_ROBIN
134 #define OS_ROBIN 1
135 #endif
136
137 // <o>Round-Robin Timeout [ticks] <1-1000>
138 // <i> Defines how long a thread will execute before a thread switch.
139 // <i> Default: 5
140 #ifndef OS_ROBINTOUT
141 #define OS_ROBINTOUT 5
142 #endif
143
144 // </e>
145
146 // <e>User Timers
147 // ==============
148 // <i> Enables user Timers
149 #ifndef OS_TIMERS
150 #define OS_TIMERS 1
151 #endif
152
153 // <o>Timer Thread Priority
154 // <1=> Low
155 // <2=> Below Normal <3=> Normal <4=> Above Normal
156 // <5=> High
157 // <6=> Realtime (highest)
158 // <i> Defines priority for Timer Thread
159 // <i> Default: High
160 #ifndef OS_TIMERPRIO
161 #define OS_TIMERPRIO 5
162 #endif
163
164 // <o>Timer Thread stack size [bytes] <64-4096:8><#/4>
165 // <i> Defines stack size for Timer thread.
166 // <i> Default: 200
167 #ifndef OS_TIMERSTKSZ
168 #define OS_TIMERSTKSZ WORDS_STACK_SIZE
169 #endif
170
171 // <o>Timer Callback Queue size <1-32>
172 // <i> Number of concurrent active timer callback functions.
173 // <i> Default: 4
174 #ifndef OS_TIMERCBQS
175 #define OS_TIMERCBQS 4
176 #endif
177
178 // </e>
179
180 // <o>ISR FIFO Queue size<4=> 4 entries <8=> 8 entries
181 // <12=> 12 entries <16=> 16 entries
182 // <24=> 24 entries <32=> 32 entries
183 // <48=> 48 entries <64=> 64 entries
184 // <96=> 96 entries
185 // <i> ISR functions store requests to this buffer,
186 // <i> when they are called from the interrupt handler.
187 // <i> Default: 16 entries
188 #ifndef OS_FIFOSZ
189 #define OS_FIFOSZ 16
190 #endif
191
192 // </h>
193
194 //------------- <<< end of configuration section >>> -----------------------
195
196 // Standard library system mutexes
197 // ===============================
198 // Define max. number system mutexes that are used to protect
199 // the arm standard runtime library. For microlib they are not used.
200 #ifndef OS_MUTEXCNT
201 #define OS_MUTEXCNT 12
202 #endif
203
204 /*----------------------------------------------------------------------------
205 * RTX User configuration part END
206 *---------------------------------------------------------------------------*/
207
208 #define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
209
210
211 /*----------------------------------------------------------------------------
212 * Global Functions
213 *---------------------------------------------------------------------------*/
214
215 /*--------------------------- os_idle_demon ---------------------------------*/
216
217 void os_idle_demon (void) {
218 /* The idle demon is a system thread, running when no other thread is */
219 /* ready to run. */
220
221 for (;;) {
222 /* HERE: include optional user code to be executed when no thread runs.*/
223 }
224 }
225
226 #if (OS_SYSTICK == 0) // Functions for alternative timer as RTX kernel timer
227
228 /*--------------------------- os_tick_init ----------------------------------*/
229 #ifdef TARGET_RZ_A1H
230 #define OSTM0 (0xFCFEC000uL) /* OSTM0 */
231 #define OSTM1 (0xFCFEC400uL) /* OSTM1 */
232 #define CPG (0xFCFE0410uL) /* CPG */
233
234 #define CPGSTBCR5 (*((volatile unsigned char*)(CPG + 0x00000018uL)))
235
236 #define OSTM0CMP (*((volatile unsigned long*)(OSTM0 + 0x00000000uL)))
237 #define OSTM0CNT (*((volatile unsigned long*)(OSTM0 + 0x00000004uL)))
238 #define OSTM0TE (*((volatile unsigned char*)(OSTM0 + 0x00000010uL)))
239 #define OSTM0TS (*((volatile unsigned char*)(OSTM0 + 0x00000014uL)))
240 #define OSTM0TT (*((volatile unsigned char*)(OSTM0 + 0x00000018uL)))
241 #define OSTM0CTL (*((volatile unsigned char*)(OSTM0 + 0x00000020uL)))
242
243 #define OSTM1CMP (*((volatile unsigned long*)(OSTM1 + 0x00000000uL)))
244 #define OSTM1CNT (*((volatile unsigned long*)(OSTM1 + 0x00000004uL)))
245 #define OSTM1TE (*((volatile unsigned char*)(OSTM1 + 0x00000010uL)))
246 #define OSTM1TS (*((volatile unsigned char*)(OSTM1 + 0x00000014uL)))
247 #define OSTM1TT (*((volatile unsigned char*)(OSTM1 + 0x00000018uL)))
248 #define OSTM1CTL (*((volatile unsigned char*)(OSTM1 + 0x00000020uL)))
249
250 #define CPG_STBCR5_BIT_MSTP51 (0x02u) /* OSTM0 */
251 #define CM1_RENESAS_RZ_A1_P0_CLK ( 32000000u)
252 #define CM0_RENESAS_RZ_A1_P0_CLK ( 33333333u)
253
254 typedef enum
255 {
256 IRQ_SGI0 = 0,
257 IRQ_OSTMI0TINT = 134
258 } IRQn_Type;
259
260 typedef void(*IRQHandler)();
261
262 extern void PendSV_Handler(uint32_t);
263 extern void OS_Tick_Handler(uint32_t);
264 extern uint32_t InterruptHandlerRegister (IRQn_Type irq, IRQHandler handler);
265 #endif
266
267 // Initialize alternative hardware timer as RTX kernel timer
268 // Return: IRQ number of the alternative hardware timer
269 int os_tick_init (void) {
270 #ifdef TARGET_RZ_A1H
271 CPGSTBCR5 &= ~(CPG_STBCR5_BIT_MSTP51); /* enable OSTM0 clock */
272
273 OSTM0TT = 0x1; /* Stop the counter and clears the OSTM0TE bit. */
274 OSTM0CTL = 0x1; /* Interval timer mode. Interrupt enabled */
275
276 OSTM0CMP = (uint32_t)(((double)CM0_RENESAS_RZ_A1_P0_CLK*(double)OS_TICK)/1E6);
277
278 OSTM0TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
279
280 InterruptHandlerRegister(IRQ_SGI0 , (IRQHandler)PendSV_Handler);
281 InterruptHandlerRegister(IRQ_OSTMI0TINT, (IRQHandler)OS_Tick_Handler);
282
283
284 return IRQ_OSTMI0TINT; /* Return IRQ number of timer (0..239) */
285 /* RTX will set and configure the interrupt */
286 #endif
287 }
288
289 /*--------------------------- os_tick_irqack --------------------------------*/
290
291 // Acknowledge alternative hardware timer interrupt
292 void os_tick_irqack (void) {
293 /* ... */
294 }
295
296 #endif // (OS_SYSTICK == 0)
297
298 /*--------------------------- os_error --------------------------------------*/
299 extern void mbed_die(void);
300
301 void os_error (uint32_t err_code) {
302 /* This function is called when a runtime error is detected. Parameter */
303 /* 'err_code' holds the runtime error code (defined in RTL.H). */
304 mbed_die();
305
306 /* HERE: include optional code to be executed on runtime error. */
307 for (;;);
308 }
309
310
311 /*----------------------------------------------------------------------------
312 * RTX Configuration Functions
313 *---------------------------------------------------------------------------*/
314
315 #include "RTX_CM_lib.h"
316
317 /*----------------------------------------------------------------------------
318 * end of file
319 *---------------------------------------------------------------------------*/
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