]> git.gir.st - tmk_keyboard.git/blob - usb_debug.c
Exceptional handling for PS/2 scan code set 2
[tmk_keyboard.git] / usb_debug.c
1 #include <avr/interrupt.h>
2 #include "usb_debug.h"
3
4
5 // the time remaining before we transmit any partially full
6 // packet, or send a zero length packet.
7 volatile uint8_t debug_flush_timer=0;
8
9
10 // transmit a character. 0 returned on success, -1 on error
11 int8_t usb_debug_putchar(uint8_t c)
12 {
13 static uint8_t previous_timeout=0;
14 uint8_t timeout, intr_state;
15
16 // if we're not online (enumerated and configured), error
17 if (!usb_configured()) return -1;
18 // interrupts are disabled so these functions can be
19 // used from the main program or interrupt context,
20 // even both in the same program!
21 intr_state = SREG;
22 cli();
23 UENUM = DEBUG_TX_ENDPOINT;
24 // if we gave up due to timeout before, don't wait again
25 if (previous_timeout) {
26 if (!(UEINTX & (1<<RWAL))) {
27 SREG = intr_state;
28 return -1;
29 }
30 previous_timeout = 0;
31 }
32 // wait for the FIFO to be ready to accept data
33 timeout = UDFNUML + 4;
34 while (1) {
35 // are we ready to transmit?
36 if (UEINTX & (1<<RWAL)) break;
37 SREG = intr_state;
38 // have we waited too long?
39 if (UDFNUML == timeout) {
40 previous_timeout = 1;
41 return -1;
42 }
43 // has the USB gone offline?
44 if (!usb_configured()) return -1;
45 // get ready to try checking again
46 intr_state = SREG;
47 cli();
48 UENUM = DEBUG_TX_ENDPOINT;
49 }
50 // actually write the byte into the FIFO
51 UEDATX = c;
52 // if this completed a packet, transmit it now!
53 if (!(UEINTX & (1<<RWAL))) {
54 UEINTX = 0x3A;
55 debug_flush_timer = 0;
56 } else {
57 debug_flush_timer = 2;
58 }
59 SREG = intr_state;
60 return 0;
61 }
62
63
64 // immediately transmit any buffered output.
65 void usb_debug_flush_output(void)
66 {
67 uint8_t intr_state;
68
69 intr_state = SREG;
70 cli();
71 if (debug_flush_timer) {
72 UENUM = DEBUG_TX_ENDPOINT;
73 while ((UEINTX & (1<<RWAL))) {
74 UEDATX = 0;
75 }
76 UEINTX = 0x3A;
77 debug_flush_timer = 0;
78 }
79 SREG = intr_state;
80 }
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