tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_pcd.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32l1xx_hal_pcd.h
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    5-September-2014
   7   * @brief   Header file of PCD HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32L1xx_HAL_PCD_H
  40 #define __STM32L1xx_HAL_PCD_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32l1xx_hal_def.h"
  48
  49 /** @addtogroup STM32L1xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup PCD
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /** @defgroup PCD_Exported_Types PCD Exported Types
  59   * @{
  60   */
  61
  62    /**
  63   * @brief  PCD State structures definition
  64   */
  65 typedef enum
  66 {
  67   PCD_READY    = 0x00,
  68   PCD_ERROR    = 0x01,
  69   PCD_BUSY     = 0x02,
  70   PCD_TIMEOUT  = 0x03
  71 } PCD_StateTypeDef;
  72
  73 typedef enum
  74 {
  75   /* double buffered endpoint direction */
  76   PCD_EP_DBUF_OUT,
  77   PCD_EP_DBUF_IN,
  78   PCD_EP_DBUF_ERR,
  79 }PCD_EP_DBUF_DIR;
  80
  81 /* endpoint buffer number */
  82 typedef enum
  83 {
  84   PCD_EP_NOBUF,
  85   PCD_EP_BUF0,
  86   PCD_EP_BUF1
  87 }PCD_EP_BUF_NUM;
  88
  89 /**
  90   * @brief  PCD Initialization Structure definition
  91   */
  92 typedef struct
  93 {
  94   uint32_t dev_endpoints;        /*!< Device Endpoints number.
  95                                       This parameter depends on the used USB core.
  96                                       This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  97
  98   uint32_t speed;                /*!< USB Core speed.
  99                                       This parameter can be any value of @ref USB_Core_Speed                 */
 100
 101   uint32_t ep0_mps;              /*!< Set the Endpoint 0 Max Packet size.
 102                                       This parameter can be any value of @ref USB_EP0_MPS                    */
 103
 104   uint32_t phy_itface;           /*!< Select the used PHY interface.
 105                                       This parameter can be any value of @ref USB_Core_PHY                   */
 106
 107   uint32_t Sof_enable;           /*!< Enable or disable the output of the SOF signal.                        */
 108
 109   uint32_t low_power_enable;       /*!< Enable or disable Low Power mode                                      */
 110
 111   uint32_t lpm_enable;             /*!< Enable or disable Battery charging.                                  */
 112
 113   uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.                                  */
 114
 115 }PCD_InitTypeDef;
 116
 117 typedef struct
 118 {
 119   uint8_t   num;            /*!< Endpoint number
 120                                 This parameter must be a number between Min_Data = 1 and Max_Data = 15    */
 121
 122   uint8_t   is_in;          /*!< Endpoint direction
 123                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 124
 125   uint8_t   is_stall;       /*!< Endpoint stall condition
 126                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 127
 128   uint8_t   type;           /*!< Endpoint type
 129                                  This parameter can be any value of @ref USB_EP_Type                      */
 130
 131   uint16_t  pmaadress;      /*!< PMA Address
 132                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 133
 134
 135   uint16_t  pmaaddr0;       /*!< PMA Address0
 136                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 137
 138
 139   uint16_t  pmaaddr1;        /*!< PMA Address1
 140                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 141
 142
 143   uint8_t   doublebuffer;    /*!< Double buffer enable
 144                                  This parameter can be 0 or 1                                             */
 145
 146   uint32_t  maxpacket;      /*!< Endpoint Max packet size
 147                                  This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
 148
 149   uint8_t   *xfer_buff;     /*!< Pointer to transfer buffer                                               */
 150
 151
 152   uint32_t  xfer_len;       /*!< Current transfer length                                                  */
 153
 154   uint32_t  xfer_count;     /*!< Partial transfer length in case of multi packet transfer                 */
 155
 156 }PCD_EPTypeDef;
 157
 158 typedef   USB_TypeDef PCD_TypeDef;
 159
 160 /**
 161   * @brief  PCD Handle Structure definition
 162   */
 163 typedef struct
 164 {
 165   PCD_TypeDef             *Instance;   /*!< Register base address              */
 166   PCD_InitTypeDef         Init;       /*!< PCD required parameters            */
 167   __IO uint8_t            USB_Address; /*!< USB Address            */
 168   PCD_EPTypeDef           IN_ep[8];  /*!< IN endpoint parameters             */
 169   PCD_EPTypeDef           OUT_ep[8]; /*!< OUT endpoint parameters            */
 170   HAL_LockTypeDef         Lock;       /*!< PCD peripheral status              */
 171   __IO PCD_StateTypeDef   State;      /*!< PCD communication state            */
 172   uint32_t                Setup[12];  /*!< Setup packet buffer                */
 173   void                    *pData;      /*!< Pointer to upper stack Handler     */
 174
 175 } PCD_HandleTypeDef;
 176
 177 /**
 178   * @}
 179   */
 180
 181 #include "stm32l1xx_hal_pcd_ex.h"
 182 /* Exported constants --------------------------------------------------------*/
 183 /** @defgroup PCD_Exported_Constants PCD Exported Constants
 184   * @{
 185   */
 186
 187 /** @defgroup USB_Exti_Line_Wakeup USB_Exti_Line_Wakeup
 188   * @{
 189   */
 190
 191 #define  USB_EXTI_LINE_WAKEUP              ((uint32_t)0x00040000)  /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
 192 /**
 193   * @}
 194   */
 195
 196
 197 /** @defgroup USB_Core_Speed USB Core Speed
 198   * @{
 199   */
 200 #define PCD_SPEED_HIGH               0 /* Not Supported */
 201 #define PCD_SPEED_FULL               2
 202 /**
 203   * @}
 204   */
 205
 206   /** @defgroup USB_Core_PHY USB Core PHY
 207   * @{
 208   */
 209 #define PCD_PHY_EMBEDDED             2
 210 /**
 211   * @}
 212   */
 213
 214 /** @defgroup USB_EP0_MPS USB EP0 MPS
 215   * @{
 216   */
 217 #define DEP0CTL_MPS_64                         0
 218 #define DEP0CTL_MPS_32                         1
 219 #define DEP0CTL_MPS_16                         2
 220 #define DEP0CTL_MPS_8                          3
 221
 222 #define PCD_EP0MPS_64                          DEP0CTL_MPS_64
 223 #define PCD_EP0MPS_32                          DEP0CTL_MPS_32
 224 #define PCD_EP0MPS_16                          DEP0CTL_MPS_16
 225 #define PCD_EP0MPS_08                          DEP0CTL_MPS_8
 226 /**
 227   * @}
 228   */
 229
 230 /** @defgroup USB_EP_Type USB EP Type
 231   * @{
 232   */
 233 #define PCD_EP_TYPE_CTRL                                 0
 234 #define PCD_EP_TYPE_ISOC                                 1
 235 #define PCD_EP_TYPE_BULK                                 2
 236 #define PCD_EP_TYPE_INTR                                 3
 237 /**
 238   * @}
 239   */
 240
 241 /** @defgroup USB_ENDP_Type USB_ENDP_Type
 242   * @{
 243   */
 244
 245 #define PCD_ENDP0                             ((uint8_t)0)
 246 #define PCD_ENDP1                             ((uint8_t)1)
 247 #define PCD_ENDP2                             ((uint8_t)2)
 248 #define PCD_ENDP3                             ((uint8_t)3)
 249 #define PCD_ENDP4                             ((uint8_t)4)
 250 #define PCD_ENDP5                             ((uint8_t)5)
 251 #define PCD_ENDP6                             ((uint8_t)6)
 252 #define PCD_ENDP7                             ((uint8_t)7)
 253
 254 /*  Endpoint Kind */
 255 #define PCD_SNG_BUF                                      0
 256 #define PCD_DBL_BUF                                      1
 257
 258 #define IS_PCD_ALL_INSTANCE                              IS_USB_ALL_INSTANCE
 259
 260 /**
 261   * @}
 262   */
 263
 264
 265 /**
 266   * @}
 267   */
 268
 269 /* Exported macros -----------------------------------------------------------*/
 270
 271 /** @defgroup PCD_Exported_Macros PCD Exported Macros
 272  *  @brief macros to handle interrupts and specific clock configurations
 273  * @{
 274  */
 275 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
 276 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
 277
 278 #define __HAL_USB_EXTI_ENABLE_IT()    EXTI->IMR |= USB_EXTI_LINE_WAKEUP
 279 #define __HAL_USB_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_EXTI_LINE_WAKEUP)
 280 #define __HAL_USB_EXTI_GET_FLAG()     EXTI->PR & (USB_EXTI_LINE_WAKEUP)
 281 #define __HAL_USB_EXTI_CLEAR_FLAG()   EXTI->PR = USB_EXTI_LINE_WAKEUP
 282
 283 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 284                                                     EXTI->RTSR |= USB_EXTI_LINE_WAKEUP
 285
 286
 287 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER()  EXTI->FTSR |= (USB_EXTI_LINE_WAKEUP);\
 288                                                       EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP)
 289
 290
 291 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER()  EXTI->RTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 292                                                        EXTI->FTSR &= ~(USB_EXTI_LINE_WAKEUP);\
 293                                                        EXTI->RTSR |= USB_EXTI_LINE_WAKEUP;\
 294                                                        EXTI->FTSR |= USB_EXTI_LINE_WAKEUP
 295
 296 /**
 297   * @}
 298   */
 299
 300 /* Internal macros -----------------------------------------------------------*/
 301
 302 /** @defgroup PCD_Private_Macros PCD Private Macros
 303  *  @brief macros to handle interrupts and specific clock configurations
 304  * @{
 305  */
 306
 307 /* SetENDPOINT */
 308 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue)  (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
 309
 310 /* GetENDPOINT */
 311 #define PCD_GET_ENDPOINT(USBx, bEpNum)        (*(&(USBx)->EP0R + (bEpNum) * 2))
 312
 313
 314
 315 /**
 316   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
 317   * @param  USBx: USB peripheral instance register address.
 318   * @param  bEpNum: Endpoint Number.
 319   * @param  wType: Endpoint Type.
 320   * @retval None
 321   */
 322 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 323                                   ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
 324
 325 /**
 326   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
 327   * @param  USBx: USB peripheral instance register address.
 328   * @param  bEpNum: Endpoint Number.
 329   * @retval Endpoint Type
 330   */
 331 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
 332
 333
 334 /**
 335   * @brief free buffer used from the application realizing it to the line
 336           toggles bit SW_BUF in the double buffered endpoint register
 337   * @param  USBx: USB peripheral instance register address.
 338   * @param  bEpNum: Endpoint Number.
 339   * @param  bDir: Direction
 340   * @retval None
 341   */
 342 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
 343 {\
 344   if ((bDir) == PCD_EP_DBUF_OUT)\
 345   { /* OUT double buffered endpoint */\
 346     PCD_TX_DTOG((USBx), (bEpNum));\
 347   }\
 348   else if ((bDir) == PCD_EP_DBUF_IN)\
 349   { /* IN double buffered endpoint */\
 350     PCD_RX_DTOG((USBx), (bEpNum));\
 351   }\
 352 }
 353
 354 /**
 355   * @brief gets direction of the double buffered endpoint
 356   * @param   USBx: USB peripheral instance register address.
 357   * @param   bEpNum: Endpoint Number.
 358   * @retval EP_DBUF_OUT, EP_DBUF_IN,
 359   *         EP_DBUF_ERR if the endpoint counter not yet programmed.
 360   */
 361 #define PCD_GET_DB_DIR(USBx, bEpNum)\
 362 {\
 363   if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
 364     return(PCD_EP_DBUF_OUT);\
 365   else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
 366     return(PCD_EP_DBUF_IN);\
 367   else\
 368     return(PCD_EP_DBUF_ERR);\
 369 }
 370
 371 /**
 372   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
 373   * @param  USBx: USB peripheral instance register address.
 374   * @param  bEpNum: Endpoint Number.
 375   * @param  wState: new state
 376   * @retval None
 377   */
 378 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
 379    \
 380     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
 381    /* toggle first bit ? */     \
 382    if((USB_EPTX_DTOG1 & (wState))!= 0)      \
 383    {                                                                            \
 384      _wRegVal ^= USB_EPTX_DTOG1;        \
 385    }                                                                            \
 386    /* toggle second bit ?  */         \
 387    if((USB_EPTX_DTOG2 & (wState))!= 0)      \
 388    {                                                                            \
 389      _wRegVal ^= USB_EPTX_DTOG2;        \
 390    }                                                                            \
 391    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));    \
 392   } /* PCD_SET_EP_TX_STATUS */
 393
 394 /**
 395   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
 396   * @param  USBx: USB peripheral instance register address.
 397   * @param  bEpNum: Endpoint Number.
 398   * @param  wState: new state
 399   * @retval None
 400   */
 401 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
 402     register uint16_t _wRegVal;   \
 403     \
 404     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
 405     /* toggle first bit ? */  \
 406     if((USB_EPRX_DTOG1 & (wState))!= 0) \
 407     {                                                                             \
 408       _wRegVal ^= USB_EPRX_DTOG1;  \
 409     }                                                                             \
 410     /* toggle second bit ? */  \
 411     if((USB_EPRX_DTOG2 & (wState))!= 0) \
 412     {                                                                             \
 413       _wRegVal ^= USB_EPRX_DTOG2;  \
 414     }                                                                             \
 415     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
 416   } /* PCD_SET_EP_RX_STATUS */
 417
 418 /**
 419   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 420   * @param  USBx: USB peripheral instance register address.
 421   * @param  bEpNum: Endpoint Number.
 422   * @param  wStaterx: new state.
 423   * @param  wStatetx: new state.
 424   * @retval None
 425   */
 426 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
 427     register uint32_t _wRegVal;   \
 428     \
 429     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
 430     /* toggle first bit ? */  \
 431     if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
 432     {                                                                                    \
 433       _wRegVal ^= USB_EPRX_DTOG1;  \
 434     }                                                                                    \
 435     /* toggle second bit ? */  \
 436     if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
 437     {                                                                                    \
 438       _wRegVal ^= USB_EPRX_DTOG2;  \
 439     }                                                                                    \
 440     /* toggle first bit ? */     \
 441     if((USB_EPTX_DTOG1 & (wStatetx))!= 0)      \
 442     {                                                                                    \
 443       _wRegVal ^= USB_EPTX_DTOG1;        \
 444     }                                                                                    \
 445     /* toggle second bit ?  */         \
 446     if((USB_EPTX_DTOG2 & (wStatetx))!= 0)      \
 447     {                                                                                    \
 448       _wRegVal ^= USB_EPTX_DTOG2;        \
 449     }                                                                                    \
 450     PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX);    \
 451   } /* PCD_SET_EP_TXRX_STATUS */
 452
 453 /**
 454   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
 455   *         /STAT_RX[1:0])
 456   * @param  USBx: USB peripheral instance register address.
 457   * @param  bEpNum: Endpoint Number.
 458   * @retval status
 459   */
 460 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
 461
 462 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
 463
 464 /**
 465   * @brief  sets directly the VALID tx/rx-status into the endpoint register
 466   * @param  USBx: USB peripheral instance register address.
 467   * @param  bEpNum: Endpoint Number.
 468   * @retval None
 469   */
 470 #define PCD_SET_EP_TX_VALID(USBx, bEpNum)     (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
 471
 472 #define PCD_SET_EP_RX_VALID(USBx, bEpNum)     (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
 473
 474 /**
 475   * @brief  checks stall condition in an endpoint.
 476   * @param  USBx: USB peripheral instance register address.
 477   * @param  bEpNum: Endpoint Number.
 478   * @retval TRUE = endpoint in stall condition.
 479   */
 480 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
 481                                    == USB_EP_TX_STALL)
 482 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
 483                                    == USB_EP_RX_STALL)
 484
 485 /**
 486   * @brief  set & clear EP_KIND bit.
 487   * @param  USBx: USB peripheral instance register address.
 488   * @param  bEpNum: Endpoint Number.
 489   * @retval None
 490   */
 491 #define PCD_SET_EP_KIND(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 492                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
 493 #define PCD_CLEAR_EP_KIND(USBx, bEpNum)  (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 494                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
 495
 496 /**
 497   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
 498   * @param  USBx: USB peripheral instance register address.
 499   * @param  bEpNum: Endpoint Number.
 500   * @retval None
 501   */
 502 #define PCD_SET_OUT_STATUS(USBx, bEpNum)    PCD_SET_EP_KIND((USBx), (bEpNum))
 503 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)  PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 504
 505 /**
 506   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
 507   * @param  USBx: USB peripheral instance register address.
 508   * @param  bEpNum: Endpoint Number.
 509   * @retval None
 510   */
 511 #define PCD_SET_EP_DBUF(USBx, bEpNum)   PCD_SET_EP_KIND((USBx), (bEpNum))
 512 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 513
 514 /**
 515   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
 516   * @param  USBx: USB peripheral instance register address.
 517   * @param  bEpNum: Endpoint Number.
 518   * @retval None
 519   */
 520 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 521                                    PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
 522 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 523                                    PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
 524
 525 /**
 526   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 527   * @param  USBx: USB peripheral instance register address.
 528   * @param  bEpNum: Endpoint Number.
 529   * @retval None
 530   */
 531 #define PCD_RX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 532                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
 533 #define PCD_TX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 534                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
 535
 536 /**
 537   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 538   * @param  USBx: USB peripheral instance register address.
 539   * @param  bEpNum: Endpoint Number.
 540   * @retval None
 541   */
 542 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
 543                                          {                                                              \
 544                                            PCD_RX_DTOG((USBx), (bEpNum));                               \
 545                                          }
 546 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
 547                                          {                                                              \
 548                                             PCD_TX_DTOG((USBx), (bEpNum));                              \
 549                                          }
 550
 551 /**
 552   * @brief  Sets address in an endpoint register.
 553   * @param  USBx: USB peripheral instance register address.
 554   * @param  bEpNum: Endpoint Number.
 555   * @param  bAddr: Address.
 556   * @retval None
 557   */
 558 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
 559     USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
 560
 561 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
 562
 563 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8)*2+     ((uint32_t)(USBx) + 0x400)))
 564 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+2)*2+  ((uint32_t)(USBx) + 0x400)))
 565 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+4)*2+  ((uint32_t)(USBx) + 0x400)))
 566 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8+6)*2+  ((uint32_t)(USBx) + 0x400)))
 567
 568 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
 569     uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
 570     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
 571   }
 572
 573 /**
 574   * @brief  sets address of the tx/rx buffer.
 575   * @param  USBx: USB peripheral instance register address.
 576   * @param  bEpNum: Endpoint Number.
 577   * @param  wAddr: address to be set (must be word aligned).
 578   * @retval None
 579   */
 580 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
 581 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
 582
 583 /**
 584   * @brief  Gets address of the tx/rx buffer.
 585   * @param  USBx: USB peripheral instance register address.
 586   * @param  bEpNum: Endpoint Number.
 587   * @retval address of the buffer.
 588   */
 589 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
 590 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
 591
 592 /**
 593   * @brief  Sets counter of rx buffer with no. of blocks.
 594   * @param  dwReg: Register
 595   * @param  wCount: Counter.
 596   * @param  wNBlocks: no. of Blocks.
 597   * @retval None
 598   */
 599 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
 600     (wNBlocks) = (wCount) >> 5;\
 601     if(((wCount) & 0x1f) == 0)\
 602     {                                                  \
 603       (wNBlocks)--;\
 604     }                                                  \
 605     *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
 606   }/* PCD_CALC_BLK32 */
 607
 608 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
 609     (wNBlocks) = (wCount) >> 1;\
 610     if(((wCount) & 0x1) != 0)\
 611     {                                                  \
 612       (wNBlocks)++;\
 613     }                                                  \
 614     *pdwReg = (uint16_t)((wNBlocks) << 10);\
 615   }/* PCD_CALC_BLK2 */
 616
 617 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount)  {\
 618     uint16_t wNBlocks;\
 619     if((wCount) > 62)                                \
 620     {                                                \
 621       PCD_CALC_BLK32((dwReg),(wCount),wNBlocks);     \
 622     }                                                \
 623     else                                             \
 624     {                                                \
 625       PCD_CALC_BLK2((dwReg),(wCount),wNBlocks);      \
 626     }                                                \
 627   }/* PCD_SET_EP_CNT_RX_REG */
 628
 629 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
 630     uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
 631     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
 632   }
 633 /**
 634   * @brief  sets counter for the tx/rx buffer.
 635   * @param  USBx: USB peripheral instance register address.
 636   * @param  bEpNum: Endpoint Number.
 637   * @param  wCount: Counter value.
 638   * @retval None
 639   */
 640 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
 641
 642
 643 /**
 644   * @brief  gets counter of the tx buffer.
 645   * @param  USBx: USB peripheral instance register address.
 646   * @param  bEpNum: Endpoint Number.
 647   * @retval Counter value
 648   */
 649 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
 650 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
 651
 652 /**
 653   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
 654   * @param  USBx: USB peripheral instance register address.
 655   * @param  bEpNum: Endpoint Number.
 656   * @param  wBuf0Addr: buffer 0 address.
 657   * @retval Counter value
 658   */
 659 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
 660 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
 661
 662 /**
 663   * @brief  Sets addresses in a double buffer endpoint.
 664   * @param  USBx: USB peripheral instance register address.
 665   * @param  bEpNum: Endpoint Number.
 666   * @param  wBuf0Addr: buffer 0 address.
 667   * @param  wBuf1Addr = buffer 1 address.
 668   * @retval None
 669   */
 670 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
 671     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
 672     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
 673   } /* PCD_SET_EP_DBUF_ADDR */
 674
 675 /**
 676   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 677   * @param  USBx: USB peripheral instance register address.
 678   * @param  bEpNum: Endpoint Number.
 679   * @retval None
 680   */
 681 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
 682 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
 683
 684 /**
 685   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 686   * @param  USBx: USB peripheral instance register address.
 687   * @param  bEpNum: Endpoint Number.
 688   * @param  bDir: endpoint dir  EP_DBUF_OUT = OUT
 689   *         EP_DBUF_IN  = IN
 690   * @param  wCount: Counter value
 691   * @retval None
 692   */
 693 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount)  { \
 694     if((bDir) == PCD_EP_DBUF_OUT)\
 695       /* OUT endpoint */ \
 696     {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
 697     else if((bDir) == PCD_EP_DBUF_IN)\
 698       /* IN endpoint */ \
 699       *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount);  \
 700   } /* SetEPDblBuf0Count*/
 701
 702 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount)  { \
 703     if((bDir) == PCD_EP_DBUF_OUT)\
 704     {/* OUT endpoint */                                       \
 705       PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount));           \
 706     }                                                         \
 707     else if((bDir) == PCD_EP_DBUF_IN)\
 708     {/* IN endpoint */                                        \
 709       *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
 710     }                                                         \
 711   } /* SetEPDblBuf1Count */
 712
 713 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
 714     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
 715     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
 716   } /* PCD_SET_EP_DBUF_CNT  */
 717
 718 /**
 719   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
 720   * @param  USBx: USB peripheral instance register address.
 721   * @param  bEpNum: Endpoint Number.
 722   * @retval None
 723   */
 724 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
 725 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
 726
 727
 728 /**
 729   * @}
 730   */
 731
 732 /* Exported functions --------------------------------------------------------*/
 733
 734 /** @addtogroup PCD_Exported_Functions
 735   * @{
 736   */
 737
 738 /* Initialization/de-initialization functions  **********************************/
 739
 740
 741 /** @addtogroup PCD_Exported_Functions_Group1
 742   * @{
 743   */
 744
 745 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
 746 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
 747 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
 748 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
 749
 750 /**
 751   * @}
 752   */
 753
 754 /* I/O operation functions  *****************************************************/
 755 /* Non-Blocking mode: Interrupt */
 756 /** @addtogroup PCD_Exported_Functions_Group2
 757   * @{
 758   */
 759
 760 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
 761 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
 762 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
 763
 764 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 765 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 766 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
 767 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
 768 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
 769 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
 770 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
 771 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 772 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 773 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
 774 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
 775
 776 /**
 777   * @}
 778   */
 779
 780 /* Peripheral Control functions  ************************************************/
 781 /** @addtogroup PCD_Exported_Functions_Group3
 782   * @{
 783   */
 784 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 785 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 786 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 787 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
 788 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 789 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 790 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 791 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 792 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 793 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 794 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 795 HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
 796 HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
 797 /**
 798   * @}
 799   */
 800
 801
 802 /* Peripheral State functions  **************************************************/
 803 /** @addtogroup PCD_Exported_Functions_Group4
 804   * @{
 805   */
 806 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 807 void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
 808 /**
 809   * @}
 810   */
 811
 812
 813 /**
 814   * @}
 815   */
 816
 817
 818 /**
 819   * @}
 820   */
 821
 822 /**
 823   * @}
 824   */
 825
 826 #ifdef __cplusplus
 827 }
 828 #endif
 829
 830
 831 #endif /* __STM32L1xx_HAL_PCD_H */
 832
 833 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/