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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
4 * $Date: 17. January 2013
7 * Project: CMSIS DSP Library
8 * Title: arm_cmplx_dot_prod_q31.c
10 * Description: Q31 complex dot product
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
44 * @ingroup groupCmplxMath
48 * @addtogroup cmplx_dot_prod
53 * @brief Q31 complex dot product
54 * @param *pSrcA points to the first input vector
55 * @param *pSrcB points to the second input vector
56 * @param numSamples number of complex samples in each vector
57 * @param *realResult real part of the result returned here
58 * @param *imagResult imaginary part of the result returned here
61 * <b>Scaling and Overflow Behavior:</b>
63 * The function is implemented using an internal 64-bit accumulator.
64 * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
65 * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
66 * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
67 * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
68 * Input down scaling is not required.
71 void arm_cmplx_dot_prod_q31(
78 q63_t real_sum
= 0, imag_sum
= 0; /* Temporary result storage */
80 #ifndef ARM_MATH_CM0_FAMILY
82 /* Run the below code for Cortex-M4 and Cortex-M3 */
83 uint32_t blkCnt
; /* loop counter */
87 blkCnt
= numSamples
>> 2u;
89 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
90 ** a second loop below computes the remaining 1 to 3 samples. */
93 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
94 /* Convert real data in 2.62 to 16.48 by 14 right shifts */
95 real_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
96 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
97 /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
98 imag_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
100 real_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
101 imag_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
103 real_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
104 imag_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
106 real_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
107 imag_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
110 /* Decrement the loop counter */
114 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
115 ** No loop unrolling is used. */
116 blkCnt
= numSamples
% 0x4u
;
120 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
121 real_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
122 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
123 imag_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
125 /* Decrement the loop counter */
131 /* Run the below code for Cortex-M0 */
133 while(numSamples
> 0u)
135 /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
136 real_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
137 /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
138 imag_sum
+= (q63_t
) * pSrcA
++ * (*pSrcB
++) >> 14;
140 /* Decrement the loop counter */
144 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
146 /* Store the real and imaginary results in 16.48 format */
147 *realResult
= real_sum
;
148 *imagResult
= imag_sum
;
152 * @} end of cmplx_dot_prod group