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Merge commit '71381457fa1311dfa0b58ba882a96db740640871'
[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_Freescale / TARGET_K20XX / TARGET_TEENSY3_1 / TOOLCHAIN_ARM_STD / startup_MK20DX256.s
1 ;/*****************************************************************************
2 ; * @file: startup_MK20DX256.s
3 ; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the
4 ; * MK20DX256
5 ; * @version: 1.0
6 ; * @date: 2011-12-15
7 ; *
8 ; * Copyright: 1997 - 2015 Freescale Semiconductor, Inc. All Rights Reserved.
9 ;*
10 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
11 ; *
12 ; *****************************************************************************/
13
14
15 __initial_sp EQU 0x20008000 ; Top of RAM
16
17 PRESERVE8
18 THUMB
19
20
21 ; Vector Table Mapped to Address 0 at Reset
22
23 AREA RESET, DATA, READONLY
24 EXPORT __Vectors
25 EXPORT __Vectors_End
26 EXPORT __Vectors_Size
27
28 __Vectors DCD __initial_sp ; Top of Stack
29 DCD Reset_Handler ; Reset Handler
30 DCD NMI_Handler ; NMI Handler
31 DCD HardFault_Handler ; Hard Fault Handler
32 DCD MemManage_Handler ; MPU Fault Handler
33 DCD BusFault_Handler ; Bus Fault Handler
34 DCD UsageFault_Handler ; Usage Fault Handler
35 DCD 0 ; Reserved
36 DCD 0 ; Reserved
37 DCD 0 ; Reserved
38 DCD 0 ; Reserved
39 DCD SVC_Handler ; SVCall Handler
40 DCD DebugMon_Handler ; Debug Monitor Handler
41 DCD 0 ; Reserved
42 DCD PendSV_Handler ; PendSV Handler
43 DCD SysTick_Handler ; SysTick Handler
44
45 ; External Interrupts
46 DCD DMA0_IRQHandler ; DMA channel 0 transfer complete interrupt
47 DCD DMA1_IRQHandler ; DMA channel 1 transfer complete interrupt
48 DCD DMA2_IRQHandler ; DMA channel 2 transfer complete interrupt
49 DCD DMA3_IRQHandler ; DMA channel 3 transfer complete interrupt
50 DCD DMA4_IRQHandler ; DMA channel 4 transfer complete interrupt
51 DCD DMA5_IRQHandler ; DMA channel 5 transfer complete interrupt
52 DCD DMA6_IRQHandler ; DMA channel 6 transfer complete interrupt
53 DCD DMA7_IRQHandler ; DMA channel 7 transfer complete interrupt
54 DCD DMA8_IRQHandler ; DMA channel 8 transfer complete interrupt
55 DCD DMA9_IRQHandler ; DMA channel 9 transfer complete interrupt
56 DCD DMA10_IRQHandler ; DMA channel 10 transfer complete interrupt
57 DCD DMA11_IRQHandler ; DMA channel 11 transfer complete interrupt
58 DCD DMA12_IRQHandler ; DMA channel 12 transfer complete interrupt
59 DCD DMA13_IRQHandler ; DMA channel 13 transfer complete interrupt
60 DCD DMA14_IRQHandler ; DMA channel 14 transfer complete interrupt
61 DCD DMA15_IRQHandler ; DMA channel 15 transfer complete interrupt
62 DCD DMA_Error_IRQHandler ; DMA error interrupt
63 DCD Reserved33_IRQHandler ; Reserved interrupt 33
64 DCD FTFL_IRQHandler ; FTFL interrupt
65 DCD Read_Collision_IRQHandler ; Read collision interrupt
66 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
67 DCD LLW_IRQHandler ; Low Leakage Wakeup
68 DCD Watchdog_IRQHandler ; WDOG interrupt
69 DCD Reserved39_IRQHandler ; Reserved interrupt 39
70 DCD I2C0_IRQHandler ; I2C0 interrupt
71 DCD I2C1_IRQHandler ; I2C1 interrupt
72 DCD SPI0_IRQHandler ; SPI0 interrupt
73 DCD SPI1_IRQHandler ; SPI1 interrupt
74 DCD Reserved44_IRQHandler ; Reserved interrupt 44
75 DCD CAN0_ORed_Message_buffer_IRQHandler ; CAN0 OR'd message buffers interrupt
76 DCD CAN0_Bus_Off_IRQHandler ; CAN0 bus off interrupt
77 DCD CAN0_Error_IRQHandler ; CAN0 error interrupt
78 DCD CAN0_Tx_Warning_IRQHandler ; CAN0 Tx warning interrupt
79 DCD CAN0_Rx_Warning_IRQHandler ; CAN0 Rx warning interrupt
80 DCD CAN0_Wake_Up_IRQHandler ; CAN0 wake up interrupt
81 DCD I2S0_Tx_IRQHandler ; I2S0 transmit interrupt
82 DCD I2S0_Rx_IRQHandler ; I2S0 receive interrupt
83 DCD Reserved53_IRQHandler ; Reserved interrupt 53
84 DCD Reserved54_IRQHandler ; Reserved interrupt 54
85 DCD Reserved55_IRQHandler ; Reserved interrupt 55
86 DCD Reserved56_IRQHandler ; Reserved interrupt 56
87 DCD Reserved57_IRQHandler ; Reserved interrupt 57
88 DCD Reserved58_IRQHandler ; Reserved interrupt 58
89 DCD Reserved59_IRQHandler ; Reserved interrupt 59
90 DCD UART0_LON_IRQHandler ; UART0 LON interrupt
91 DCD UART0_RX_TX_IRQHandler ; UART0 receive/transmit interrupt
92 DCD UART0_ERR_IRQHandler ; UART0 error interrupt
93 DCD UART1_RX_TX_IRQHandler ; UART1 receive/transmit interrupt
94 DCD UART1_ERR_IRQHandler ; UART1 error interrupt
95 DCD UART2_RX_TX_IRQHandler ; UART2 receive/transmit interrupt
96 DCD UART2_ERR_IRQHandler ; UART2 error interrupt
97 DCD Reserved67_IRQHandler ; Reserved interrupt 67
98 DCD Reserved68_IRQHandler ; Reserved interrupt 68
99 DCD Reserved69_IRQHandler ; Reserved interrupt 69
100 DCD Reserved70_IRQHandler ; Reserved interrupt 70
101 DCD Reserved71_IRQHandler ; Reserved interrupt 71
102 DCD Reserved72_IRQHandler ; Reserved interrupt 72
103 DCD ADC0_IRQHandler ; ADC0 interrupt
104 DCD ADC1_IRQHandler ; ADC1 interrupt
105 DCD CMP0_IRQHandler ; CMP0 interrupt
106 DCD CMP1_IRQHandler ; CMP1 interrupt
107 DCD CMP2_IRQHandler ; CMP2 interrupt
108 DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt
109 DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt
110 DCD FTM2_IRQHandler ; FTM2 fault, overflow and channels interrupt
111 DCD CMT_IRQHandler ; CMT interrupt
112 DCD RTC_IRQHandler ; RTC interrupt
113 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
114 DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt
115 DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt
116 DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt
117 DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt
118 DCD PDB0_IRQHandler ; PDB0 interrupt
119 DCD USB0_IRQHandler ; USB0 interrupt
120 DCD USBDCD_IRQHandler ; USBDCD interrupt
121 DCD Reserved91_IRQHandler ; Reserved interrupt 91
122 DCD Reserved92_IRQHandler ; Reserved interrupt 92
123 DCD Reserved93_IRQHandler ; Reserved interrupt 93
124 DCD Reserved94_IRQHandler ; Reserved interrupt 94
125 DCD Reserved95_IRQHandler ; Reserved interrupt 95
126 DCD Reserved96_IRQHandler ; Reserved interrupt 96
127 DCD DAC0_IRQHandler ; DAC0 interrupt
128 DCD Reserved98_IRQHandler ; Reserved interrupt 98
129 DCD TSI0_IRQHandler ; TSI0 interrupt
130 DCD MCG_IRQHandler ; MCG interrupt
131 DCD LPTimer_IRQHandler ; LPTimer interrupt
132 DCD Reserved102_IRQHandler ; Reserved interrupt 102
133 DCD PORTA_IRQHandler ; Port A interrupt
134 DCD PORTB_IRQHandler ; Port B interrupt
135 DCD PORTC_IRQHandler ; Port C interrupt
136 DCD PORTD_IRQHandler ; Port D interrupt
137 DCD PORTE_IRQHandler ; Port E interrupt
138 DCD Reserved108_IRQHandler ; Reserved interrupt 108
139 DCD Reserved109_IRQHandler ; Reserved interrupt 109
140 DCD SWI_IRQHandler ; Software interrupt
141 __Vectors_End
142
143 __Vectors_Size EQU __Vectors_End - __Vectors
144
145 ; <h> Flash Configuration
146 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
147 ; <i> and security information that allows the MCU to restrict acces to the FTFL module.
148 ; <h> Backdoor Comparison Key
149 ; <o0> Backdoor Key 0 <0x0-0xFF:2>
150 ; <o1> Backdoor Key 1 <0x0-0xFF:2>
151 ; <o2> Backdoor Key 2 <0x0-0xFF:2>
152 ; <o3> Backdoor Key 3 <0x0-0xFF:2>
153 ; <o4> Backdoor Key 4 <0x0-0xFF:2>
154 ; <o5> Backdoor Key 5 <0x0-0xFF:2>
155 ; <o6> Backdoor Key 6 <0x0-0xFF:2>
156 ; <o7> Backdoor Key 7 <0x0-0xFF:2>
157 BackDoorK0 EQU 0xFF
158 BackDoorK1 EQU 0xFF
159 BackDoorK2 EQU 0xFF
160 BackDoorK3 EQU 0xFF
161 BackDoorK4 EQU 0xFF
162 BackDoorK5 EQU 0xFF
163 BackDoorK6 EQU 0xFF
164 BackDoorK7 EQU 0xFF
165 ; </h>
166 ; <h> Program flash protection bytes (FPROT)
167 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
168 ; <i> Each bit protects a 1/32 region of the program flash memory.
169 ; <h> FPROT0
170 ; <i> Program flash protection bytes
171 ; <i> 1/32 - 8/32 region
172 ; <o.0> FPROT0.0
173 ; <o.1> FPROT0.1
174 ; <o.2> FPROT0.2
175 ; <o.3> FPROT0.3
176 ; <o.4> FPROT0.4
177 ; <o.5> FPROT0.5
178 ; <o.6> FPROT0.6
179 ; <o.7> FPROT0.7
180 nFPROT0 EQU 0x00
181 FPROT0 EQU nFPROT0:EOR:0xFF
182 ; </h>
183 ; <h> FPROT1
184 ; <i> Program Flash Region Protect Register 1
185 ; <i> 9/32 - 16/32 region
186 ; <o.0> FPROT1.0
187 ; <o.1> FPROT1.1
188 ; <o.2> FPROT1.2
189 ; <o.3> FPROT1.3
190 ; <o.4> FPROT1.4
191 ; <o.5> FPROT1.5
192 ; <o.6> FPROT1.6
193 ; <o.7> FPROT1.7
194 nFPROT1 EQU 0x00
195 FPROT1 EQU nFPROT1:EOR:0xFF
196 ; </h>
197 ; <h> FPROT2
198 ; <i> Program Flash Region Protect Register 2
199 ; <i> 17/32 - 24/32 region
200 ; <o.0> FPROT2.0
201 ; <o.1> FPROT2.1
202 ; <o.2> FPROT2.2
203 ; <o.3> FPROT2.3
204 ; <o.4> FPROT2.4
205 ; <o.5> FPROT2.5
206 ; <o.6> FPROT2.6
207 ; <o.7> FPROT2.7
208 nFPROT2 EQU 0x00
209 FPROT2 EQU nFPROT2:EOR:0xFF
210 ; </h>
211 ; <h> FPROT3
212 ; <i> Program Flash Region Protect Register 3
213 ; <i> 25/32 - 32/32 region
214 ; <o.0> FPROT3.0
215 ; <o.1> FPROT3.1
216 ; <o.2> FPROT3.2
217 ; <o.3> FPROT3.3
218 ; <o.4> FPROT3.4
219 ; <o.5> FPROT3.5
220 ; <o.6> FPROT3.6
221 ; <o.7> FPROT3.7
222 nFPROT3 EQU 0x00
223 FPROT3 EQU nFPROT3:EOR:0xFF
224 ; </h>
225 ; </h>
226 ; <h> Data flash protection byte (FDPROT)
227 ; <i> Each bit protects a 1/8 region of the data flash memory.
228 ; <i> (Program flash only devices: Reserved)
229 ; <o.0> FDPROT.0
230 ; <o.1> FDPROT.1
231 ; <o.2> FDPROT.2
232 ; <o.3> FDPROT.3
233 ; <o.4> FDPROT.4
234 ; <o.5> FDPROT.5
235 ; <o.6> FDPROT.6
236 ; <o.7> FDPROT.7
237 nFDPROT EQU 0x00
238 FDPROT EQU nFDPROT:EOR:0xFF
239 ; </h>
240 ; <h> EEPROM protection byte (FEPROT)
241 ; <i> FlexNVM devices: Each bit protects a 1/8 region of the EEPROM.
242 ; <i> (Program flash only devices: Reserved)
243 ; <o.0> FEPROT.0
244 ; <o.1> FEPROT.1
245 ; <o.2> FEPROT.2
246 ; <o.3> FEPROT.3
247 ; <o.4> FEPROT.4
248 ; <o.5> FEPROT.5
249 ; <o.6> FEPROT.6
250 ; <o.7> FEPROT.7
251 nFEPROT EQU 0x00
252 FEPROT EQU nFEPROT:EOR:0xFF
253 ; </h>
254 ; <h> Flash nonvolatile option byte (FOPT)
255 ; <i> Allows the user to customize the operation of the MCU at boot time.
256 ; <o.0> LPBOOT
257 ; <0=> Low-power boot
258 ; <1=> normal boot
259 ; <o.1> EZPORT_DIS
260 ; <0=> EzPort operation is enabled
261 ; <1=> EzPort operation is disabled
262 FOPT EQU 0xFF
263 ; </h>
264 ; <h> Flash security byte (FSEC)
265 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
266 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
267 ; <o.0..1> SEC
268 ; <2=> MCU security status is unsecure
269 ; <3=> MCU security status is secure
270 ; <i> Flash Security
271 ; <i> This bits define the security state of the MCU.
272 ; <o.2..3> FSLACC
273 ; <2=> Freescale factory access denied
274 ; <3=> Freescale factory access granted
275 ; <i> Freescale Failure Analysis Access Code
276 ; <i> This bits define the security state of the MCU.
277 ; <o.4..5> MEEN
278 ; <2=> Mass erase is disabled
279 ; <3=> Mass erase is enabled
280 ; <i> Mass Erase Enable Bits
281 ; <i> Enables and disables mass erase capability of the FTFL module
282 ; <o.6..7> KEYEN
283 ; <2=> Backdoor key access enabled
284 ; <3=> Backdoor key access disabled
285 ; <i> Backdoor key Security Enable
286 ; <i> These bits enable and disable backdoor key access to the FTFL module.
287 FSEC EQU 0xFE
288 ; </h>
289 ; </h>
290 IF :LNOT::DEF:RAM_TARGET
291 AREA |.ARM.__at_0x400|, CODE, READONLY
292 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
293 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
294 DCB FPROT0, FPROT1, FPROT2, FPROT3
295 DCB FSEC, FOPT, FEPROT, FDPROT
296 ENDIF
297
298 AREA |.text|, CODE, READONLY
299
300
301 ; Reset Handler
302
303 Reset_Handler PROC
304 EXPORT Reset_Handler [WEAK]
305 IMPORT SystemInit
306 IMPORT __main
307 LDR R0, =SystemInit
308 BLX R0
309 LDR R0, =__main
310 BX R0
311 ENDP
312
313
314 ; Dummy Exception Handlers (infinite loops which can be modified)
315
316 NMI_Handler PROC
317 EXPORT NMI_Handler [WEAK]
318 B .
319 ENDP
320 HardFault_Handler\
321 PROC
322 EXPORT HardFault_Handler [WEAK]
323 B .
324 ENDP
325 MemManage_Handler\
326 PROC
327 EXPORT MemManage_Handler [WEAK]
328 B .
329 ENDP
330 BusFault_Handler\
331 PROC
332 EXPORT BusFault_Handler [WEAK]
333 B .
334 ENDP
335 UsageFault_Handler\
336 PROC
337 EXPORT UsageFault_Handler [WEAK]
338 B .
339 ENDP
340 SVC_Handler PROC
341 EXPORT SVC_Handler [WEAK]
342 B .
343 ENDP
344 DebugMon_Handler\
345 PROC
346 EXPORT DebugMon_Handler [WEAK]
347 B .
348 ENDP
349 PendSV_Handler PROC
350 EXPORT PendSV_Handler [WEAK]
351 B .
352 ENDP
353 SysTick_Handler PROC
354 EXPORT SysTick_Handler [WEAK]
355 B .
356 ENDP
357
358 Default_Handler PROC
359 EXPORT DMA0_IRQHandler [WEAK]
360 EXPORT DMA1_IRQHandler [WEAK]
361 EXPORT DMA2_IRQHandler [WEAK]
362 EXPORT DMA3_IRQHandler [WEAK]
363 EXPORT DMA4_IRQHandler [WEAK]
364 EXPORT DMA5_IRQHandler [WEAK]
365 EXPORT DMA6_IRQHandler [WEAK]
366 EXPORT DMA7_IRQHandler [WEAK]
367 EXPORT DMA8_IRQHandler [WEAK]
368 EXPORT DMA9_IRQHandler [WEAK]
369 EXPORT DMA10_IRQHandler [WEAK]
370 EXPORT DMA11_IRQHandler [WEAK]
371 EXPORT DMA12_IRQHandler [WEAK]
372 EXPORT DMA13_IRQHandler [WEAK]
373 EXPORT DMA14_IRQHandler [WEAK]
374 EXPORT DMA15_IRQHandler [WEAK]
375 EXPORT DMA_Error_IRQHandler [WEAK]
376 EXPORT Reserved33_IRQHandler [WEAK]
377 EXPORT FTFL_IRQHandler [WEAK]
378 EXPORT Read_Collision_IRQHandler [WEAK]
379 EXPORT LVD_LVW_IRQHandler [WEAK]
380 EXPORT LLW_IRQHandler [WEAK]
381 EXPORT Watchdog_IRQHandler [WEAK]
382 EXPORT Reserved39_IRQHandler [WEAK]
383 EXPORT I2C0_IRQHandler [WEAK]
384 EXPORT I2C1_IRQHandler [WEAK]
385 EXPORT SPI0_IRQHandler [WEAK]
386 EXPORT SPI1_IRQHandler [WEAK]
387 EXPORT Reserved44_IRQHandler [WEAK]
388 EXPORT CAN0_ORed_Message_buffer_IRQHandler [WEAK]
389 EXPORT CAN0_Bus_Off_IRQHandler [WEAK]
390 EXPORT CAN0_Error_IRQHandler [WEAK]
391 EXPORT CAN0_Tx_Warning_IRQHandler [WEAK]
392 EXPORT CAN0_Rx_Warning_IRQHandler [WEAK]
393 EXPORT CAN0_Wake_Up_IRQHandler [WEAK]
394 EXPORT I2S0_Tx_IRQHandler [WEAK]
395 EXPORT I2S0_Rx_IRQHandler [WEAK]
396 EXPORT Reserved53_IRQHandler [WEAK]
397 EXPORT Reserved54_IRQHandler [WEAK]
398 EXPORT Reserved55_IRQHandler [WEAK]
399 EXPORT Reserved56_IRQHandler [WEAK]
400 EXPORT Reserved57_IRQHandler [WEAK]
401 EXPORT Reserved58_IRQHandler [WEAK]
402 EXPORT Reserved59_IRQHandler [WEAK]
403 EXPORT UART0_LON_IRQHandler [WEAK]
404 EXPORT UART0_RX_TX_IRQHandler [WEAK]
405 EXPORT UART0_ERR_IRQHandler [WEAK]
406 EXPORT UART1_RX_TX_IRQHandler [WEAK]
407 EXPORT UART1_ERR_IRQHandler [WEAK]
408 EXPORT UART2_RX_TX_IRQHandler [WEAK]
409 EXPORT UART2_ERR_IRQHandler [WEAK]
410 EXPORT Reserved67_IRQHandler [WEAK]
411 EXPORT Reserved68_IRQHandler [WEAK]
412 EXPORT Reserved69_IRQHandler [WEAK]
413 EXPORT Reserved70_IRQHandler [WEAK]
414 EXPORT Reserved71_IRQHandler [WEAK]
415 EXPORT Reserved72_IRQHandler [WEAK]
416 EXPORT ADC0_IRQHandler [WEAK]
417 EXPORT ADC1_IRQHandler [WEAK]
418 EXPORT CMP0_IRQHandler [WEAK]
419 EXPORT CMP1_IRQHandler [WEAK]
420 EXPORT CMP2_IRQHandler [WEAK]
421 EXPORT FTM0_IRQHandler [WEAK]
422 EXPORT FTM1_IRQHandler [WEAK]
423 EXPORT FTM2_IRQHandler [WEAK]
424 EXPORT CMT_IRQHandler [WEAK]
425 EXPORT RTC_IRQHandler [WEAK]
426 EXPORT RTC_Seconds_IRQHandler [WEAK]
427 EXPORT PIT0_IRQHandler [WEAK]
428 EXPORT PIT1_IRQHandler [WEAK]
429 EXPORT PIT2_IRQHandler [WEAK]
430 EXPORT PIT3_IRQHandler [WEAK]
431 EXPORT PDB0_IRQHandler [WEAK]
432 EXPORT USB0_IRQHandler [WEAK]
433 EXPORT USBDCD_IRQHandler [WEAK]
434 EXPORT Reserved91_IRQHandler [WEAK]
435 EXPORT Reserved92_IRQHandler [WEAK]
436 EXPORT Reserved93_IRQHandler [WEAK]
437 EXPORT Reserved94_IRQHandler [WEAK]
438 EXPORT Reserved95_IRQHandler [WEAK]
439 EXPORT Reserved96_IRQHandler [WEAK]
440 EXPORT DAC0_IRQHandler [WEAK]
441 EXPORT Reserved98_IRQHandler [WEAK]
442 EXPORT TSI0_IRQHandler [WEAK]
443 EXPORT MCG_IRQHandler [WEAK]
444 EXPORT LPTimer_IRQHandler [WEAK]
445 EXPORT Reserved102_IRQHandler [WEAK]
446 EXPORT PORTA_IRQHandler [WEAK]
447 EXPORT PORTB_IRQHandler [WEAK]
448 EXPORT PORTC_IRQHandler [WEAK]
449 EXPORT PORTD_IRQHandler [WEAK]
450 EXPORT PORTE_IRQHandler [WEAK]
451 EXPORT Reserved108_IRQHandler [WEAK]
452 EXPORT Reserved109_IRQHandler [WEAK]
453 EXPORT SWI_IRQHandler [WEAK]
454 EXPORT DefaultISR [WEAK]
455
456 DMA0_IRQHandler
457 DMA1_IRQHandler
458 DMA2_IRQHandler
459 DMA3_IRQHandler
460 DMA4_IRQHandler
461 DMA5_IRQHandler
462 DMA6_IRQHandler
463 DMA7_IRQHandler
464 DMA8_IRQHandler
465 DMA9_IRQHandler
466 DMA10_IRQHandler
467 DMA11_IRQHandler
468 DMA12_IRQHandler
469 DMA13_IRQHandler
470 DMA14_IRQHandler
471 DMA15_IRQHandler
472 DMA_Error_IRQHandler
473 Reserved33_IRQHandler
474 FTFL_IRQHandler
475 Read_Collision_IRQHandler
476 LVD_LVW_IRQHandler
477 LLW_IRQHandler
478 Watchdog_IRQHandler
479 Reserved39_IRQHandler
480 I2C0_IRQHandler
481 I2C1_IRQHandler
482 SPI0_IRQHandler
483 SPI1_IRQHandler
484 Reserved44_IRQHandler
485 CAN0_ORed_Message_buffer_IRQHandler
486 CAN0_Bus_Off_IRQHandler
487 CAN0_Error_IRQHandler
488 CAN0_Tx_Warning_IRQHandler
489 CAN0_Rx_Warning_IRQHandler
490 CAN0_Wake_Up_IRQHandler
491 I2S0_Tx_IRQHandler
492 I2S0_Rx_IRQHandler
493 Reserved53_IRQHandler
494 Reserved54_IRQHandler
495 Reserved55_IRQHandler
496 Reserved56_IRQHandler
497 Reserved57_IRQHandler
498 Reserved58_IRQHandler
499 Reserved59_IRQHandler
500 UART0_LON_IRQHandler
501 UART0_RX_TX_IRQHandler
502 UART0_ERR_IRQHandler
503 UART1_RX_TX_IRQHandler
504 UART1_ERR_IRQHandler
505 UART2_RX_TX_IRQHandler
506 UART2_ERR_IRQHandler
507 Reserved67_IRQHandler
508 Reserved68_IRQHandler
509 Reserved69_IRQHandler
510 Reserved70_IRQHandler
511 Reserved71_IRQHandler
512 Reserved72_IRQHandler
513 ADC0_IRQHandler
514 ADC1_IRQHandler
515 CMP0_IRQHandler
516 CMP1_IRQHandler
517 CMP2_IRQHandler
518 FTM0_IRQHandler
519 FTM1_IRQHandler
520 FTM2_IRQHandler
521 CMT_IRQHandler
522 RTC_IRQHandler
523 RTC_Seconds_IRQHandler
524 PIT0_IRQHandler
525 PIT1_IRQHandler
526 PIT2_IRQHandler
527 PIT3_IRQHandler
528 PDB0_IRQHandler
529 USB0_IRQHandler
530 USBDCD_IRQHandler
531 Reserved91_IRQHandler
532 Reserved92_IRQHandler
533 Reserved93_IRQHandler
534 Reserved94_IRQHandler
535 Reserved95_IRQHandler
536 Reserved96_IRQHandler
537 DAC0_IRQHandler
538 Reserved98_IRQHandler
539 TSI0_IRQHandler
540 MCG_IRQHandler
541 LPTimer_IRQHandler
542 Reserved102_IRQHandler
543 PORTA_IRQHandler
544 PORTB_IRQHandler
545 PORTC_IRQHandler
546 PORTD_IRQHandler
547 PORTE_IRQHandler
548 Reserved108_IRQHandler
549 Reserved109_IRQHandler
550 SWI_IRQHandler
551 DefaultISR
552
553 B .
554
555 ENDP
556
557
558 ALIGN
559 END
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