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1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_dma_ex.h
4 * @author MCD Application Team
5 * @version V1.0.0
6 * @date 5-September-2014
7 * @brief Header file of DMA HAL extension module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_HAL_DMA_EX_H
40 #define __STM32L1xx_HAL_DMA_EX_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l1xx_hal_def.h"
48
49 /** @addtogroup STM32L1xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup DMAEx
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /* Exported constants --------------------------------------------------------*/
59 /* Exported macro ------------------------------------------------------------*/
60 /** @defgroup DMAEx_Exported_Macros DMAEx Exported Macros
61 * @{
62 */
63
64 /* Interrupt & Flag management */
65 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
66 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
67 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
68 /**
69 * @brief Returns the current DMA Channel transfer complete flag.
70 * @param __HANDLE__: DMA handle
71 * @retval The specified transfer complete flag index.
72 */
73
74 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
75 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
76 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
77 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
86 DMA_FLAG_TC5)
87
88 /**
89 * @brief Returns the current DMA Channel half transfer complete flag.
90 * @param __HANDLE__: DMA handle
91 * @retval The specified half transfer complete flag index.
92 */
93 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
94 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
95 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
96 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
105 DMA_FLAG_HT5)
106
107 /**
108 * @brief Returns the current DMA Channel transfer error flag.
109 * @param __HANDLE__: DMA handle
110 * @retval The specified transfer error flag index.
111 */
112 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
113 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
114 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
115 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
124 DMA_FLAG_TE5)
125
126 /**
127 * @brief Get the DMA Channel pending flags.
128 * @param __HANDLE__: DMA handle
129 * @param __FLAG__: Get the specified flag.
130 * This parameter can be any combination of the following values:
131 * @arg DMA_FLAG_TCx: Transfer complete flag
132 * @arg DMA_FLAG_HTx: Half transfer complete flag
133 * @arg DMA_FLAG_TEx: Transfer error flag
134 * Where x can be 1_7 or 1_5 to select the DMA Channel flag.
135 * @retval The state of FLAG (SET or RESET).
136 */
137
138 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
139 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
140 (DMA1->ISR & (__FLAG__)))
141
142 /**
143 * @brief Clears the DMA Channel pending flags.
144 * @param __HANDLE__: DMA handle
145 * @param __FLAG__: specifies the flag to clear.
146 * This parameter can be any combination of the following values:
147 * @arg DMA_FLAG_TCx: Transfer complete flag
148 * @arg DMA_FLAG_HTx: Half transfer complete flag
149 * @arg DMA_FLAG_TEx: Transfer error flag
150 * Where x can be 1_7 or 1_5 to select the DMA Channel flag.
151 * @retval None
152 */
153 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
154 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
155 (DMA1->IFCR = (__FLAG__)))
156
157 #else
158 /**
159 * @brief Returns the current DMA Channel transfer complete flag.
160 * @param __HANDLE__: DMA handle
161 * @retval The specified transfer complete flag index.
162 */
163 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
164 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
165 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
166 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
167 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
168 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
169 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
170 DMA_FLAG_TC7)
171
172 /**
173 * @brief Returns the current DMA Channel half transfer complete flag.
174 * @param __HANDLE__: DMA handle
175 * @retval The specified half transfer complete flag index.
176 */
177 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
178 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
179 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
180 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
181 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
182 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
183 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
184 DMA_FLAG_HT7)
185
186 /**
187 * @brief Returns the current DMA Channel transfer error flag.
188 * @param __HANDLE__: DMA handle
189 * @retval The specified transfer error flag index.
190 */
191 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
192 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
193 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
194 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
195 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
196 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
197 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
198 DMA_FLAG_TE7)
199
200 /**
201 * @brief Get the DMA Channel pending flags.
202 * @param __HANDLE__: DMA handle
203 * @param __FLAG__: Get the specified flag.
204 * This parameter can be any combination of the following values:
205 * @arg DMA_FLAG_TCx: Transfer complete flag
206 * @arg DMA_FLAG_HTx: Half transfer complete flag
207 * @arg DMA_FLAG_TEx: Transfer error flag
208 * Where x can be 1_7 to select the DMA Channel flag.
209 * @retval The state of FLAG (SET or RESET).
210 */
211
212 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
213
214 /**
215 * @brief Clears the DMA Channel pending flags.
216 * @param __HANDLE__: DMA handle
217 * @param __FLAG__: specifies the flag to clear.
218 * This parameter can be any combination of the following values:
219 * @arg DMA_FLAG_TCx: Transfer complete flag
220 * @arg DMA_FLAG_HTx: Half transfer complete flag
221 * @arg DMA_FLAG_TEx: Transfer error flag
222 * Where x can be 1_7 to select the DMA Channel flag.
223 * @retval None
224 */
225 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
226
227 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || STM32L151xE || STM32L152xE || STM32L162xE */
228
229 /**
230 * @}
231 */
232
233
234 /**
235 * @}
236 */
237
238 /**
239 * @}
240 */
241
242 #ifdef __cplusplus
243 }
244 #endif
245
246 #endif /* __STM32L1xx_HAL_DMA_EX_H */
247
248 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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