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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / hal / TARGET_Freescale / TARGET_K20XX / gpio_irq_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2015 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include <stddef.h>
17 #include "cmsis.h"
18
19 #include "gpio_irq_api.h"
20 #include "mbed_error.h"
21
22 #define CHANNEL_NUM 160
23
24 static uint32_t channel_ids[CHANNEL_NUM] = {0};
25 static gpio_irq_handler irq_handler;
26
27 #define IRQ_DISABLED (0)
28 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
29 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
30 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
31
32 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
33 uint32_t isfr;
34 uint32_t pin;
35
36 while ((isfr = port->ISFR) != 0) {
37 pin = 31 - __CLZ(isfr);
38 uint32_t id = channel_ids[ch_base + pin];
39 if (id == 0) {
40 continue;
41 }
42
43 GPIO_Type *gpio = PTA;
44 gpio_irq_event event = IRQ_NONE;
45 uint32_t port_num = (port - PORTA) >> 12;
46
47 switch (port->PCR[pin] & PORT_PCR_IRQC_MASK) {
48 case IRQ_RAISING_EDGE:
49 event = IRQ_RISE;
50 break;
51 case IRQ_FALLING_EDGE:
52 event = IRQ_FALL;
53 break;
54 case IRQ_EITHER_EDGE:
55 gpio += (port_num * 0x40);
56 event = (gpio->PDIR & (1 << pin)) ? (IRQ_RISE) : (IRQ_FALL);
57 break;
58 }
59 if (event != IRQ_NONE) {
60 irq_handler(id, event);
61 }
62 port->ISFR = 1 << pin;
63 }
64 }
65
66 void gpio_irqA(void) {
67 handle_interrupt_in(PORTA, 0);
68 }
69
70 void gpio_irqB(void)
71 {
72 handle_interrupt_in(PORTB, 32);
73 }
74
75 void gpio_irqC(void)
76 {
77 handle_interrupt_in(PORTC, 64);
78 }
79
80 void gpio_irqD(void)
81 {
82 handle_interrupt_in(PORTD, 96);
83 }
84
85 void gpio_irqE(void)
86 {
87 handle_interrupt_in(PORTE, 128);
88 }
89
90
91 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
92 if (pin == NC)
93 return -1;
94
95 irq_handler = handler;
96
97 obj->port = pin >> PORT_SHIFT;
98 obj->pin = (pin & 0x7F) >> 2;
99
100 uint32_t ch_base, vector;
101 IRQn_Type irq_n;
102 switch (obj->port) {
103 case PortA:
104 ch_base = 0;
105 irq_n = PORTA_IRQn;
106 vector = (uint32_t)gpio_irqA;
107 break;
108 case PortB:
109 ch_base = 32;
110 irq_n = PORTB_IRQn;
111 vector = (uint32_t)gpio_irqB;
112 break;
113 case PortC:
114 ch_base = 64;
115 irq_n = PORTC_IRQn;
116 vector = (uint32_t)gpio_irqC;
117 break;
118 case PortD:
119 ch_base = 96;
120 irq_n = PORTD_IRQn; vector = (uint32_t)gpio_irqD;
121 break;
122 case PortE:
123 ch_base = 128;
124 irq_n = PORTE_IRQn;
125 vector = (uint32_t)gpio_irqE;
126 break;
127
128 default:
129 error("gpio_irq only supported on port A-E.");
130 break;
131 }
132 NVIC_SetVector(irq_n, vector);
133 NVIC_EnableIRQ(irq_n);
134
135 obj->ch = ch_base + obj->pin;
136 channel_ids[obj->ch] = id;
137
138 return 0;
139 }
140
141 void gpio_irq_free(gpio_irq_t *obj) {
142 channel_ids[obj->ch] = 0;
143 }
144
145 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
146 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
147
148 uint32_t irq_settings = IRQ_DISABLED;
149
150 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
151 case IRQ_DISABLED:
152 if (enable)
153 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
154 break;
155
156 case IRQ_RAISING_EDGE:
157 if (enable) {
158 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
159 } else {
160 if (event == IRQ_FALL)
161 irq_settings = IRQ_RAISING_EDGE;
162 }
163 break;
164
165 case IRQ_FALLING_EDGE:
166 if (enable) {
167 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
168 } else {
169 if (event == IRQ_RISE)
170 irq_settings = IRQ_FALLING_EDGE;
171 }
172 break;
173
174 case IRQ_EITHER_EDGE:
175 if (enable) {
176 irq_settings = IRQ_EITHER_EDGE;
177 } else {
178 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
179 }
180 break;
181 }
182
183 // Interrupt configuration and clear interrupt
184 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
185 }
186
187 void gpio_irq_enable(gpio_irq_t *obj) {
188 switch (obj->port) {
189 case PortA:
190 NVIC_EnableIRQ(PORTA_IRQn);
191 break;
192 case PortB:
193 NVIC_EnableIRQ(PORTB_IRQn);
194 break;
195 case PortC:
196 NVIC_EnableIRQ(PORTC_IRQn);
197 break;
198 case PortD:
199 NVIC_EnableIRQ(PORTD_IRQn);
200 break;
201 case PortE:
202 NVIC_EnableIRQ(PORTE_IRQn);
203 break;
204 }
205 }
206
207 void gpio_irq_disable(gpio_irq_t *obj) {
208 switch (obj->port) {
209 case PortA:
210 NVIC_DisableIRQ(PORTA_IRQn);
211 break;
212 case PortB:
213 NVIC_DisableIRQ(PORTB_IRQn);
214 break;
215 case PortC:
216 NVIC_DisableIRQ(PORTC_IRQn);
217 break;
218 case PortD:
219 NVIC_DisableIRQ(PORTD_IRQn);
220 break;
221 case PortE:
222 NVIC_DisableIRQ(PORTE_IRQn);
223 break;
224 }
225 }
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