1 /* mbed Microcontroller Library
2 *******************************************************************************
3 * Copyright (c) 2014, STMicroelectronics
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
9 * 1. Redistributions of source code must retain the above copyright notice,
10 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *******************************************************************************
32 #include "gpio_irq_api.h"
34 #include "mbed_error.h"
41 // Number of EXTI irq vectors (EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5_9, EXTI10_15)
42 #define CHANNEL_NUM (7)
44 // Max pins for one line (max with EXTI10_15)
45 #define MAX_PIN_LINE (6)
47 typedef struct gpio_channel
{
48 uint32_t pin_mask
; // bitmask representing which pins are configured for receiving interrupts
49 uint32_t channel_ids
[MAX_PIN_LINE
]; // mbed "gpio_irq_t gpio_irq" field of instance
50 uint32_t channel_gpio
[MAX_PIN_LINE
]; // base address of gpio port group
51 uint32_t channel_pin
[MAX_PIN_LINE
]; // pin number in port group
54 static gpio_channel_t channels
[CHANNEL_NUM
] = {
64 // Used to return the index for channels array.
65 static uint32_t pin_base_nr
[16] = {
91 static gpio_irq_handler irq_handler
;
93 static void handle_interrupt_in(uint32_t irq_index
, uint32_t max_num_pin_line
)
95 gpio_channel_t
*gpio_channel
= &channels
[irq_index
];
98 for (gpio_idx
= 0; gpio_idx
< max_num_pin_line
; gpio_idx
++) {
99 uint32_t current_mask
= (1 << gpio_idx
);
101 if (gpio_channel
->pin_mask
& current_mask
) {
102 // Retrieve the gpio and pin that generate the irq
103 GPIO_TypeDef
*gpio
= (GPIO_TypeDef
*)(gpio_channel
->channel_gpio
[gpio_idx
]);
104 uint32_t pin
= (uint32_t)(1 << (gpio_channel
->channel_pin
[gpio_idx
]));
106 // Clear interrupt flag
107 if (__HAL_GPIO_EXTI_GET_FLAG(pin
) != RESET
) {
108 __HAL_GPIO_EXTI_CLEAR_FLAG(pin
);
110 if (gpio_channel
->channel_ids
[gpio_idx
] == 0) continue;
112 // Check which edge has generated the irq
113 if ((gpio
->IDR
& pin
) == 0) {
114 irq_handler(gpio_channel
->channel_ids
[gpio_idx
], IRQ_FALL
);
116 irq_handler(gpio_channel
->channel_ids
[gpio_idx
], IRQ_RISE
);
124 static void gpio_irq0(void)
126 handle_interrupt_in(0, 1);
130 static void gpio_irq1(void)
132 handle_interrupt_in(1, 1);
136 static void gpio_irq2(void)
138 handle_interrupt_in(2, 1);
142 static void gpio_irq3(void)
144 handle_interrupt_in(3, 1);
148 static void gpio_irq4(void)
150 handle_interrupt_in(4, 1);
154 static void gpio_irq5(void)
156 handle_interrupt_in(5, 5);
159 // EXTI lines 10 to 15
160 static void gpio_irq6(void)
162 handle_interrupt_in(6, 6);
165 extern uint32_t Set_GPIO_Clock(uint32_t port_idx
);
167 int gpio_irq_init(gpio_irq_t
*obj
, PinName pin
, gpio_irq_handler handler
, uint32_t id
)
169 IRQn_Type irq_n
= (IRQn_Type
)0;
172 gpio_channel_t
*gpio_channel
;
175 if (pin
== NC
) return -1;
177 uint32_t port_index
= STM_PORT(pin
);
178 uint32_t pin_index
= STM_PIN(pin
);
180 // Select irq number and interrupt routine
184 vector
= (uint32_t)&gpio_irq0
;
189 vector
= (uint32_t)&gpio_irq1
;
194 vector
= (uint32_t)&gpio_irq2
;
199 vector
= (uint32_t)&gpio_irq3
;
204 vector
= (uint32_t)&gpio_irq4
;
212 irq_n
= EXTI9_5_IRQn
;
213 vector
= (uint32_t)&gpio_irq5
;
222 irq_n
= EXTI15_10_IRQn
;
223 vector
= (uint32_t)&gpio_irq6
;
227 error("InterruptIn error: pin not supported.\n");
232 uint32_t gpio_add
= Set_GPIO_Clock(port_index
);
235 pin_function(pin
, STM_PIN_DATA(STM_MODE_IT_FALLING
, GPIO_NOPULL
, 0));
237 // Enable EXTI interrupt
238 NVIC_SetVector(irq_n
, vector
);
239 NVIC_EnableIRQ(irq_n
);
241 // Save informations for future use
243 obj
->irq_index
= irq_index
;
244 obj
->event
= EDGE_NONE
;
247 gpio_channel
= &channels
[irq_index
];
248 gpio_idx
= pin_base_nr
[pin_index
];
249 gpio_channel
->pin_mask
|= (1 << gpio_idx
);
250 gpio_channel
->channel_ids
[gpio_idx
] = id
;
251 gpio_channel
->channel_gpio
[gpio_idx
] = gpio_add
;
252 gpio_channel
->channel_pin
[gpio_idx
] = pin_index
;
254 irq_handler
= handler
;
259 void gpio_irq_free(gpio_irq_t
*obj
)
261 gpio_channel_t
*gpio_channel
= &channels
[obj
->irq_index
];
262 uint32_t pin_index
= STM_PIN(obj
->pin
);
263 uint32_t gpio_idx
= pin_base_nr
[pin_index
];
265 gpio_channel
->pin_mask
&= ~(1 << gpio_idx
);
266 gpio_channel
->channel_ids
[gpio_idx
] = 0;
267 gpio_channel
->channel_gpio
[gpio_idx
] = 0;
268 gpio_channel
->channel_pin
[gpio_idx
] = 0;
271 pin_function(obj
->pin
, STM_PIN_DATA(STM_MODE_INPUT
, GPIO_NOPULL
, 0));
272 obj
->event
= EDGE_NONE
;
275 void gpio_irq_set(gpio_irq_t
*obj
, gpio_irq_event event
, uint32_t enable
)
277 uint32_t mode
= STM_MODE_IT_EVT_RESET
;
278 uint32_t pull
= GPIO_NOPULL
;
281 if (event
== IRQ_RISE
) {
282 if ((obj
->event
== EDGE_FALL
) || (obj
->event
== EDGE_BOTH
)) {
283 mode
= STM_MODE_IT_RISING_FALLING
;
284 obj
->event
= EDGE_BOTH
;
285 } else { // NONE or RISE
286 mode
= STM_MODE_IT_RISING
;
287 obj
->event
= EDGE_RISE
;
290 if (event
== IRQ_FALL
) {
291 if ((obj
->event
== EDGE_RISE
) || (obj
->event
== EDGE_BOTH
)) {
292 mode
= STM_MODE_IT_RISING_FALLING
;
293 obj
->event
= EDGE_BOTH
;
294 } else { // NONE or FALL
295 mode
= STM_MODE_IT_FALLING
;
296 obj
->event
= EDGE_FALL
;
300 if (event
== IRQ_RISE
) {
301 if ((obj
->event
== EDGE_FALL
) || (obj
->event
== EDGE_BOTH
)) {
302 mode
= STM_MODE_IT_FALLING
;
303 obj
->event
= EDGE_FALL
;
304 } else { // NONE or RISE
305 mode
= STM_MODE_IT_EVT_RESET
;
306 obj
->event
= EDGE_NONE
;
309 if (event
== IRQ_FALL
) {
310 if ((obj
->event
== EDGE_RISE
) || (obj
->event
== EDGE_BOTH
)) {
311 mode
= STM_MODE_IT_RISING
;
312 obj
->event
= EDGE_RISE
;
313 } else { // NONE or FALL
314 mode
= STM_MODE_IT_EVT_RESET
;
315 obj
->event
= EDGE_NONE
;
320 pin_function(obj
->pin
, STM_PIN_DATA(mode
, pull
, 0));
323 void gpio_irq_enable(gpio_irq_t
*obj
)
325 NVIC_EnableIRQ(obj
->irq_n
);
328 void gpio_irq_disable(gpio_irq_t
*obj
)
330 NVIC_DisableIRQ(obj
->irq_n
);
331 obj
->event
= EDGE_NONE
;