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1 /*-----------------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 *
4 * $Date: 17. January 2013
5 * $Revision: V1.4.1
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_lms_norm_init_q31.c
9 *
10 * Description: Q31 NLMS initialization function.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * ---------------------------------------------------------------------------*/
40
41 #include "arm_math.h"
42 #include "arm_common_tables.h"
43
44 /**
45 * @addtogroup LMS_NORM
46 * @{
47 */
48
49 /**
50 * @brief Initialization function for Q31 normalized LMS filter.
51 * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
52 * @param[in] numTaps number of filter coefficients.
53 * @param[in] *pCoeffs points to coefficient buffer.
54 * @param[in] *pState points to state buffer.
55 * @param[in] mu step size that controls filter coefficient updates.
56 * @param[in] blockSize number of samples to process.
57 * @param[in] postShift bit shift applied to coefficients.
58 * @return none.
59 *
60 * <b>Description:</b>
61 * \par
62 * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
63 * <pre>
64 * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
65 * </pre>
66 * The initial filter coefficients serve as a starting point for the adaptive filter.
67 * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
68 * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
69 */
70
71 void arm_lms_norm_init_q31(
72 arm_lms_norm_instance_q31 * S,
73 uint16_t numTaps,
74 q31_t * pCoeffs,
75 q31_t * pState,
76 q31_t mu,
77 uint32_t blockSize,
78 uint8_t postShift)
79 {
80 /* Assign filter taps */
81 S->numTaps = numTaps;
82
83 /* Assign coefficient pointer */
84 S->pCoeffs = pCoeffs;
85
86 /* Clear state buffer and size is always blockSize + numTaps - 1 */
87 memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
88
89 /* Assign post Shift value applied to coefficients */
90 S->postShift = postShift;
91
92 /* Assign state pointer */
93 S->pState = pState;
94
95 /* Assign Step size value */
96 S->mu = mu;
97
98 /* Initialize reciprocal pointer table */
99 S->recipTable = (q31_t *) armRecipTableQ31;
100
101 /* Initialise Energy to zero */
102 S->energy = 0;
103
104 /* Initialise x0 to zero */
105 S->x0 = 0;
106
107 }
108
109 /**
110 * @} end of LMS_NORM group
111 */
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