tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_iwdg.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f30x_iwdg.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    27-February-2014
   7   * @brief   This file provides firmware functions to manage the following
   8   *          functionalities of the Independent watchdog (IWDG) peripheral:
   9   *           + Prescaler and Counter configuration
  10   *           + IWDG activation
  11   *           + Flag management
  12   *
  13   @verbatim
  14
  15  ===============================================================================
  16                           ##### IWDG features #####
  17  ===============================================================================
  18     [..] The IWDG can be started by either software or hardware (configurable
  19          through option byte).
  20     [..] The IWDG is clocked by its own dedicated low-speed clock (LSI) and
  21          thus stays active even if the main clock fails.
  22          Once the IWDG is started, the LSI is forced ON and cannot be disabled
  23          (LSI cannot be disabled too), and the counter starts counting down from
  24          the reset value of 0xFFF. When it reaches the end of count value (0x000)
  25          a system reset is generated.
  26          The IWDG counter should be reloaded at regular intervals to prevent
  27          an MCU reset.
  28     [..] The IWDG is implemented in the VDD voltage domain that is still functional
  29          in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
  30     [..] IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
  31          reset occurs.
  32     [..] Min-max timeout value @41KHz (LSI): ~0.1ms / ~25.5s
  33          The IWDG timeout may vary due to LSI frequency dispersion. STM32F30x
  34          devices provide the capability to measure the LSI frequency (LSI clock
  35          connected internally to TIM16 CH1 input capture). The measured value
  36          can be used to have an IWDG timeout with an acceptable accuracy.
  37          For more information, please refer to the STM32F30x Reference manual.
  38
  39                       ##### How to use this driver #####
  40  ===============================================================================
  41     [..] This driver allows to use IWDG peripheral with either window option enabled
  42          or disabled. To do so follow one of the two procedures below.
  43     (#) Window option is enabled:
  44         (++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
  45              in software mode (no need to enable the LSI, it will be enabled
  46              by hardware).
  47         (++) Enable write access to IWDG_PR and IWDG_RLR registers using
  48              IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
  49         (++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
  50         (++) Configure the IWDG counter value using IWDG_SetReload() function.
  51              This value will be loaded in the IWDG counter each time the counter
  52              is reloaded, then the IWDG will start counting down from this value.
  53         (++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
  54         (++) Configure the IWDG refresh window using IWDG_SetWindowValue() function.
  55
  56     (#) Window option is disabled:
  57         (++) Enable write access to IWDG_PR and IWDG_RLR registers using
  58              IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
  59         (++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
  60         (++) Configure the IWDG counter value using IWDG_SetReload() function.
  61              This value will be loaded in the IWDG counter each time the counter
  62              is reloaded, then the IWDG will start counting down from this value.
  63         (++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
  64         (++) reload the IWDG counter at regular intervals during normal operation
  65              to prevent an MCU reset, using IWDG_ReloadCounter() function.
  66         (++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
  67              in software mode (no need to enable the LSI, it will be enabled
  68              by hardware).
  69
  70   @endverbatim
  71
  72   ******************************************************************************
  73   * @attention
  74   *
  75   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  76   *
  77   * Redistribution and use in source and binary forms, with or without modification,
  78   * are permitted provided that the following conditions are met:
  79   *   1. Redistributions of source code must retain the above copyright notice,
  80   *      this list of conditions and the following disclaimer.
  81   *   2. Redistributions in binary form must reproduce the above copyright notice,
  82   *      this list of conditions and the following disclaimer in the documentation
  83   *      and/or other materials provided with the distribution.
  84   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  85   *      may be used to endorse or promote products derived from this software
  86   *      without specific prior written permission.
  87   *
  88   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  89   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  90   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  91   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  92   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  93   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  94   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  95   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  96   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  97   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  98   *
  99   ******************************************************************************
 100   */
 101
 102 /* Includes ------------------------------------------------------------------*/
 103 #include "stm32f30x_iwdg.h"
 104
 105 /** @addtogroup STM32F30x_StdPeriph_Driver
 106   * @{
 107   */
 108
 109 /** @defgroup IWDG
 110   * @brief IWDG driver modules
 111   * @{
 112   */
 113
 114 /* Private typedef -----------------------------------------------------------*/
 115 /* Private define ------------------------------------------------------------*/
 116 /* ---------------------- IWDG registers bit mask ----------------------------*/
 117 /* KR register bit mask */
 118 #define KR_KEY_RELOAD    ((uint16_t)0xAAAA)
 119 #define KR_KEY_ENABLE    ((uint16_t)0xCCCC)
 120
 121 /* Private macro -------------------------------------------------------------*/
 122 /* Private variables ---------------------------------------------------------*/
 123 /* Private function prototypes -----------------------------------------------*/
 124 /* Private functions ---------------------------------------------------------*/
 125
 126 /** @defgroup IWDG_Private_Functions
 127   * @{
 128   */
 129
 130 /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
 131  *  @brief   Prescaler and Counter configuration functions
 132  *
 133 @verbatim
 134  ===============================================================================
 135             ##### Prescaler and Counter configuration functions #####
 136  ===============================================================================
 137
 138 @endverbatim
 139   * @{
 140   */
 141
 142 /**
 143   * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.
 144   * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
 145   *   This parameter can be one of the following values:
 146   *     @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
 147   *     @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
 148   * @retval None
 149   */
 150 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
 151 {
 152   /* Check the parameters */
 153   assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
 154   IWDG->KR = IWDG_WriteAccess;
 155 }
 156
 157 /**
 158   * @brief  Sets IWDG Prescaler value.
 159   * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.
 160   *   This parameter can be one of the following values:
 161   *     @arg IWDG_Prescaler_4: IWDG prescaler set to 4
 162   *     @arg IWDG_Prescaler_8: IWDG prescaler set to 8
 163   *     @arg IWDG_Prescaler_16: IWDG prescaler set to 16
 164   *     @arg IWDG_Prescaler_32: IWDG prescaler set to 32
 165   *     @arg IWDG_Prescaler_64: IWDG prescaler set to 64
 166   *     @arg IWDG_Prescaler_128: IWDG prescaler set to 128
 167   *     @arg IWDG_Prescaler_256: IWDG prescaler set to 256
 168   * @retval None
 169   */
 170 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
 171 {
 172   /* Check the parameters */
 173   assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
 174   IWDG->PR = IWDG_Prescaler;
 175 }
 176
 177 /**
 178   * @brief  Sets IWDG Reload value.
 179   * @param  Reload: specifies the IWDG Reload value.
 180   *   This parameter must be a number between 0 and 0x0FFF.
 181   * @retval None
 182   */
 183 void IWDG_SetReload(uint16_t Reload)
 184 {
 185   /* Check the parameters */
 186   assert_param(IS_IWDG_RELOAD(Reload));
 187   IWDG->RLR = Reload;
 188 }
 189
 190 /**
 191   * @brief  Reloads IWDG counter with value defined in the reload register
 192   *   (write access to IWDG_PR and IWDG_RLR registers disabled).
 193   * @param  None
 194   * @retval None
 195   */
 196 void IWDG_ReloadCounter(void)
 197 {
 198   IWDG->KR = KR_KEY_RELOAD;
 199 }
 200
 201
 202 /**
 203   * @brief  Sets the IWDG window value.
 204   * @param  WindowValue: specifies the window value to be compared to the downcounter.
 205   * @retval None
 206   */
 207 void IWDG_SetWindowValue(uint16_t WindowValue)
 208 {
 209   /* Check the parameters */
 210   assert_param(IS_IWDG_WINDOW_VALUE(WindowValue));
 211   IWDG->WINR = WindowValue;
 212 }
 213
 214 /**
 215   * @}
 216   */
 217
 218 /** @defgroup IWDG_Group2 IWDG activation function
 219  *  @brief   IWDG activation function
 220  *
 221 @verbatim
 222  ===============================================================================
 223                     ##### IWDG activation function #####
 224  ===============================================================================
 225
 226 @endverbatim
 227   * @{
 228   */
 229
 230 /**
 231   * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
 232   * @param  None
 233   * @retval None
 234   */
 235 void IWDG_Enable(void)
 236 {
 237   IWDG->KR = KR_KEY_ENABLE;
 238 }
 239
 240 /**
 241   * @}
 242   */
 243
 244 /** @defgroup IWDG_Group3 Flag management function
 245  *  @brief  Flag management function
 246  *
 247 @verbatim
 248  ===============================================================================
 249                      ##### Flag management function #####
 250  ===============================================================================
 251
 252 @endverbatim
 253   * @{
 254   */
 255
 256 /**
 257   * @brief  Checks whether the specified IWDG flag is set or not.
 258   * @param  IWDG_FLAG: specifies the flag to check.
 259   *   This parameter can be one of the following values:
 260   *     @arg IWDG_FLAG_PVU: Prescaler Value Update on going
 261   *     @arg IWDG_FLAG_RVU: Reload Value Update on going
 262   *     @arg IWDG_FLAG_WVU: Counter Window Value Update on going
 263   * @retval The new state of IWDG_FLAG (SET or RESET).
 264   */
 265 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
 266 {
 267   FlagStatus bitstatus = RESET;
 268   /* Check the parameters */
 269   assert_param(IS_IWDG_FLAG(IWDG_FLAG));
 270   if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
 271   {
 272     bitstatus = SET;
 273   }
 274   else
 275   {
 276     bitstatus = RESET;
 277   }
 278   /* Return the flag status */
 279   return bitstatus;
 280 }
 281
 282 /**
 283   * @}
 284   */
 285
 286 /**
 287   * @}
 288   */
 289
 290 /**
 291   * @}
 292   */
 293
 294 /**
 295   * @}
 296   */
 297
 298 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/