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Merge commit '22b6e15a179031afb7c3534cf7b109b0668b602c'
[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F4 / stm32f4xx_hal_cryp.c
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_cryp.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 19-June-2014
7 * @brief CRYP HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Cryptography (CRYP) peripheral:
10 * + Initialization and de-initialization functions
11 * + AES processing functions
12 * + DES processing functions
13 * + TDES processing functions
14 * + DMA callback functions
15 * + CRYP IRQ handler management
16 * + Peripheral State functions
17 *
18 @verbatim
19 ==============================================================================
20 ##### How to use this driver #####
21 ==============================================================================
22 [..]
23 The CRYP HAL driver can be used as follows:
24
25 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
26 (##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE()
27 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
28 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
29 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
30 (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
31 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
32 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
33 (+++) Configure and enable two DMA streams one for managing data transfer from
34 memory to peripheral (input stream) and another stream for managing data
35 transfer from peripheral to memory (output stream)
36 (+++) Associate the initilalized DMA handle to the CRYP DMA handle
37 using __HAL_LINKDMA()
38 (+++) Configure the priority and enable the NVIC for the transfer complete
39 interrupt on the two DMA Streams. The output stream should have higher
40 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
41
42 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
43 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
44 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
45 (##) The encryption/decryption key. It's size depends on the algorithm
46 used for encryption/decryption
47 (##) The initialization vector (counter). It is not used ECB mode.
48
49 (#)Three processing (encryption/decryption) functions are available:
50 (##) Polling mode: encryption and decryption APIs are blocking functions
51 i.e. they process the data and wait till the processing is finished,
52 e.g. HAL_CRYP_AESCBC_Encrypt()
53 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
54 i.e. they process the data under interrupt,
55 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
56 (##) DMA mode: encryption and decryption APIs are not blocking functions
57 i.e. the data transfer is ensured by DMA,
58 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
59
60 (#)When the processing function is called at first time after HAL_CRYP_Init()
61 the CRYP peripheral is initialized and processes the buffer in input.
62 At second call, the processing function performs an append of the already
63 processed buffer.
64 When a new data block is to be processed, call HAL_CRYP_Init() then the
65 processing function.
66
67 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
68
69 @endverbatim
70 ******************************************************************************
71 * @attention
72 *
73 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
74 *
75 * Redistribution and use in source and binary forms, with or without modification,
76 * are permitted provided that the following conditions are met:
77 * 1. Redistributions of source code must retain the above copyright notice,
78 * this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright notice,
80 * this list of conditions and the following disclaimer in the documentation
81 * and/or other materials provided with the distribution.
82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
83 * may be used to endorse or promote products derived from this software
84 * without specific prior written permission.
85 *
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96 *
97 ******************************************************************************
98 */
99
100 /* Includes ------------------------------------------------------------------*/
101 #include "stm32f4xx_hal.h"
102
103 /** @addtogroup STM32F4xx_HAL_Driver
104 * @{
105 */
106
107 /** @defgroup CRYP
108 * @brief CRYP HAL module driver.
109 * @{
110 */
111
112 #ifdef HAL_CRYP_MODULE_ENABLED
113
114 #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx)
115
116 /* Private typedef -----------------------------------------------------------*/
117 /* Private define ------------------------------------------------------------*/
118 #define CRYP_TIMEOUT_VALUE 1
119 /* Private macro -------------------------------------------------------------*/
120 /* Private variables ---------------------------------------------------------*/
121 /* Private function prototypes -----------------------------------------------*/
122 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize);
123 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
124 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
125 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
126 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
127 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
128 static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
129 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
130 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
131 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
132 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
133 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
134
135 /* Private functions ---------------------------------------------------------*/
136
137 /** @defgroup CRYP_Private_Functions
138 * @{
139 */
140
141 /** @defgroup CRYP_Group1 Initialization and de-initialization functions
142 * @brief Initialization and Configuration functions.
143 *
144 @verbatim
145 ==============================================================================
146 ##### Initialization and de-initialization functions #####
147 ==============================================================================
148 [..] This section provides functions allowing to:
149 (+) Initialize the CRYP according to the specified parameters
150 in the CRYP_InitTypeDef and creates the associated handle
151 (+) DeInitialize the CRYP peripheral
152 (+) Initialize the CRYP MSP
153 (+) DeInitialize CRYP MSP
154
155 @endverbatim
156 * @{
157 */
158
159 /**
160 * @brief Initializes the CRYP according to the specified
161 * parameters in the CRYP_InitTypeDef and creates the associated handle.
162 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
163 * the configuration information for CRYP module
164 * @retval HAL status
165 */
166 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
167 {
168 /* Check the CRYP handle allocation */
169 if(hcryp == HAL_NULL)
170 {
171 return HAL_ERROR;
172 }
173
174 /* Check the parameters */
175 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
176 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
177
178 if(hcryp->State == HAL_CRYP_STATE_RESET)
179 {
180 /* Init the low level hardware */
181 HAL_CRYP_MspInit(hcryp);
182 }
183
184 /* Change the CRYP state */
185 hcryp->State = HAL_CRYP_STATE_BUSY;
186
187 /* Set the key size and data type*/
188 CRYP->CR = (uint32_t) (hcryp->Init.KeySize | hcryp->Init.DataType);
189
190 /* Reset CrypInCount and CrypOutCount */
191 hcryp->CrypInCount = 0;
192 hcryp->CrypOutCount = 0;
193
194 /* Change the CRYP state */
195 hcryp->State = HAL_CRYP_STATE_READY;
196
197 /* Set the default CRYP phase */
198 hcryp->Phase = HAL_CRYP_PHASE_READY;
199
200 /* Return function status */
201 return HAL_OK;
202 }
203
204 /**
205 * @brief DeInitializes the CRYP peripheral.
206 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
207 * the configuration information for CRYP module
208 * @retval HAL status
209 */
210 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
211 {
212 /* Check the CRYP handle allocation */
213 if(hcryp == HAL_NULL)
214 {
215 return HAL_ERROR;
216 }
217
218 /* Change the CRYP state */
219 hcryp->State = HAL_CRYP_STATE_BUSY;
220
221 /* Set the default CRYP phase */
222 hcryp->Phase = HAL_CRYP_PHASE_READY;
223
224 /* Reset CrypInCount and CrypOutCount */
225 hcryp->CrypInCount = 0;
226 hcryp->CrypOutCount = 0;
227
228 /* Disable the CRYP Peripheral Clock */
229 __HAL_CRYP_DISABLE();
230
231 /* DeInit the low level hardware: CLOCK, NVIC.*/
232 HAL_CRYP_MspDeInit(hcryp);
233
234 /* Change the CRYP state */
235 hcryp->State = HAL_CRYP_STATE_RESET;
236
237 /* Release Lock */
238 __HAL_UNLOCK(hcryp);
239
240 /* Return function status */
241 return HAL_OK;
242 }
243
244 /**
245 * @brief Initializes the CRYP MSP.
246 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
247 * the configuration information for CRYP module
248 * @retval None
249 */
250 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
251 {
252 /* NOTE : This function Should not be modified, when the callback is needed,
253 the HAL_CRYP_MspInit could be implemented in the user file
254 */
255 }
256
257 /**
258 * @brief DeInitializes CRYP MSP.
259 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
260 * the configuration information for CRYP module
261 * @retval None
262 */
263 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
264 {
265 /* NOTE : This function Should not be modified, when the callback is needed,
266 the HAL_CRYP_MspDeInit could be implemented in the user file
267 */
268 }
269
270 /**
271 * @}
272 */
273
274 /** @defgroup CRYP_Group2 AES processing functions
275 * @brief processing functions.
276 *
277 @verbatim
278 ==============================================================================
279 ##### AES processing functions #####
280 ==============================================================================
281 [..] This section provides functions allowing to:
282 (+) Encrypt plaintext using AES-128/192/256 using chaining modes
283 (+) Decrypt cyphertext using AES-128/192/256 using chaining modes
284 [..] Three processing functions are available:
285 (+) Polling mode
286 (+) Interrupt mode
287 (+) DMA mode
288
289 @endverbatim
290 * @{
291 */
292
293 /**
294 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
295 * then encrypt pPlainData. The cypher data are available in pCypherData
296 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
297 * the configuration information for CRYP module
298 * @param pPlainData: Pointer to the plaintext buffer
299 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
300 * @param pCypherData: Pointer to the cyphertext buffer
301 * @param Timeout: Specify Timeout value
302 * @retval HAL status
303 */
304 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
305 {
306 /* Process Locked */
307 __HAL_LOCK(hcryp);
308
309 /* Change the CRYP state */
310 hcryp->State = HAL_CRYP_STATE_BUSY;
311
312 /* Check if initialization phase has already been performed */
313 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
314 {
315 /* Set the key */
316 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
317
318 /* Set the CRYP peripheral in AES ECB mode */
319 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB);
320
321 /* Flush FIFO */
322 __HAL_CRYP_FIFO_FLUSH();
323
324 /* Enable CRYP */
325 __HAL_CRYP_ENABLE();
326
327 /* Set the phase */
328 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
329 }
330
331 /* Write Plain Data and Get Cypher Data */
332 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
333 {
334 return HAL_TIMEOUT;
335 }
336
337 /* Change the CRYP state */
338 hcryp->State = HAL_CRYP_STATE_READY;
339
340 /* Process Unlocked */
341 __HAL_UNLOCK(hcryp);
342
343 /* Return function status */
344 return HAL_OK;
345 }
346
347 /**
348 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
349 * then encrypt pPlainData. The cypher data are available in pCypherData
350 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
351 * the configuration information for CRYP module
352 * @param pPlainData: Pointer to the plaintext buffer
353 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
354 * @param pCypherData: Pointer to the cyphertext buffer
355 * @param Timeout: Specify Timeout value
356 * @retval HAL status
357 */
358 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
359 {
360 /* Process Locked */
361 __HAL_LOCK(hcryp);
362
363 /* Change the CRYP state */
364 hcryp->State = HAL_CRYP_STATE_BUSY;
365
366 /* Check if initialization phase has already been performed */
367 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
368 {
369 /* Set the key */
370 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
371
372 /* Set the CRYP peripheral in AES ECB mode */
373 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC);
374
375 /* Set the Initialization Vector */
376 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
377
378 /* Flush FIFO */
379 __HAL_CRYP_FIFO_FLUSH();
380
381 /* Enable CRYP */
382 __HAL_CRYP_ENABLE();
383
384 /* Set the phase */
385 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
386 }
387
388 /* Write Plain Data and Get Cypher Data */
389 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
390 {
391 return HAL_TIMEOUT;
392 }
393
394 /* Change the CRYP state */
395 hcryp->State = HAL_CRYP_STATE_READY;
396
397 /* Process Unlocked */
398 __HAL_UNLOCK(hcryp);
399
400 /* Return function status */
401 return HAL_OK;
402 }
403
404 /**
405 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
406 * then encrypt pPlainData. The cypher data are available in pCypherData
407 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
408 * the configuration information for CRYP module
409 * @param pPlainData: Pointer to the plaintext buffer
410 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
411 * @param pCypherData: Pointer to the cyphertext buffer
412 * @param Timeout: Specify Timeout value
413 * @retval HAL status
414 */
415 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
416 {
417 /* Process Locked */
418 __HAL_LOCK(hcryp);
419
420 /* Change the CRYP state */
421 hcryp->State = HAL_CRYP_STATE_BUSY;
422
423 /* Check if initialization phase has already been performed */
424 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
425 {
426 /* Set the key */
427 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
428
429 /* Set the CRYP peripheral in AES ECB mode */
430 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR);
431
432 /* Set the Initialization Vector */
433 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
434
435 /* Flush FIFO */
436 __HAL_CRYP_FIFO_FLUSH();
437
438 /* Enable CRYP */
439 __HAL_CRYP_ENABLE();
440
441 /* Set the phase */
442 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
443 }
444
445 /* Write Plain Data and Get Cypher Data */
446 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
447 {
448 return HAL_TIMEOUT;
449 }
450
451 /* Change the CRYP state */
452 hcryp->State = HAL_CRYP_STATE_READY;
453
454 /* Process Unlocked */
455 __HAL_UNLOCK(hcryp);
456
457 /* Return function status */
458 return HAL_OK;
459 }
460
461
462
463 /**
464 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
465 * then decrypted pCypherData. The cypher data are available in pPlainData
466 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
467 * the configuration information for CRYP module
468 * @param pCypherData: Pointer to the cyphertext buffer
469 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
470 * @param pPlainData: Pointer to the plaintext buffer
471 * @param Timeout: Specify Timeout value
472 * @retval HAL status
473 */
474 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
475 {
476 uint32_t tickstart = 0;
477
478 /* Process Locked */
479 __HAL_LOCK(hcryp);
480
481 /* Change the CRYP state */
482 hcryp->State = HAL_CRYP_STATE_BUSY;
483
484 /* Check if initialization phase has already been performed */
485 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
486 {
487 /* Set the key */
488 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
489
490 /* Set the CRYP peripheral in AES Key mode */
491 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
492
493 /* Enable CRYP */
494 __HAL_CRYP_ENABLE();
495
496 /* Get tick */
497 tickstart = HAL_GetTick();
498
499 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
500 {
501 /* Check for the Timeout */
502 if(Timeout != HAL_MAX_DELAY)
503 {
504 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
505 {
506 /* Change state */
507 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
508
509 /* Process Unlocked */
510 __HAL_UNLOCK(hcryp);
511
512 return HAL_TIMEOUT;
513 }
514 }
515 }
516
517 /* Disable CRYP */
518 __HAL_CRYP_DISABLE();
519
520 /* Reset the ALGOMODE bits*/
521 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
522
523 /* Set the CRYP peripheral in AES ECB decryption mode */
524 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
525 /* Flush FIFO */
526 __HAL_CRYP_FIFO_FLUSH();
527
528 /* Enable CRYP */
529 __HAL_CRYP_ENABLE();
530
531 /* Set the phase */
532 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
533 }
534
535 /* Write Plain Data and Get Cypher Data */
536 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
537 {
538 return HAL_TIMEOUT;
539 }
540
541 /* Change the CRYP state */
542 hcryp->State = HAL_CRYP_STATE_READY;
543
544 /* Process Unlocked */
545 __HAL_UNLOCK(hcryp);
546
547 /* Return function status */
548 return HAL_OK;
549 }
550
551 /**
552 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
553 * then decrypted pCypherData. The cypher data are available in pPlainData
554 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
555 * the configuration information for CRYP module
556 * @param pCypherData: Pointer to the cyphertext buffer
557 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
558 * @param pPlainData: Pointer to the plaintext buffer
559 * @param Timeout: Specify Timeout value
560 * @retval HAL status
561 */
562 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
563 {
564 uint32_t tickstart = 0;
565
566 /* Process Locked */
567 __HAL_LOCK(hcryp);
568
569 /* Change the CRYP state */
570 hcryp->State = HAL_CRYP_STATE_BUSY;
571
572 /* Check if initialization phase has already been performed */
573 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
574 {
575 /* Set the key */
576 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
577
578 /* Set the CRYP peripheral in AES Key mode */
579 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
580
581 /* Enable CRYP */
582 __HAL_CRYP_ENABLE();
583
584 /* Get tick */
585 tickstart = HAL_GetTick();
586
587 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
588 {
589 /* Check for the Timeout */
590 if(Timeout != HAL_MAX_DELAY)
591 {
592 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
593 {
594 /* Change state */
595 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
596
597 /* Process Unlocked */
598 __HAL_UNLOCK(hcryp);
599
600 return HAL_TIMEOUT;
601 }
602 }
603 }
604
605 /* Reset the ALGOMODE bits*/
606 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
607
608 /* Set the CRYP peripheral in AES CBC decryption mode */
609 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
610
611 /* Set the Initialization Vector */
612 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
613
614 /* Flush FIFO */
615 __HAL_CRYP_FIFO_FLUSH();
616
617 /* Enable CRYP */
618 __HAL_CRYP_ENABLE();
619
620 /* Set the phase */
621 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
622 }
623
624 /* Write Plain Data and Get Cypher Data */
625 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
626 {
627 return HAL_TIMEOUT;
628 }
629
630 /* Change the CRYP state */
631 hcryp->State = HAL_CRYP_STATE_READY;
632
633 /* Process Unlocked */
634 __HAL_UNLOCK(hcryp);
635
636 /* Return function status */
637 return HAL_OK;
638 }
639
640 /**
641 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
642 * then decrypted pCypherData. The cypher data are available in pPlainData
643 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
644 * the configuration information for CRYP module
645 * @param pCypherData: Pointer to the cyphertext buffer
646 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
647 * @param pPlainData: Pointer to the plaintext buffer
648 * @param Timeout: Specify Timeout value
649 * @retval HAL status
650 */
651 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
652 {
653 /* Process Locked */
654 __HAL_LOCK(hcryp);
655
656 /* Check if initialization phase has already been performed */
657 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
658 {
659 /* Change the CRYP state */
660 hcryp->State = HAL_CRYP_STATE_BUSY;
661
662 /* Set the key */
663 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
664
665 /* Set the CRYP peripheral in AES CTR mode */
666 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
667
668 /* Set the Initialization Vector */
669 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
670
671 /* Flush FIFO */
672 __HAL_CRYP_FIFO_FLUSH();
673
674 /* Enable CRYP */
675 __HAL_CRYP_ENABLE();
676
677 /* Set the phase */
678 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
679 }
680
681 /* Write Plain Data and Get Cypher Data */
682 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
683 {
684 return HAL_TIMEOUT;
685 }
686
687 /* Change the CRYP state */
688 hcryp->State = HAL_CRYP_STATE_READY;
689
690 /* Process Unlocked */
691 __HAL_UNLOCK(hcryp);
692
693 /* Return function status */
694 return HAL_OK;
695 }
696
697 /**
698 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
699 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
700 * the configuration information for CRYP module
701 * @param pPlainData: Pointer to the plaintext buffer
702 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
703 * @param pCypherData: Pointer to the cyphertext buffer
704 * @retval HAL status
705 */
706 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
707 {
708 uint32_t inputaddr;
709 uint32_t outputaddr;
710
711 if(hcryp->State == HAL_CRYP_STATE_READY)
712 {
713 /* Process Locked */
714 __HAL_LOCK(hcryp);
715
716 hcryp->CrypInCount = Size;
717 hcryp->pCrypInBuffPtr = pPlainData;
718 hcryp->pCrypOutBuffPtr = pCypherData;
719 hcryp->CrypOutCount = Size;
720
721 /* Change the CRYP state */
722 hcryp->State = HAL_CRYP_STATE_BUSY;
723
724 /* Check if initialization phase has already been performed */
725 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
726 {
727 /* Set the key */
728 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
729
730 /* Set the CRYP peripheral in AES ECB mode */
731 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB);
732
733 /* Flush FIFO */
734 __HAL_CRYP_FIFO_FLUSH();
735
736 /* Set the phase */
737 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
738 }
739
740 /* Enable Interrupts */
741 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
742
743 /* Enable CRYP */
744 __HAL_CRYP_ENABLE();
745
746 /* Return function status */
747 return HAL_OK;
748 }
749 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
750 {
751 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
752 /* Write the Input block in the IN FIFO */
753 CRYP->DR = *(uint32_t*)(inputaddr);
754 inputaddr+=4;
755 CRYP->DR = *(uint32_t*)(inputaddr);
756 inputaddr+=4;
757 CRYP->DR = *(uint32_t*)(inputaddr);
758 inputaddr+=4;
759 CRYP->DR = *(uint32_t*)(inputaddr);
760 hcryp->pCrypInBuffPtr += 16;
761 hcryp->CrypInCount -= 16;
762 if(hcryp->CrypInCount == 0)
763 {
764 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
765 /* Call the Input data transfer complete callback */
766 HAL_CRYP_InCpltCallback(hcryp);
767 }
768 }
769 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
770 {
771 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
772 /* Read the Output block from the Output FIFO */
773 *(uint32_t*)(outputaddr) = CRYP->DOUT;
774 outputaddr+=4;
775 *(uint32_t*)(outputaddr) = CRYP->DOUT;
776 outputaddr+=4;
777 *(uint32_t*)(outputaddr) = CRYP->DOUT;
778 outputaddr+=4;
779 *(uint32_t*)(outputaddr) = CRYP->DOUT;
780 hcryp->pCrypOutBuffPtr += 16;
781 hcryp->CrypOutCount -= 16;
782 if(hcryp->CrypOutCount == 0)
783 {
784 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
785 /* Process Locked */
786 __HAL_UNLOCK(hcryp);
787 /* Change the CRYP state */
788 hcryp->State = HAL_CRYP_STATE_READY;
789 /* Call Input transfer complete callback */
790 HAL_CRYP_OutCpltCallback(hcryp);
791 }
792 }
793
794 /* Return function status */
795 return HAL_OK;
796 }
797
798 /**
799 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
800 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
801 * the configuration information for CRYP module
802 * @param pPlainData: Pointer to the plaintext buffer
803 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
804 * @param pCypherData: Pointer to the cyphertext buffer
805 * @retval HAL status
806 */
807 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
808 {
809 uint32_t inputaddr;
810 uint32_t outputaddr;
811
812 if(hcryp->State == HAL_CRYP_STATE_READY)
813 {
814 /* Process Locked */
815 __HAL_LOCK(hcryp);
816
817 hcryp->CrypInCount = Size;
818 hcryp->pCrypInBuffPtr = pPlainData;
819 hcryp->pCrypOutBuffPtr = pCypherData;
820 hcryp->CrypOutCount = Size;
821
822 /* Change the CRYP state */
823 hcryp->State = HAL_CRYP_STATE_BUSY;
824
825 /* Check if initialization phase has already been performed */
826 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
827 {
828 /* Set the key */
829 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
830
831 /* Set the CRYP peripheral in AES CBC mode */
832 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC);
833
834 /* Set the Initialization Vector */
835 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
836
837 /* Flush FIFO */
838 __HAL_CRYP_FIFO_FLUSH();
839
840 /* Set the phase */
841 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
842 }
843 /* Enable Interrupts */
844 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
845
846 /* Enable CRYP */
847 __HAL_CRYP_ENABLE();
848
849 /* Return function status */
850 return HAL_OK;
851 }
852 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
853 {
854 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
855 /* Write the Input block in the IN FIFO */
856 CRYP->DR = *(uint32_t*)(inputaddr);
857 inputaddr+=4;
858 CRYP->DR = *(uint32_t*)(inputaddr);
859 inputaddr+=4;
860 CRYP->DR = *(uint32_t*)(inputaddr);
861 inputaddr+=4;
862 CRYP->DR = *(uint32_t*)(inputaddr);
863 hcryp->pCrypInBuffPtr += 16;
864 hcryp->CrypInCount -= 16;
865 if(hcryp->CrypInCount == 0)
866 {
867 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
868 /* Call the Input data transfer complete callback */
869 HAL_CRYP_InCpltCallback(hcryp);
870 }
871 }
872 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
873 {
874 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
875 /* Read the Output block from the Output FIFO */
876 *(uint32_t*)(outputaddr) = CRYP->DOUT;
877 outputaddr+=4;
878 *(uint32_t*)(outputaddr) = CRYP->DOUT;
879 outputaddr+=4;
880 *(uint32_t*)(outputaddr) = CRYP->DOUT;
881 outputaddr+=4;
882 *(uint32_t*)(outputaddr) = CRYP->DOUT;
883 hcryp->pCrypOutBuffPtr += 16;
884 hcryp->CrypOutCount -= 16;
885 if(hcryp->CrypOutCount == 0)
886 {
887 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
888 /* Process Locked */
889 __HAL_UNLOCK(hcryp);
890 /* Change the CRYP state */
891 hcryp->State = HAL_CRYP_STATE_READY;
892 /* Call Input transfer complete callback */
893 HAL_CRYP_OutCpltCallback(hcryp);
894 }
895 }
896
897 /* Return function status */
898 return HAL_OK;
899 }
900
901 /**
902 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
903 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
904 * the configuration information for CRYP module
905 * @param pPlainData: Pointer to the plaintext buffer
906 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
907 * @param pCypherData: Pointer to the cyphertext buffer
908 * @retval HAL status
909 */
910 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
911 {
912 uint32_t inputaddr;
913 uint32_t outputaddr;
914
915 if(hcryp->State == HAL_CRYP_STATE_READY)
916 {
917 /* Process Locked */
918 __HAL_LOCK(hcryp);
919
920 hcryp->CrypInCount = Size;
921 hcryp->pCrypInBuffPtr = pPlainData;
922 hcryp->pCrypOutBuffPtr = pCypherData;
923 hcryp->CrypOutCount = Size;
924
925 /* Change the CRYP state */
926 hcryp->State = HAL_CRYP_STATE_BUSY;
927
928 /* Check if initialization phase has already been performed */
929 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
930 {
931 /* Set the key */
932 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
933
934 /* Set the CRYP peripheral in AES CTR mode */
935 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR);
936
937 /* Set the Initialization Vector */
938 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
939
940 /* Flush FIFO */
941 __HAL_CRYP_FIFO_FLUSH();
942
943 /* Set the phase */
944 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
945 }
946 /* Enable Interrupts */
947 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
948
949 /* Enable CRYP */
950 __HAL_CRYP_ENABLE();
951
952 /* Return function status */
953 return HAL_OK;
954 }
955 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
956 {
957 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
958 /* Write the Input block in the IN FIFO */
959 CRYP->DR = *(uint32_t*)(inputaddr);
960 inputaddr+=4;
961 CRYP->DR = *(uint32_t*)(inputaddr);
962 inputaddr+=4;
963 CRYP->DR = *(uint32_t*)(inputaddr);
964 inputaddr+=4;
965 CRYP->DR = *(uint32_t*)(inputaddr);
966 hcryp->pCrypInBuffPtr += 16;
967 hcryp->CrypInCount -= 16;
968 if(hcryp->CrypInCount == 0)
969 {
970 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
971 /* Call the Input data transfer complete callback */
972 HAL_CRYP_InCpltCallback(hcryp);
973 }
974 }
975 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
976 {
977 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
978 /* Read the Output block from the Output FIFO */
979 *(uint32_t*)(outputaddr) = CRYP->DOUT;
980 outputaddr+=4;
981 *(uint32_t*)(outputaddr) = CRYP->DOUT;
982 outputaddr+=4;
983 *(uint32_t*)(outputaddr) = CRYP->DOUT;
984 outputaddr+=4;
985 *(uint32_t*)(outputaddr) = CRYP->DOUT;
986 hcryp->pCrypOutBuffPtr += 16;
987 hcryp->CrypOutCount -= 16;
988 if(hcryp->CrypOutCount == 0)
989 {
990 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
991 /* Process Unlocked */
992 __HAL_UNLOCK(hcryp);
993 /* Change the CRYP state */
994 hcryp->State = HAL_CRYP_STATE_READY;
995 /* Call Input transfer complete callback */
996 HAL_CRYP_OutCpltCallback(hcryp);
997 }
998 }
999
1000 /* Return function status */
1001 return HAL_OK;
1002 }
1003
1004
1005 /**
1006 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1007 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1008 * the configuration information for CRYP module
1009 * @param pCypherData: Pointer to the cyphertext buffer
1010 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1011 * @param pPlainData: Pointer to the plaintext buffer
1012 * @retval HAL status
1013 */
1014 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1015 {
1016 uint32_t tickstart = 0;
1017
1018 uint32_t inputaddr;
1019 uint32_t outputaddr;
1020
1021 if(hcryp->State == HAL_CRYP_STATE_READY)
1022 {
1023 /* Process Locked */
1024 __HAL_LOCK(hcryp);
1025
1026 hcryp->CrypInCount = Size;
1027 hcryp->pCrypInBuffPtr = pCypherData;
1028 hcryp->pCrypOutBuffPtr = pPlainData;
1029 hcryp->CrypOutCount = Size;
1030
1031 /* Change the CRYP state */
1032 hcryp->State = HAL_CRYP_STATE_BUSY;
1033
1034 /* Check if initialization phase has already been performed */
1035 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1036 {
1037 /* Set the key */
1038 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1039
1040 /* Set the CRYP peripheral in AES Key mode */
1041 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1042 /* Enable CRYP */
1043 __HAL_CRYP_ENABLE();
1044
1045 /* Get tick */
1046 tickstart = HAL_GetTick();
1047
1048 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1049 {
1050 /* Check for the Timeout */
1051 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1052 {
1053 /* Change state */
1054 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1055
1056 /* Process Unlocked */
1057 __HAL_UNLOCK(hcryp);
1058
1059 return HAL_TIMEOUT;
1060 }
1061 }
1062
1063 /* Reset the ALGOMODE bits*/
1064 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1065
1066 /* Set the CRYP peripheral in AES ECB decryption mode */
1067 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
1068
1069 /* Flush FIFO */
1070 __HAL_CRYP_FIFO_FLUSH();
1071
1072 /* Set the phase */
1073 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1074 }
1075
1076 /* Enable Interrupts */
1077 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1078
1079 /* Enable CRYP */
1080 __HAL_CRYP_ENABLE();
1081
1082 /* Return function status */
1083 return HAL_OK;
1084 }
1085 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1086 {
1087 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1088 /* Write the Input block in the IN FIFO */
1089 CRYP->DR = *(uint32_t*)(inputaddr);
1090 inputaddr+=4;
1091 CRYP->DR = *(uint32_t*)(inputaddr);
1092 inputaddr+=4;
1093 CRYP->DR = *(uint32_t*)(inputaddr);
1094 inputaddr+=4;
1095 CRYP->DR = *(uint32_t*)(inputaddr);
1096 hcryp->pCrypInBuffPtr += 16;
1097 hcryp->CrypInCount -= 16;
1098 if(hcryp->CrypInCount == 0)
1099 {
1100 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1101 /* Call the Input data transfer complete callback */
1102 HAL_CRYP_InCpltCallback(hcryp);
1103 }
1104 }
1105 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1106 {
1107 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1108 /* Read the Output block from the Output FIFO */
1109 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1110 outputaddr+=4;
1111 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1112 outputaddr+=4;
1113 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1114 outputaddr+=4;
1115 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1116 hcryp->pCrypOutBuffPtr += 16;
1117 hcryp->CrypOutCount -= 16;
1118 if(hcryp->CrypOutCount == 0)
1119 {
1120 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1121 /* Process Unlocked */
1122 __HAL_UNLOCK(hcryp);
1123 /* Change the CRYP state */
1124 hcryp->State = HAL_CRYP_STATE_READY;
1125 /* Call Input transfer complete callback */
1126 HAL_CRYP_OutCpltCallback(hcryp);
1127 }
1128 }
1129
1130 /* Return function status */
1131 return HAL_OK;
1132 }
1133
1134 /**
1135 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1136 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1137 * the configuration information for CRYP module
1138 * @param pCypherData: Pointer to the cyphertext buffer
1139 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1140 * @param pPlainData: Pointer to the plaintext buffer
1141 * @retval HAL status
1142 */
1143 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1144 {
1145
1146 uint32_t tickstart = 0;
1147 uint32_t inputaddr;
1148 uint32_t outputaddr;
1149
1150 if(hcryp->State == HAL_CRYP_STATE_READY)
1151 {
1152 /* Process Locked */
1153 __HAL_LOCK(hcryp);
1154
1155 /* Get the buffer addresses and sizes */
1156 hcryp->CrypInCount = Size;
1157 hcryp->pCrypInBuffPtr = pCypherData;
1158 hcryp->pCrypOutBuffPtr = pPlainData;
1159 hcryp->CrypOutCount = Size;
1160
1161 /* Change the CRYP state */
1162 hcryp->State = HAL_CRYP_STATE_BUSY;
1163
1164 /* Check if initialization phase has already been performed */
1165 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1166 {
1167 /* Set the key */
1168 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1169
1170 /* Set the CRYP peripheral in AES Key mode */
1171 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1172
1173 /* Enable CRYP */
1174 __HAL_CRYP_ENABLE();
1175
1176 /* Get tick */
1177 tickstart = HAL_GetTick();
1178
1179 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1180 {
1181 /* Check for the Timeout */
1182 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1183 {
1184 /* Change state */
1185 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1186
1187 /* Process Unlocked */
1188 __HAL_UNLOCK(hcryp);
1189
1190 return HAL_TIMEOUT;
1191 }
1192 }
1193
1194 /* Reset the ALGOMODE bits*/
1195 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1196
1197 /* Set the CRYP peripheral in AES CBC decryption mode */
1198 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1199
1200 /* Set the Initialization Vector */
1201 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1202
1203 /* Flush FIFO */
1204 __HAL_CRYP_FIFO_FLUSH();
1205
1206 /* Enable CRYP */
1207 __HAL_CRYP_ENABLE();
1208
1209 /* Set the phase */
1210 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1211 }
1212
1213 /* Enable Interrupts */
1214 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1215
1216 /* Enable CRYP */
1217 __HAL_CRYP_ENABLE();
1218
1219 /* Return function status */
1220 return HAL_OK;
1221 }
1222 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1223 {
1224 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1225 /* Write the Input block in the IN FIFO */
1226 CRYP->DR = *(uint32_t*)(inputaddr);
1227 inputaddr+=4;
1228 CRYP->DR = *(uint32_t*)(inputaddr);
1229 inputaddr+=4;
1230 CRYP->DR = *(uint32_t*)(inputaddr);
1231 inputaddr+=4;
1232 CRYP->DR = *(uint32_t*)(inputaddr);
1233 hcryp->pCrypInBuffPtr += 16;
1234 hcryp->CrypInCount -= 16;
1235 if(hcryp->CrypInCount == 0)
1236 {
1237 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1238 /* Call the Input data transfer complete callback */
1239 HAL_CRYP_InCpltCallback(hcryp);
1240 }
1241 }
1242 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1243 {
1244 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1245 /* Read the Output block from the Output FIFO */
1246 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1247 outputaddr+=4;
1248 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1249 outputaddr+=4;
1250 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1251 outputaddr+=4;
1252 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1253 hcryp->pCrypOutBuffPtr += 16;
1254 hcryp->CrypOutCount -= 16;
1255 if(hcryp->CrypOutCount == 0)
1256 {
1257 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1258 /* Process Unlocked */
1259 __HAL_UNLOCK(hcryp);
1260 /* Change the CRYP state */
1261 hcryp->State = HAL_CRYP_STATE_READY;
1262 /* Call Input transfer complete callback */
1263 HAL_CRYP_OutCpltCallback(hcryp);
1264 }
1265 }
1266
1267 /* Return function status */
1268 return HAL_OK;
1269 }
1270
1271 /**
1272 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1273 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1274 * the configuration information for CRYP module
1275 * @param pCypherData: Pointer to the cyphertext buffer
1276 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1277 * @param pPlainData: Pointer to the plaintext buffer
1278 * @retval HAL status
1279 */
1280 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1281 {
1282 uint32_t inputaddr;
1283 uint32_t outputaddr;
1284
1285 if(hcryp->State == HAL_CRYP_STATE_READY)
1286 {
1287 /* Process Locked */
1288 __HAL_LOCK(hcryp);
1289
1290 /* Get the buffer addresses and sizes */
1291 hcryp->CrypInCount = Size;
1292 hcryp->pCrypInBuffPtr = pCypherData;
1293 hcryp->pCrypOutBuffPtr = pPlainData;
1294 hcryp->CrypOutCount = Size;
1295
1296 /* Change the CRYP state */
1297 hcryp->State = HAL_CRYP_STATE_BUSY;
1298
1299 /* Check if initialization phase has already been performed */
1300 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1301 {
1302 /* Set the key */
1303 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1304
1305 /* Set the CRYP peripheral in AES CTR mode */
1306 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1307
1308 /* Set the Initialization Vector */
1309 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1310
1311 /* Flush FIFO */
1312 __HAL_CRYP_FIFO_FLUSH();
1313
1314 /* Set the phase */
1315 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1316 }
1317
1318 /* Enable Interrupts */
1319 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1320
1321 /* Enable CRYP */
1322 __HAL_CRYP_ENABLE();
1323
1324 /* Return function status */
1325 return HAL_OK;
1326 }
1327 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1328 {
1329 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1330 /* Write the Input block in the IN FIFO */
1331 CRYP->DR = *(uint32_t*)(inputaddr);
1332 inputaddr+=4;
1333 CRYP->DR = *(uint32_t*)(inputaddr);
1334 inputaddr+=4;
1335 CRYP->DR = *(uint32_t*)(inputaddr);
1336 inputaddr+=4;
1337 CRYP->DR = *(uint32_t*)(inputaddr);
1338 hcryp->pCrypInBuffPtr += 16;
1339 hcryp->CrypInCount -= 16;
1340 if(hcryp->CrypInCount == 0)
1341 {
1342 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1343 /* Call the Input data transfer complete callback */
1344 HAL_CRYP_InCpltCallback(hcryp);
1345 }
1346 }
1347 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1348 {
1349 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1350 /* Read the Output block from the Output FIFO */
1351 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1352 outputaddr+=4;
1353 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1354 outputaddr+=4;
1355 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1356 outputaddr+=4;
1357 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1358 hcryp->pCrypOutBuffPtr += 16;
1359 hcryp->CrypOutCount -= 16;
1360 if(hcryp->CrypOutCount == 0)
1361 {
1362 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1363 /* Process Unlocked */
1364 __HAL_UNLOCK(hcryp);
1365 /* Change the CRYP state */
1366 hcryp->State = HAL_CRYP_STATE_READY;
1367 /* Call Input transfer complete callback */
1368 HAL_CRYP_OutCpltCallback(hcryp);
1369 }
1370 }
1371
1372 /* Return function status */
1373 return HAL_OK;
1374 }
1375
1376 /**
1377 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1378 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1379 * the configuration information for CRYP module
1380 * @param pPlainData: Pointer to the plaintext buffer
1381 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1382 * @param pCypherData: Pointer to the cyphertext buffer
1383 * @retval HAL status
1384 */
1385 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1386 {
1387 uint32_t inputaddr;
1388 uint32_t outputaddr;
1389
1390 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1391 {
1392 /* Process Locked */
1393 __HAL_LOCK(hcryp);
1394
1395 inputaddr = (uint32_t)pPlainData;
1396 outputaddr = (uint32_t)pCypherData;
1397
1398 /* Change the CRYP state */
1399 hcryp->State = HAL_CRYP_STATE_BUSY;
1400
1401 /* Check if initialization phase has already been performed */
1402 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1403 {
1404 /* Set the key */
1405 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1406
1407 /* Set the CRYP peripheral in AES ECB mode */
1408 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB);
1409
1410 /* Flush FIFO */
1411 __HAL_CRYP_FIFO_FLUSH();
1412
1413 /* Set the phase */
1414 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1415 }
1416 /* Set the input and output addresses and start DMA transfer */
1417 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1418
1419 /* Process Unlocked */
1420 __HAL_UNLOCK(hcryp);
1421
1422 /* Return function status */
1423 return HAL_OK;
1424 }
1425 else
1426 {
1427 return HAL_ERROR;
1428 }
1429 }
1430
1431 /**
1432 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1433 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1434 * the configuration information for CRYP module
1435 * @param pPlainData: Pointer to the plaintext buffer
1436 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1437 * @param pCypherData: Pointer to the cyphertext buffer
1438 * @retval HAL status
1439 */
1440 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1441 {
1442 uint32_t inputaddr;
1443 uint32_t outputaddr;
1444
1445 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1446 {
1447 /* Process Locked */
1448 __HAL_LOCK(hcryp);
1449
1450 inputaddr = (uint32_t)pPlainData;
1451 outputaddr = (uint32_t)pCypherData;
1452
1453 /* Change the CRYP state */
1454 hcryp->State = HAL_CRYP_STATE_BUSY;
1455
1456 /* Check if initialization phase has already been performed */
1457 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1458 {
1459 /* Set the key */
1460 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1461
1462 /* Set the CRYP peripheral in AES ECB mode */
1463 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC);
1464
1465 /* Set the Initialization Vector */
1466 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1467
1468 /* Flush FIFO */
1469 __HAL_CRYP_FIFO_FLUSH();
1470
1471 /* Set the phase */
1472 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1473 }
1474 /* Set the input and output addresses and start DMA transfer */
1475 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1476
1477 /* Process Unlocked */
1478 __HAL_UNLOCK(hcryp);
1479
1480 /* Return function status */
1481 return HAL_OK;
1482 }
1483 else
1484 {
1485 return HAL_ERROR;
1486 }
1487 }
1488
1489 /**
1490 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1491 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1492 * the configuration information for CRYP module
1493 * @param pPlainData: Pointer to the plaintext buffer
1494 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1495 * @param pCypherData: Pointer to the cyphertext buffer
1496 * @retval HAL status
1497 */
1498 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1499 {
1500 uint32_t inputaddr;
1501 uint32_t outputaddr;
1502
1503 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1504 {
1505 /* Process Locked */
1506 __HAL_LOCK(hcryp);
1507
1508 inputaddr = (uint32_t)pPlainData;
1509 outputaddr = (uint32_t)pCypherData;
1510
1511 /* Change the CRYP state */
1512 hcryp->State = HAL_CRYP_STATE_BUSY;
1513
1514 /* Check if initialization phase has already been performed */
1515 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1516 {
1517 /* Set the key */
1518 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1519
1520 /* Set the CRYP peripheral in AES ECB mode */
1521 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR);
1522
1523 /* Set the Initialization Vector */
1524 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1525
1526 /* Flush FIFO */
1527 __HAL_CRYP_FIFO_FLUSH();
1528
1529 /* Set the phase */
1530 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1531 }
1532
1533 /* Set the input and output addresses and start DMA transfer */
1534 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1535
1536 /* Process Unlocked */
1537 __HAL_UNLOCK(hcryp);
1538
1539 /* Return function status */
1540 return HAL_OK;
1541 }
1542 else
1543 {
1544 return HAL_ERROR;
1545 }
1546 }
1547
1548 /**
1549 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
1550 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1551 * the configuration information for CRYP module
1552 * @param pCypherData: Pointer to the cyphertext buffer
1553 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1554 * @param pPlainData: Pointer to the plaintext buffer
1555 * @retval HAL status
1556 */
1557 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1558 {
1559 uint32_t tickstart = 0;
1560 uint32_t inputaddr;
1561 uint32_t outputaddr;
1562
1563 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1564 {
1565 /* Process Locked */
1566 __HAL_LOCK(hcryp);
1567
1568 inputaddr = (uint32_t)pCypherData;
1569 outputaddr = (uint32_t)pPlainData;
1570
1571 /* Change the CRYP state */
1572 hcryp->State = HAL_CRYP_STATE_BUSY;
1573
1574 /* Check if initialization phase has already been performed */
1575 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1576 {
1577 /* Set the key */
1578 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1579
1580 /* Set the CRYP peripheral in AES Key mode */
1581 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1582
1583 /* Enable CRYP */
1584 __HAL_CRYP_ENABLE();
1585
1586 /* Get tick */
1587 tickstart = HAL_GetTick();
1588
1589 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1590 {
1591 /* Check for the Timeout */
1592 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1593 {
1594 /* Change state */
1595 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1596
1597 /* Process Unlocked */
1598 __HAL_UNLOCK(hcryp);
1599
1600 return HAL_TIMEOUT;
1601 }
1602 }
1603
1604 /* Reset the ALGOMODE bits*/
1605 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1606
1607 /* Set the CRYP peripheral in AES ECB decryption mode */
1608 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
1609
1610 /* Flush FIFO */
1611 __HAL_CRYP_FIFO_FLUSH();
1612
1613 /* Set the phase */
1614 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1615 }
1616
1617 /* Set the input and output addresses and start DMA transfer */
1618 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1619
1620 /* Process Unlocked */
1621 __HAL_UNLOCK(hcryp);
1622
1623 /* Return function status */
1624 return HAL_OK;
1625 }
1626 else
1627 {
1628 return HAL_ERROR;
1629 }
1630 }
1631
1632 /**
1633 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1634 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1635 * the configuration information for CRYP module
1636 * @param pCypherData: Pointer to the cyphertext buffer
1637 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1638 * @param pPlainData: Pointer to the plaintext buffer
1639 * @retval HAL status
1640 */
1641 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1642 {
1643 uint32_t tickstart = 0;
1644 uint32_t inputaddr;
1645 uint32_t outputaddr;
1646
1647 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1648 {
1649 /* Process Locked */
1650 __HAL_LOCK(hcryp);
1651
1652 inputaddr = (uint32_t)pCypherData;
1653 outputaddr = (uint32_t)pPlainData;
1654
1655 /* Change the CRYP state */
1656 hcryp->State = HAL_CRYP_STATE_BUSY;
1657
1658 /* Check if initialization phase has already been performed */
1659 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1660 {
1661 /* Set the key */
1662 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1663
1664 /* Set the CRYP peripheral in AES Key mode */
1665 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1666
1667 /* Enable CRYP */
1668 __HAL_CRYP_ENABLE();
1669
1670 /* Get tick */
1671 tickstart = HAL_GetTick();
1672
1673 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1674 {
1675 /* Check for the Timeout */
1676 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1677 {
1678 /* Change state */
1679 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1680
1681 /* Process Unlocked */
1682 __HAL_UNLOCK(hcryp);
1683
1684 return HAL_TIMEOUT;
1685 }
1686 }
1687
1688 /* Reset the ALGOMODE bits*/
1689 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1690
1691 /* Set the CRYP peripheral in AES CBC decryption mode */
1692 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1693
1694 /* Set the Initialization Vector */
1695 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1696
1697 /* Flush FIFO */
1698 __HAL_CRYP_FIFO_FLUSH();
1699
1700 /* Set the phase */
1701 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1702 }
1703
1704 /* Set the input and output addresses and start DMA transfer */
1705 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1706
1707 /* Process Unlocked */
1708 __HAL_UNLOCK(hcryp);
1709
1710 /* Return function status */
1711 return HAL_OK;
1712 }
1713 else
1714 {
1715 return HAL_ERROR;
1716 }
1717 }
1718
1719 /**
1720 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
1721 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1722 * the configuration information for CRYP module
1723 * @param pCypherData: Pointer to the cyphertext buffer
1724 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1725 * @param pPlainData: Pointer to the plaintext buffer
1726 * @retval HAL status
1727 */
1728 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1729 {
1730 uint32_t inputaddr;
1731 uint32_t outputaddr;
1732
1733 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1734 {
1735 /* Process Locked */
1736 __HAL_LOCK(hcryp);
1737
1738 inputaddr = (uint32_t)pCypherData;
1739 outputaddr = (uint32_t)pPlainData;
1740
1741 /* Change the CRYP state */
1742 hcryp->State = HAL_CRYP_STATE_BUSY;
1743
1744 /* Check if initialization phase has already been performed */
1745 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1746 {
1747 /* Set the key */
1748 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1749
1750 /* Set the CRYP peripheral in AES CTR mode */
1751 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1752
1753 /* Set the Initialization Vector */
1754 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1755
1756 /* Flush FIFO */
1757 __HAL_CRYP_FIFO_FLUSH();
1758
1759 /* Set the phase */
1760 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1761 }
1762
1763 /* Set the input and output addresses and start DMA transfer */
1764 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1765
1766 /* Process Unlocked */
1767 __HAL_UNLOCK(hcryp);
1768
1769 /* Return function status */
1770 return HAL_OK;
1771 }
1772 else
1773 {
1774 return HAL_ERROR;
1775 }
1776 }
1777
1778
1779 /**
1780 * @}
1781 */
1782 /** @defgroup CRYP_Group3 DES processing functions
1783 * @brief processing functions.
1784 *
1785 @verbatim
1786 ==============================================================================
1787 ##### DES processing functions #####
1788 ==============================================================================
1789 [..] This section provides functions allowing to:
1790 (+) Encrypt plaintext using DES using ECB or CBC chaining modes
1791 (+) Decrypt cyphertext using ECB or CBC chaining modes
1792 [..] Three processing functions are available:
1793 (+) Polling mode
1794 (+) Interrupt mode
1795 (+) DMA mode
1796
1797 @endverbatim
1798 * @{
1799 */
1800
1801 /**
1802 * @brief Initializes the CRYP peripheral in DES ECB encryption mode.
1803 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1804 * the configuration information for CRYP module
1805 * @param pPlainData: Pointer to the plaintext buffer
1806 * @param Size: Length of the plaintext buffer, must be a multiple of 8
1807 * @param pCypherData: Pointer to the cyphertext buffer
1808 * @param Timeout: Specify Timeout value
1809 * @retval HAL status
1810 */
1811 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
1812 {
1813 /* Process Locked */
1814 __HAL_LOCK(hcryp);
1815
1816 /* Change the CRYP state */
1817 hcryp->State = HAL_CRYP_STATE_BUSY;
1818
1819 /* Set CRYP peripheral in DES ECB encryption mode */
1820 CRYP_SetDESECBMode(hcryp, 0);
1821
1822 /* Enable CRYP */
1823 __HAL_CRYP_ENABLE();
1824
1825 /* Write Plain Data and Get Cypher Data */
1826 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
1827 {
1828 return HAL_TIMEOUT;
1829 }
1830
1831 /* Change the CRYP state */
1832 hcryp->State = HAL_CRYP_STATE_READY;
1833
1834 /* Process Unlocked */
1835 __HAL_UNLOCK(hcryp);
1836
1837 /* Return function status */
1838 return HAL_OK;
1839 }
1840
1841 /**
1842 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
1843 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1844 * the configuration information for CRYP module
1845 * @param pPlainData: Pointer to the plaintext buffer
1846 * @param Size: Length of the plaintext buffer, must be a multiple of 8
1847 * @param pCypherData: Pointer to the cyphertext buffer
1848 * @param Timeout: Specify Timeout value
1849 * @retval HAL status
1850 */
1851 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
1852 {
1853 /* Process Locked */
1854 __HAL_LOCK(hcryp);
1855
1856 /* Change the CRYP state */
1857 hcryp->State = HAL_CRYP_STATE_BUSY;
1858
1859 /* Set CRYP peripheral in DES ECB decryption mode */
1860 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
1861
1862 /* Enable CRYP */
1863 __HAL_CRYP_ENABLE();
1864
1865 /* Write Plain Data and Get Cypher Data */
1866 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
1867 {
1868 return HAL_TIMEOUT;
1869 }
1870
1871 /* Change the CRYP state */
1872 hcryp->State = HAL_CRYP_STATE_READY;
1873
1874 /* Process Unlocked */
1875 __HAL_UNLOCK(hcryp);
1876
1877 /* Return function status */
1878 return HAL_OK;
1879 }
1880
1881 /**
1882 * @brief Initializes the CRYP peripheral in DES CBC encryption mode.
1883 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1884 * the configuration information for CRYP module
1885 * @param pPlainData: Pointer to the plaintext buffer
1886 * @param Size: Length of the plaintext buffer, must be a multiple of 8
1887 * @param pCypherData: Pointer to the cyphertext buffer
1888 * @param Timeout: Specify Timeout value
1889 * @retval HAL status
1890 */
1891 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
1892 {
1893 /* Process Locked */
1894 __HAL_LOCK(hcryp);
1895
1896 /* Change the CRYP state */
1897 hcryp->State = HAL_CRYP_STATE_BUSY;
1898
1899 /* Set CRYP peripheral in DES CBC encryption mode */
1900 CRYP_SetDESCBCMode(hcryp, 0);
1901
1902 /* Enable CRYP */
1903 __HAL_CRYP_ENABLE();
1904
1905 /* Write Plain Data and Get Cypher Data */
1906 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
1907 {
1908 return HAL_TIMEOUT;
1909 }
1910
1911 /* Change the CRYP state */
1912 hcryp->State = HAL_CRYP_STATE_READY;
1913
1914 /* Process Unlocked */
1915 __HAL_UNLOCK(hcryp);
1916
1917 /* Return function status */
1918 return HAL_OK;
1919 }
1920
1921 /**
1922 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
1923 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1924 * the configuration information for CRYP module
1925 * @param pPlainData: Pointer to the plaintext buffer
1926 * @param Size: Length of the plaintext buffer, must be a multiple of 8
1927 * @param pCypherData: Pointer to the cyphertext buffer
1928 * @param Timeout: Specify Timeout value
1929 * @retval HAL status
1930 */
1931 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
1932 {
1933 /* Process Locked */
1934 __HAL_LOCK(hcryp);
1935
1936 /* Change the CRYP state */
1937 hcryp->State = HAL_CRYP_STATE_BUSY;
1938
1939 /* Set CRYP peripheral in DES CBC decryption mode */
1940 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
1941
1942 /* Enable CRYP */
1943 __HAL_CRYP_ENABLE();
1944
1945 /* Write Plain Data and Get Cypher Data */
1946 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
1947 {
1948 return HAL_TIMEOUT;
1949 }
1950
1951 /* Change the CRYP state */
1952 hcryp->State = HAL_CRYP_STATE_READY;
1953
1954 /* Process Unlocked */
1955 __HAL_UNLOCK(hcryp);
1956
1957 /* Return function status */
1958 return HAL_OK;
1959 }
1960
1961 /**
1962 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using IT.
1963 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1964 * the configuration information for CRYP module
1965 * @param pPlainData: Pointer to the plaintext buffer
1966 * @param Size: Length of the plaintext buffer, must be a multiple of 8
1967 * @param pCypherData: Pointer to the cyphertext buffer
1968 * @retval HAL status
1969 */
1970 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1971 {
1972 uint32_t inputaddr;
1973 uint32_t outputaddr;
1974
1975 if(hcryp->State == HAL_CRYP_STATE_READY)
1976 {
1977 /* Process Locked */
1978 __HAL_LOCK(hcryp);
1979
1980 hcryp->CrypInCount = Size;
1981 hcryp->pCrypInBuffPtr = pPlainData;
1982 hcryp->pCrypOutBuffPtr = pCypherData;
1983 hcryp->CrypOutCount = Size;
1984
1985 /* Change the CRYP state */
1986 hcryp->State = HAL_CRYP_STATE_BUSY;
1987
1988 /* Set CRYP peripheral in DES ECB encryption mode */
1989 CRYP_SetDESECBMode(hcryp, 0);
1990
1991 /* Enable Interrupts */
1992 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1993
1994 /* Enable CRYP */
1995 __HAL_CRYP_ENABLE();
1996
1997 /* Return function status */
1998 return HAL_OK;
1999 }
2000 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2001 {
2002 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2003 /* Write the Input block in the IN FIFO */
2004 CRYP->DR = *(uint32_t*)(inputaddr);
2005 inputaddr+=4;
2006 CRYP->DR = *(uint32_t*)(inputaddr);
2007
2008 hcryp->pCrypInBuffPtr += 8;
2009 hcryp->CrypInCount -= 8;
2010 if(hcryp->CrypInCount == 0)
2011 {
2012 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2013 /* Call the Input data transfer complete callback */
2014 HAL_CRYP_InCpltCallback(hcryp);
2015 }
2016 }
2017 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2018 {
2019 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2020 /* Read the Output block from the Output FIFO */
2021 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2022 outputaddr+=4;
2023 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2024
2025 hcryp->pCrypOutBuffPtr += 8;
2026 hcryp->CrypOutCount -= 8;
2027 if(hcryp->CrypOutCount == 0)
2028 {
2029 /* Disable IT */
2030 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2031 /* Disable CRYP */
2032 __HAL_CRYP_DISABLE();
2033 /* Process Unlocked */
2034 __HAL_UNLOCK(hcryp);
2035 /* Change the CRYP state */
2036 hcryp->State = HAL_CRYP_STATE_READY;
2037 /* Call Input transfer complete callback */
2038 HAL_CRYP_OutCpltCallback(hcryp);
2039 }
2040 }
2041
2042 /* Return function status */
2043 return HAL_OK;
2044 }
2045
2046 /**
2047 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using interrupt.
2048 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2049 * the configuration information for CRYP module
2050 * @param pPlainData: Pointer to the plaintext buffer
2051 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2052 * @param pCypherData: Pointer to the cyphertext buffer
2053 * @retval HAL status
2054 */
2055 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2056 {
2057 uint32_t inputaddr;
2058 uint32_t outputaddr;
2059
2060 if(hcryp->State == HAL_CRYP_STATE_READY)
2061 {
2062 /* Process Locked */
2063 __HAL_LOCK(hcryp);
2064
2065 hcryp->CrypInCount = Size;
2066 hcryp->pCrypInBuffPtr = pPlainData;
2067 hcryp->pCrypOutBuffPtr = pCypherData;
2068 hcryp->CrypOutCount = Size;
2069
2070 /* Change the CRYP state */
2071 hcryp->State = HAL_CRYP_STATE_BUSY;
2072
2073 /* Set CRYP peripheral in DES CBC encryption mode */
2074 CRYP_SetDESCBCMode(hcryp, 0);
2075
2076 /* Enable Interrupts */
2077 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2078
2079 /* Enable CRYP */
2080 __HAL_CRYP_ENABLE();
2081
2082 /* Return function status */
2083 return HAL_OK;
2084 }
2085
2086 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2087 {
2088 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2089 /* Write the Input block in the IN FIFO */
2090 CRYP->DR = *(uint32_t*)(inputaddr);
2091 inputaddr+=4;
2092 CRYP->DR = *(uint32_t*)(inputaddr);
2093
2094 hcryp->pCrypInBuffPtr += 8;
2095 hcryp->CrypInCount -= 8;
2096 if(hcryp->CrypInCount == 0)
2097 {
2098 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2099 /* Call the Input data transfer complete callback */
2100 HAL_CRYP_InCpltCallback(hcryp);
2101 }
2102 }
2103 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2104 {
2105 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2106 /* Read the Output block from the Output FIFO */
2107 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2108 outputaddr+=4;
2109 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2110
2111 hcryp->pCrypOutBuffPtr += 8;
2112 hcryp->CrypOutCount -= 8;
2113 if(hcryp->CrypOutCount == 0)
2114 {
2115 /* Disable IT */
2116 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2117 /* Disable CRYP */
2118 __HAL_CRYP_DISABLE();
2119 /* Process Unlocked */
2120 __HAL_UNLOCK(hcryp);
2121 /* Change the CRYP state */
2122 hcryp->State = HAL_CRYP_STATE_READY;
2123 /* Call Input transfer complete callback */
2124 HAL_CRYP_OutCpltCallback(hcryp);
2125 }
2126 }
2127
2128 /* Return function status */
2129 return HAL_OK;
2130 }
2131
2132 /**
2133 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using IT.
2134 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2135 * the configuration information for CRYP module
2136 * @param pPlainData: Pointer to the plaintext buffer
2137 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2138 * @param pCypherData: Pointer to the cyphertext buffer
2139 * @retval HAL status
2140 */
2141 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2142 {
2143 uint32_t inputaddr;
2144 uint32_t outputaddr;
2145
2146 if(hcryp->State == HAL_CRYP_STATE_READY)
2147 {
2148 /* Process Locked */
2149 __HAL_LOCK(hcryp);
2150
2151 hcryp->CrypInCount = Size;
2152 hcryp->pCrypInBuffPtr = pCypherData;
2153 hcryp->pCrypOutBuffPtr = pPlainData;
2154 hcryp->CrypOutCount = Size;
2155
2156 /* Change the CRYP state */
2157 hcryp->State = HAL_CRYP_STATE_BUSY;
2158
2159 /* Set CRYP peripheral in DES ECB decryption mode */
2160 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2161
2162 /* Enable Interrupts */
2163 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2164
2165 /* Enable CRYP */
2166 __HAL_CRYP_ENABLE();
2167
2168 /* Return function status */
2169 return HAL_OK;
2170 }
2171 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2172 {
2173 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2174 /* Write the Input block in the IN FIFO */
2175 CRYP->DR = *(uint32_t*)(inputaddr);
2176 inputaddr+=4;
2177 CRYP->DR = *(uint32_t*)(inputaddr);
2178
2179 hcryp->pCrypInBuffPtr += 8;
2180 hcryp->CrypInCount -= 8;
2181 if(hcryp->CrypInCount == 0)
2182 {
2183 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2184 /* Call the Input data transfer complete callback */
2185 HAL_CRYP_InCpltCallback(hcryp);
2186 }
2187 }
2188 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2189 {
2190 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2191 /* Read the Output block from the Output FIFO */
2192 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2193 outputaddr+=4;
2194 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2195
2196 hcryp->pCrypOutBuffPtr += 8;
2197 hcryp->CrypOutCount -= 8;
2198 if(hcryp->CrypOutCount == 0)
2199 {
2200 /* Disable IT */
2201 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2202 /* Disable CRYP */
2203 __HAL_CRYP_DISABLE();
2204 /* Process Unlocked */
2205 __HAL_UNLOCK(hcryp);
2206 /* Change the CRYP state */
2207 hcryp->State = HAL_CRYP_STATE_READY;
2208 /* Call Input transfer complete callback */
2209 HAL_CRYP_OutCpltCallback(hcryp);
2210 }
2211 }
2212
2213 /* Return function status */
2214 return HAL_OK;
2215 }
2216
2217 /**
2218 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using interrupt.
2219 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2220 * the configuration information for CRYP module
2221 * @param pPlainData: Pointer to the plaintext buffer
2222 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2223 * @param pCypherData: Pointer to the cyphertext buffer
2224 * @retval HAL status
2225 */
2226 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2227 {
2228 uint32_t inputaddr;
2229 uint32_t outputaddr;
2230
2231 if(hcryp->State == HAL_CRYP_STATE_READY)
2232 {
2233 /* Process Locked */
2234 __HAL_LOCK(hcryp);
2235
2236 hcryp->CrypInCount = Size;
2237 hcryp->pCrypInBuffPtr = pCypherData;
2238 hcryp->pCrypOutBuffPtr = pPlainData;
2239 hcryp->CrypOutCount = Size;
2240
2241 /* Change the CRYP state */
2242 hcryp->State = HAL_CRYP_STATE_BUSY;
2243
2244 /* Set CRYP peripheral in DES CBC decryption mode */
2245 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2246
2247 /* Enable Interrupts */
2248 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2249
2250 /* Enable CRYP */
2251 __HAL_CRYP_ENABLE();
2252
2253 /* Return function status */
2254 return HAL_OK;
2255 }
2256 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2257 {
2258 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2259 /* Write the Input block in the IN FIFO */
2260 CRYP->DR = *(uint32_t*)(inputaddr);
2261 inputaddr+=4;
2262 CRYP->DR = *(uint32_t*)(inputaddr);
2263
2264 hcryp->pCrypInBuffPtr += 8;
2265 hcryp->CrypInCount -= 8;
2266 if(hcryp->CrypInCount == 0)
2267 {
2268 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2269 /* Call the Input data transfer complete callback */
2270 HAL_CRYP_InCpltCallback(hcryp);
2271 }
2272 }
2273 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2274 {
2275 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2276 /* Read the Output block from the Output FIFO */
2277 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2278 outputaddr+=4;
2279 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2280
2281 hcryp->pCrypOutBuffPtr += 8;
2282 hcryp->CrypOutCount -= 8;
2283 if(hcryp->CrypOutCount == 0)
2284 {
2285 /* Disable IT */
2286 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2287 /* Disable CRYP */
2288 __HAL_CRYP_DISABLE();
2289 /* Process Unlocked */
2290 __HAL_UNLOCK(hcryp);
2291 /* Change the CRYP state */
2292 hcryp->State = HAL_CRYP_STATE_READY;
2293 /* Call Input transfer complete callback */
2294 HAL_CRYP_OutCpltCallback(hcryp);
2295 }
2296 }
2297
2298 /* Return function status */
2299 return HAL_OK;
2300 }
2301
2302 /**
2303 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using DMA.
2304 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2305 * the configuration information for CRYP module
2306 * @param pPlainData: Pointer to the plaintext buffer
2307 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2308 * @param pCypherData: Pointer to the cyphertext buffer
2309 * @retval HAL status
2310 */
2311 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2312 {
2313 uint32_t inputaddr;
2314 uint32_t outputaddr;
2315
2316 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2317 {
2318 /* Process Locked */
2319 __HAL_LOCK(hcryp);
2320
2321 inputaddr = (uint32_t)pPlainData;
2322 outputaddr = (uint32_t)pCypherData;
2323
2324 /* Change the CRYP state */
2325 hcryp->State = HAL_CRYP_STATE_BUSY;
2326
2327 /* Set CRYP peripheral in DES ECB encryption mode */
2328 CRYP_SetDESECBMode(hcryp, 0);
2329
2330 /* Set the input and output addresses and start DMA transfer */
2331 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2332
2333 /* Process Unlocked */
2334 __HAL_UNLOCK(hcryp);
2335
2336 /* Return function status */
2337 return HAL_OK;
2338 }
2339 else
2340 {
2341 return HAL_ERROR;
2342 }
2343 }
2344
2345 /**
2346 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using DMA.
2347 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2348 * the configuration information for CRYP module
2349 * @param pPlainData: Pointer to the plaintext buffer
2350 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2351 * @param pCypherData: Pointer to the cyphertext buffer
2352 * @retval HAL status
2353 */
2354 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2355 {
2356 uint32_t inputaddr;
2357 uint32_t outputaddr;
2358
2359 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2360 {
2361 /* Process Locked */
2362 __HAL_LOCK(hcryp);
2363
2364 inputaddr = (uint32_t)pPlainData;
2365 outputaddr = (uint32_t)pCypherData;
2366
2367 /* Change the CRYP state */
2368 hcryp->State = HAL_CRYP_STATE_BUSY;
2369
2370 /* Set CRYP peripheral in DES CBC encryption mode */
2371 CRYP_SetDESCBCMode(hcryp, 0);
2372
2373 /* Set the input and output addresses and start DMA transfer */
2374 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2375
2376 /* Process Unlocked */
2377 __HAL_UNLOCK(hcryp);
2378
2379 /* Return function status */
2380 return HAL_OK;
2381 }
2382 else
2383 {
2384 return HAL_ERROR;
2385 }
2386 }
2387
2388 /**
2389 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2390 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2391 * the configuration information for CRYP module
2392 * @param pPlainData: Pointer to the plaintext buffer
2393 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2394 * @param pCypherData: Pointer to the cyphertext buffer
2395 * @retval HAL status
2396 */
2397 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2398 {
2399 uint32_t inputaddr;
2400 uint32_t outputaddr;
2401
2402 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2403 {
2404 /* Process Locked */
2405 __HAL_LOCK(hcryp);
2406
2407 inputaddr = (uint32_t)pCypherData;
2408 outputaddr = (uint32_t)pPlainData;
2409
2410 /* Change the CRYP state */
2411 hcryp->State = HAL_CRYP_STATE_BUSY;
2412
2413 /* Set CRYP peripheral in DES ECB decryption mode */
2414 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2415
2416 /* Set the input and output addresses and start DMA transfer */
2417 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2418
2419 /* Process Unlocked */
2420 __HAL_UNLOCK(hcryp);
2421
2422 /* Return function status */
2423 return HAL_OK;
2424 }
2425 else
2426 {
2427 return HAL_ERROR;
2428 }
2429 }
2430
2431 /**
2432 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2433 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2434 * the configuration information for CRYP module
2435 * @param pPlainData: Pointer to the plaintext buffer
2436 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2437 * @param pCypherData: Pointer to the cyphertext buffer
2438 * @retval HAL status
2439 */
2440 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2441 {
2442 uint32_t inputaddr;
2443 uint32_t outputaddr;
2444
2445 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2446 {
2447 /* Process Locked */
2448 __HAL_LOCK(hcryp);
2449
2450 inputaddr = (uint32_t)pCypherData;
2451 outputaddr = (uint32_t)pPlainData;
2452
2453 /* Change the CRYP state */
2454 hcryp->State = HAL_CRYP_STATE_BUSY;
2455
2456 /* Set CRYP peripheral in DES CBC decryption mode */
2457 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2458
2459 /* Set the input and output addresses and start DMA transfer */
2460 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2461
2462 /* Process Unlocked */
2463 __HAL_UNLOCK(hcryp);
2464
2465 /* Return function status */
2466 return HAL_OK;
2467 }
2468 else
2469 {
2470 return HAL_ERROR;
2471 }
2472 }
2473
2474 /**
2475 * @}
2476 */
2477
2478 /** @defgroup CRYP_Group4 TDES processing functions
2479 * @brief processing functions.
2480 *
2481 @verbatim
2482 ==============================================================================
2483 ##### TDES processing functions #####
2484 ==============================================================================
2485 [..] This section provides functions allowing to:
2486 (+) Encrypt plaintext using TDES based on ECB or CBC chaining modes
2487 (+) Decrypt cyphertext using TDES based on ECB or CBC chaining modes
2488 [..] Three processing functions are available:
2489 (+) Polling mode
2490 (+) Interrupt mode
2491 (+) DMA mode
2492
2493 @endverbatim
2494 * @{
2495 */
2496
2497 /**
2498 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode
2499 * then encrypt pPlainData. The cypher data are available in pCypherData
2500 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2501 * the configuration information for CRYP module
2502 * @param pPlainData: Pointer to the plaintext buffer
2503 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2504 * @param pCypherData: Pointer to the cyphertext buffer
2505 * @param Timeout: Specify Timeout value
2506 * @retval HAL status
2507 */
2508 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2509 {
2510 /* Process Locked */
2511 __HAL_LOCK(hcryp);
2512
2513 /* Change the CRYP state */
2514 hcryp->State = HAL_CRYP_STATE_BUSY;
2515
2516 /* Set CRYP peripheral in TDES ECB encryption mode */
2517 CRYP_SetTDESECBMode(hcryp, 0);
2518
2519 /* Enable CRYP */
2520 __HAL_CRYP_ENABLE();
2521
2522 /* Write Plain Data and Get Cypher Data */
2523 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2524 {
2525 return HAL_TIMEOUT;
2526 }
2527
2528 /* Change the CRYP state */
2529 hcryp->State = HAL_CRYP_STATE_READY;
2530
2531 /* Process Unlocked */
2532 __HAL_UNLOCK(hcryp);
2533
2534 /* Return function status */
2535 return HAL_OK;
2536 }
2537
2538 /**
2539 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode
2540 * then decrypted pCypherData. The cypher data are available in pPlainData
2541 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2542 * the configuration information for CRYP module
2543 * @param pPlainData: Pointer to the plaintext buffer
2544 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2545 * @param pCypherData: Pointer to the cyphertext buffer
2546 * @param Timeout: Specify Timeout value
2547 * @retval HAL status
2548 */
2549 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2550 {
2551 /* Process Locked */
2552 __HAL_LOCK(hcryp);
2553
2554 /* Change the CRYP state */
2555 hcryp->State = HAL_CRYP_STATE_BUSY;
2556
2557 /* Set CRYP peripheral in TDES ECB decryption mode */
2558 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
2559
2560 /* Enable CRYP */
2561 __HAL_CRYP_ENABLE();
2562
2563 /* Write Cypher Data and Get Plain Data */
2564 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
2565 {
2566 return HAL_TIMEOUT;
2567 }
2568
2569 /* Change the CRYP state */
2570 hcryp->State = HAL_CRYP_STATE_READY;
2571
2572 /* Process Unlocked */
2573 __HAL_UNLOCK(hcryp);
2574
2575 /* Return function status */
2576 return HAL_OK;
2577 }
2578
2579 /**
2580 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode
2581 * then encrypt pPlainData. The cypher data are available in pCypherData
2582 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2583 * the configuration information for CRYP module
2584 * @param pPlainData: Pointer to the plaintext buffer
2585 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2586 * @param pCypherData: Pointer to the cyphertext buffer
2587 * @param Timeout: Specify Timeout value
2588 * @retval HAL status
2589 */
2590 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2591 {
2592 /* Process Locked */
2593 __HAL_LOCK(hcryp);
2594
2595 /* Change the CRYP state */
2596 hcryp->State = HAL_CRYP_STATE_BUSY;
2597
2598 /* Set CRYP peripheral in TDES CBC encryption mode */
2599 CRYP_SetTDESCBCMode(hcryp, 0);
2600
2601 /* Enable CRYP */
2602 __HAL_CRYP_ENABLE();
2603
2604 /* Write Plain Data and Get Cypher Data */
2605 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2606 {
2607 return HAL_TIMEOUT;
2608 }
2609
2610 /* Change the CRYP state */
2611 hcryp->State = HAL_CRYP_STATE_READY;
2612
2613 /* Process Unlocked */
2614 __HAL_UNLOCK(hcryp);
2615
2616 /* Return function status */
2617 return HAL_OK;
2618 }
2619
2620 /**
2621 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode
2622 * then decrypted pCypherData. The cypher data are available in pPlainData
2623 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2624 * the configuration information for CRYP module
2625 * @param pCypherData: Pointer to the cyphertext buffer
2626 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2627 * @param pPlainData: Pointer to the plaintext buffer
2628 * @param Timeout: Specify Timeout value
2629 * @retval HAL status
2630 */
2631 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2632 {
2633 /* Process Locked */
2634 __HAL_LOCK(hcryp);
2635
2636 /* Change the CRYP state */
2637 hcryp->State = HAL_CRYP_STATE_BUSY;
2638
2639 /* Set CRYP peripheral in TDES CBC decryption mode */
2640 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2641
2642 /* Enable CRYP */
2643 __HAL_CRYP_ENABLE();
2644
2645 /* Write Cypher Data and Get Plain Data */
2646 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
2647 {
2648 return HAL_TIMEOUT;
2649 }
2650
2651 /* Change the CRYP state */
2652 hcryp->State = HAL_CRYP_STATE_READY;
2653
2654 /* Process Unlocked */
2655 __HAL_UNLOCK(hcryp);
2656
2657 /* Return function status */
2658 return HAL_OK;
2659 }
2660
2661 /**
2662 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using interrupt.
2663 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2664 * the configuration information for CRYP module
2665 * @param pPlainData: Pointer to the plaintext buffer
2666 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2667 * @param pCypherData: Pointer to the cyphertext buffer
2668 * @retval HAL status
2669 */
2670 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2671 {
2672 uint32_t inputaddr;
2673 uint32_t outputaddr;
2674
2675 if(hcryp->State == HAL_CRYP_STATE_READY)
2676 {
2677 /* Process Locked */
2678 __HAL_LOCK(hcryp);
2679
2680 hcryp->CrypInCount = Size;
2681 hcryp->pCrypInBuffPtr = pPlainData;
2682 hcryp->pCrypOutBuffPtr = pCypherData;
2683 hcryp->CrypOutCount = Size;
2684
2685 /* Change the CRYP state */
2686 hcryp->State = HAL_CRYP_STATE_BUSY;
2687
2688 /* Set CRYP peripheral in TDES ECB encryption mode */
2689 CRYP_SetTDESECBMode(hcryp, 0);
2690
2691 /* Enable Interrupts */
2692 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2693
2694 /* Enable CRYP */
2695 __HAL_CRYP_ENABLE();
2696
2697 /* Return function status */
2698 return HAL_OK;
2699 }
2700 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2701 {
2702 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2703 /* Write the Input block in the IN FIFO */
2704 CRYP->DR = *(uint32_t*)(inputaddr);
2705 inputaddr+=4;
2706 CRYP->DR = *(uint32_t*)(inputaddr);
2707
2708 hcryp->pCrypInBuffPtr += 8;
2709 hcryp->CrypInCount -= 8;
2710 if(hcryp->CrypInCount == 0)
2711 {
2712 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2713 /* Call the Input data transfer complete callback */
2714 HAL_CRYP_InCpltCallback(hcryp);
2715 }
2716 }
2717 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2718 {
2719 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2720 /* Read the Output block from the Output FIFO */
2721 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2722 outputaddr+=4;
2723 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2724
2725 hcryp->pCrypOutBuffPtr += 8;
2726 hcryp->CrypOutCount -= 8;
2727 if(hcryp->CrypOutCount == 0)
2728 {
2729 /* Disable IT */
2730 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2731 /* Disable CRYP */
2732 __HAL_CRYP_DISABLE();
2733 /* Process Unlocked */
2734 __HAL_UNLOCK(hcryp);
2735 /* Change the CRYP state */
2736 hcryp->State = HAL_CRYP_STATE_READY;
2737 /* Call the Output data transfer complete callback */
2738 HAL_CRYP_OutCpltCallback(hcryp);
2739 }
2740 }
2741
2742 /* Return function status */
2743 return HAL_OK;
2744 }
2745
2746 /**
2747 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode.
2748 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2749 * the configuration information for CRYP module
2750 * @param pPlainData: Pointer to the plaintext buffer
2751 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2752 * @param pCypherData: Pointer to the cyphertext buffer
2753 * @retval HAL status
2754 */
2755 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2756 {
2757 uint32_t inputaddr;
2758 uint32_t outputaddr;
2759
2760 if(hcryp->State == HAL_CRYP_STATE_READY)
2761 {
2762 /* Process Locked */
2763 __HAL_LOCK(hcryp);
2764
2765 hcryp->CrypInCount = Size;
2766 hcryp->pCrypInBuffPtr = pPlainData;
2767 hcryp->pCrypOutBuffPtr = pCypherData;
2768 hcryp->CrypOutCount = Size;
2769
2770 /* Change the CRYP state */
2771 hcryp->State = HAL_CRYP_STATE_BUSY;
2772
2773 /* Set CRYP peripheral in TDES CBC encryption mode */
2774 CRYP_SetTDESCBCMode(hcryp, 0);
2775
2776 /* Enable Interrupts */
2777 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2778
2779 /* Enable CRYP */
2780 __HAL_CRYP_ENABLE();
2781
2782 /* Return function status */
2783 return HAL_OK;
2784 }
2785 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2786 {
2787 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2788 /* Write the Input block in the IN FIFO */
2789 CRYP->DR = *(uint32_t*)(inputaddr);
2790 inputaddr+=4;
2791 CRYP->DR = *(uint32_t*)(inputaddr);
2792
2793 hcryp->pCrypInBuffPtr += 8;
2794 hcryp->CrypInCount -= 8;
2795 if(hcryp->CrypInCount == 0)
2796 {
2797 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2798 /* Call the Input data transfer complete callback */
2799 HAL_CRYP_InCpltCallback(hcryp);
2800 }
2801 }
2802 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2803 {
2804 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2805 /* Read the Output block from the Output FIFO */
2806 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2807 outputaddr+=4;
2808 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2809
2810 hcryp->pCrypOutBuffPtr += 8;
2811 hcryp->CrypOutCount -= 8;
2812 if(hcryp->CrypOutCount == 0)
2813 {
2814 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2815 /* Disable CRYP */
2816 __HAL_CRYP_DISABLE();
2817 /* Process Unlocked */
2818 __HAL_UNLOCK(hcryp);
2819 /* Change the CRYP state */
2820 hcryp->State = HAL_CRYP_STATE_READY;
2821 /* Call Input transfer complete callback */
2822 HAL_CRYP_OutCpltCallback(hcryp);
2823 }
2824 }
2825
2826 /* Return function status */
2827 return HAL_OK;
2828 }
2829
2830 /**
2831 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode.
2832 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2833 * the configuration information for CRYP module
2834 * @param pPlainData: Pointer to the plaintext buffer
2835 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2836 * @param pCypherData: Pointer to the cyphertext buffer
2837 * @retval HAL status
2838 */
2839 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2840 {
2841 uint32_t inputaddr;
2842 uint32_t outputaddr;
2843
2844 if(hcryp->State == HAL_CRYP_STATE_READY)
2845 {
2846 /* Process Locked */
2847 __HAL_LOCK(hcryp);
2848
2849 hcryp->CrypInCount = Size;
2850 hcryp->pCrypInBuffPtr = pCypherData;
2851 hcryp->pCrypOutBuffPtr = pPlainData;
2852 hcryp->CrypOutCount = Size;
2853
2854 /* Change the CRYP state */
2855 hcryp->State = HAL_CRYP_STATE_BUSY;
2856
2857 /* Set CRYP peripheral in TDES ECB decryption mode */
2858 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
2859
2860 /* Enable Interrupts */
2861 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2862
2863 /* Enable CRYP */
2864 __HAL_CRYP_ENABLE();
2865
2866 /* Return function status */
2867 return HAL_OK;
2868 }
2869 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2870 {
2871 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2872 /* Write the Input block in the IN FIFO */
2873 CRYP->DR = *(uint32_t*)(inputaddr);
2874 inputaddr+=4;
2875 CRYP->DR = *(uint32_t*)(inputaddr);
2876
2877 hcryp->pCrypInBuffPtr += 8;
2878 hcryp->CrypInCount -= 8;
2879 if(hcryp->CrypInCount == 0)
2880 {
2881 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2882 /* Call the Input data transfer complete callback */
2883 HAL_CRYP_InCpltCallback(hcryp);
2884 }
2885 }
2886 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2887 {
2888 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2889 /* Read the Output block from the Output FIFO */
2890 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2891 outputaddr+=4;
2892 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2893
2894 hcryp->pCrypOutBuffPtr += 8;
2895 hcryp->CrypOutCount -= 8;
2896 if(hcryp->CrypOutCount == 0)
2897 {
2898 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2899 /* Disable CRYP */
2900 __HAL_CRYP_DISABLE();
2901 /* Process Unlocked */
2902 __HAL_UNLOCK(hcryp);
2903 /* Change the CRYP state */
2904 hcryp->State = HAL_CRYP_STATE_READY;
2905 /* Call Input transfer complete callback */
2906 HAL_CRYP_OutCpltCallback(hcryp);
2907 }
2908 }
2909
2910 /* Return function status */
2911 return HAL_OK;
2912 }
2913
2914 /**
2915 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode.
2916 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2917 * the configuration information for CRYP module
2918 * @param pCypherData: Pointer to the cyphertext buffer
2919 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2920 * @param pPlainData: Pointer to the plaintext buffer
2921 * @retval HAL status
2922 */
2923 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2924 {
2925 uint32_t inputaddr;
2926 uint32_t outputaddr;
2927
2928 if(hcryp->State == HAL_CRYP_STATE_READY)
2929 {
2930 /* Process Locked */
2931 __HAL_LOCK(hcryp);
2932
2933 hcryp->CrypInCount = Size;
2934 hcryp->pCrypInBuffPtr = pCypherData;
2935 hcryp->pCrypOutBuffPtr = pPlainData;
2936 hcryp->CrypOutCount = Size;
2937
2938 /* Change the CRYP state */
2939 hcryp->State = HAL_CRYP_STATE_BUSY;
2940
2941 /* Set CRYP peripheral in TDES CBC decryption mode */
2942 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2943
2944 /* Enable Interrupts */
2945 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2946
2947 /* Enable CRYP */
2948 __HAL_CRYP_ENABLE();
2949
2950 /* Return function status */
2951 return HAL_OK;
2952 }
2953 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2954 {
2955 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2956 /* Write the Input block in the IN FIFO */
2957 CRYP->DR = *(uint32_t*)(inputaddr);
2958 inputaddr+=4;
2959 CRYP->DR = *(uint32_t*)(inputaddr);
2960
2961 hcryp->pCrypInBuffPtr += 8;
2962 hcryp->CrypInCount -= 8;
2963 if(hcryp->CrypInCount == 0)
2964 {
2965 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2966 /* Call the Input data transfer complete callback */
2967 HAL_CRYP_InCpltCallback(hcryp);
2968 }
2969 }
2970 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2971 {
2972 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2973 /* Read the Output block from the Output FIFO */
2974 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2975 outputaddr+=4;
2976 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2977
2978 hcryp->pCrypOutBuffPtr += 8;
2979 hcryp->CrypOutCount -= 8;
2980 if(hcryp->CrypOutCount == 0)
2981 {
2982 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2983 /* Disable CRYP */
2984 __HAL_CRYP_DISABLE();
2985 /* Process Unlocked */
2986 __HAL_UNLOCK(hcryp);
2987 /* Change the CRYP state */
2988 hcryp->State = HAL_CRYP_STATE_READY;
2989 /* Call Input transfer complete callback */
2990 HAL_CRYP_OutCpltCallback(hcryp);
2991 }
2992 }
2993
2994 /* Return function status */
2995 return HAL_OK;
2996 }
2997
2998 /**
2999 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using DMA.
3000 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3001 * the configuration information for CRYP module
3002 * @param pPlainData: Pointer to the plaintext buffer
3003 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3004 * @param pCypherData: Pointer to the cyphertext buffer
3005 * @retval HAL status
3006 */
3007 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3008 {
3009 uint32_t inputaddr;
3010 uint32_t outputaddr;
3011
3012 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3013 {
3014 /* Process Locked */
3015 __HAL_LOCK(hcryp);
3016
3017 inputaddr = (uint32_t)pPlainData;
3018 outputaddr = (uint32_t)pCypherData;
3019
3020 /* Change the CRYP state */
3021 hcryp->State = HAL_CRYP_STATE_BUSY;
3022
3023 /* Set CRYP peripheral in TDES ECB encryption mode */
3024 CRYP_SetTDESECBMode(hcryp, 0);
3025
3026 /* Set the input and output addresses and start DMA transfer */
3027 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3028
3029 /* Process Unlocked */
3030 __HAL_UNLOCK(hcryp);
3031
3032 /* Return function status */
3033 return HAL_OK;
3034 }
3035 else
3036 {
3037 return HAL_ERROR;
3038 }
3039 }
3040
3041 /**
3042 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode using DMA.
3043 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3044 * the configuration information for CRYP module
3045 * @param pPlainData: Pointer to the plaintext buffer
3046 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3047 * @param pCypherData: Pointer to the cyphertext buffer
3048 * @retval HAL status
3049 */
3050 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3051 {
3052 uint32_t inputaddr;
3053 uint32_t outputaddr;
3054
3055 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3056 {
3057 /* Process Locked */
3058 __HAL_LOCK(hcryp);
3059
3060 inputaddr = (uint32_t)pPlainData;
3061 outputaddr = (uint32_t)pCypherData;
3062
3063 /* Change the CRYP state */
3064 hcryp->State = HAL_CRYP_STATE_BUSY;
3065
3066 /* Set CRYP peripheral in TDES CBC encryption mode */
3067 CRYP_SetTDESCBCMode(hcryp, 0);
3068
3069 /* Set the input and output addresses and start DMA transfer */
3070 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3071
3072 /* Process Unlocked */
3073 __HAL_UNLOCK(hcryp);
3074
3075 /* Return function status */
3076 return HAL_OK;
3077 }
3078 else
3079 {
3080 return HAL_ERROR;
3081 }
3082 }
3083
3084 /**
3085 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode using DMA.
3086 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3087 * the configuration information for CRYP module
3088 * @param pPlainData: Pointer to the plaintext buffer
3089 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3090 * @param pCypherData: Pointer to the cyphertext buffer
3091 * @retval HAL status
3092 */
3093 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3094 {
3095 uint32_t inputaddr;
3096 uint32_t outputaddr;
3097
3098 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3099 {
3100 /* Process Locked */
3101 __HAL_LOCK(hcryp);
3102
3103 inputaddr = (uint32_t)pCypherData;
3104 outputaddr = (uint32_t)pPlainData;
3105
3106 /* Change the CRYP state */
3107 hcryp->State = HAL_CRYP_STATE_BUSY;
3108
3109 /* Set CRYP peripheral in TDES ECB decryption mode */
3110 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3111
3112 /* Set the input and output addresses and start DMA transfer */
3113 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3114
3115 /* Process Unlocked */
3116 __HAL_UNLOCK(hcryp);
3117
3118 /* Return function status */
3119 return HAL_OK;
3120 }
3121 else
3122 {
3123 return HAL_ERROR;
3124 }
3125 }
3126
3127 /**
3128 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode using DMA.
3129 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3130 * the configuration information for CRYP module
3131 * @param pCypherData: Pointer to the cyphertext buffer
3132 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3133 * @param pPlainData: Pointer to the plaintext buffer
3134 * @retval HAL status
3135 */
3136 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3137 {
3138 uint32_t inputaddr;
3139 uint32_t outputaddr;
3140
3141 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3142 {
3143 /* Process Locked */
3144 __HAL_LOCK(hcryp);
3145
3146 inputaddr = (uint32_t)pCypherData;
3147 outputaddr = (uint32_t)pPlainData;
3148
3149 /* Change the CRYP state */
3150 hcryp->State = HAL_CRYP_STATE_BUSY;
3151
3152 /* Set CRYP peripheral in TDES CBC decryption mode */
3153 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3154
3155 /* Set the input and output addresses and start DMA transfer */
3156 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3157
3158 /* Process Unlocked */
3159 __HAL_UNLOCK(hcryp);
3160
3161 /* Return function status */
3162 return HAL_OK;
3163 }
3164 else
3165 {
3166 return HAL_ERROR;
3167 }
3168 }
3169
3170 /**
3171 * @}
3172 */
3173
3174 /** @defgroup CRYP_Group5 DMA callback functions
3175 * @brief DMA callback functions.
3176 *
3177 @verbatim
3178 ==============================================================================
3179 ##### DMA callback functions #####
3180 ==============================================================================
3181 [..] This section provides DMA callback functions:
3182 (+) DMA Input data transfer complete
3183 (+) DMA Output data transfer complete
3184 (+) DMA error
3185
3186 @endverbatim
3187 * @{
3188 */
3189
3190 /**
3191 * @brief Input FIFO transfer completed callbacks.
3192 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3193 * the configuration information for CRYP module
3194 * @retval None
3195 */
3196 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
3197 {
3198 /* NOTE : This function Should not be modified, when the callback is needed,
3199 the HAL_CRYP_InCpltCallback could be implemented in the user file
3200 */
3201 }
3202
3203 /**
3204 * @brief Output FIFO transfer completed callbacks.
3205 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3206 * the configuration information for CRYP module
3207 * @retval None
3208 */
3209 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
3210 {
3211 /* NOTE : This function Should not be modified, when the callback is needed,
3212 the HAL_CRYP_OutCpltCallback could be implemented in the user file
3213 */
3214 }
3215
3216 /**
3217 * @brief CRYP error callbacks.
3218 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3219 * the configuration information for CRYP module
3220 * @retval None
3221 */
3222 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
3223 {
3224 /* NOTE : This function Should not be modified, when the callback is needed,
3225 the HAL_CRYP_ErrorCallback could be implemented in the user file
3226 */
3227 }
3228
3229 /**
3230 * @}
3231 */
3232
3233 /** @defgroup CRYP_Group6 CRYP IRQ handler management
3234 * @brief CRYP IRQ handler.
3235 *
3236 @verbatim
3237 ==============================================================================
3238 ##### CRYP IRQ handler management #####
3239 ==============================================================================
3240 [..] This section provides CRYP IRQ handler function.
3241
3242 @endverbatim
3243 * @{
3244 */
3245
3246 /**
3247 * @brief This function handles CRYP interrupt request.
3248 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3249 * the configuration information for CRYP module
3250 * @retval None
3251 */
3252 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
3253 {
3254 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
3255 {
3256 case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT:
3257 HAL_CRYP_TDESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3258 break;
3259
3260 case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT:
3261 HAL_CRYP_TDESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3262 break;
3263
3264 case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT:
3265 HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3266 break;
3267
3268 case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT:
3269 HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3270 break;
3271
3272 case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT:
3273 HAL_CRYP_DESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3274 break;
3275
3276 case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT:
3277 HAL_CRYP_DESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3278 break;
3279
3280 case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT:
3281 HAL_CRYP_DESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3282 break;
3283
3284 case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT:
3285 HAL_CRYP_DESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3286 break;
3287
3288 case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
3289 HAL_CRYP_AESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3290 break;
3291
3292 case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT:
3293 HAL_CRYP_AESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3294 break;
3295
3296 case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
3297 HAL_CRYP_AESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3298 break;
3299
3300 case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT:
3301 HAL_CRYP_AESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3302 break;
3303
3304 case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
3305 HAL_CRYP_AESCTR_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3306 break;
3307
3308 case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
3309 HAL_CRYP_AESCTR_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
3310 break;
3311
3312 default:
3313 break;
3314 }
3315 }
3316
3317 /**
3318 * @}
3319 */
3320
3321 /** @defgroup CRYP_Group7 Peripheral State functions
3322 * @brief Peripheral State functions.
3323 *
3324 @verbatim
3325 ==============================================================================
3326 ##### Peripheral State functions #####
3327 ==============================================================================
3328 [..]
3329 This subsection permits to get in run-time the status of the peripheral.
3330
3331 @endverbatim
3332 * @{
3333 */
3334
3335 /**
3336 * @brief Returns the CRYP state.
3337 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3338 * the configuration information for CRYP module
3339 * @retval HAL state
3340 */
3341 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
3342 {
3343 return hcryp->State;
3344 }
3345
3346 /**
3347 * @}
3348 */
3349
3350 /**
3351 * @brief DMA CRYP Input Data process complete callback.
3352 * @param hdma: DMA handle
3353 * @retval None
3354 */
3355 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
3356 {
3357 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3358
3359 /* Disable the DMA transfer for input FIFO request by resetting the DIEN bit
3360 in the DMACR register */
3361 CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
3362
3363 /* Call input data transfer complete callback */
3364 HAL_CRYP_InCpltCallback(hcryp);
3365 }
3366
3367 /**
3368 * @brief DMA CRYP Output Data process complete callback.
3369 * @param hdma: DMA handle
3370 * @retval None
3371 */
3372 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
3373 {
3374 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3375
3376 /* Disable the DMA transfer for output FIFO request by resetting the DOEN bit
3377 in the DMACR register */
3378 CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
3379
3380 /* Disable CRYP */
3381 __HAL_CRYP_DISABLE();
3382
3383 /* Change the CRYP state to ready */
3384 hcryp->State = HAL_CRYP_STATE_READY;
3385
3386 /* Call output data transfer complete callback */
3387 HAL_CRYP_OutCpltCallback(hcryp);
3388 }
3389
3390 /**
3391 * @brief DMA CRYP communication error callback.
3392 * @param hdma: DMA handle
3393 * @retval None
3394 */
3395 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
3396 {
3397 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3398 hcryp->State= HAL_CRYP_STATE_READY;
3399 HAL_CRYP_ErrorCallback(hcryp);
3400 }
3401
3402 /**
3403 * @brief Writes the Key in Key registers.
3404 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3405 * the configuration information for CRYP module
3406 * @param Key: Pointer to Key buffer
3407 * @param KeySize: Size of Key
3408 * @retval None
3409 */
3410 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
3411 {
3412 uint32_t keyaddr = (uint32_t)Key;
3413
3414 switch(KeySize)
3415 {
3416 case CRYP_KEYSIZE_256B:
3417 /* Key Initialisation */
3418 CRYP->K0LR = __REV(*(uint32_t*)(keyaddr));
3419 keyaddr+=4;
3420 CRYP->K0RR = __REV(*(uint32_t*)(keyaddr));
3421 keyaddr+=4;
3422 CRYP->K1LR = __REV(*(uint32_t*)(keyaddr));
3423 keyaddr+=4;
3424 CRYP->K1RR = __REV(*(uint32_t*)(keyaddr));
3425 keyaddr+=4;
3426 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
3427 keyaddr+=4;
3428 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
3429 keyaddr+=4;
3430 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
3431 keyaddr+=4;
3432 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
3433 break;
3434 case CRYP_KEYSIZE_192B:
3435 CRYP->K1LR = __REV(*(uint32_t*)(keyaddr));
3436 keyaddr+=4;
3437 CRYP->K1RR = __REV(*(uint32_t*)(keyaddr));
3438 keyaddr+=4;
3439 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
3440 keyaddr+=4;
3441 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
3442 keyaddr+=4;
3443 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
3444 keyaddr+=4;
3445 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
3446 break;
3447 case CRYP_KEYSIZE_128B:
3448 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
3449 keyaddr+=4;
3450 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
3451 keyaddr+=4;
3452 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
3453 keyaddr+=4;
3454 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
3455 break;
3456 default:
3457 break;
3458 }
3459 }
3460
3461 /**
3462 * @brief Writes the InitVector/InitCounter in IV registers.
3463 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3464 * the configuration information for CRYP module
3465 * @param InitVector: Pointer to InitVector/InitCounter buffer
3466 * @param IVSize: Size of the InitVector/InitCounter
3467 * @retval None
3468 */
3469 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize)
3470 {
3471 uint32_t ivaddr = (uint32_t)InitVector;
3472
3473 switch(IVSize)
3474 {
3475 case CRYP_KEYSIZE_128B:
3476 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
3477 ivaddr+=4;
3478 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
3479 ivaddr+=4;
3480 CRYP->IV1LR = __REV(*(uint32_t*)(ivaddr));
3481 ivaddr+=4;
3482 CRYP->IV1RR = __REV(*(uint32_t*)(ivaddr));
3483 break;
3484 /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
3485 case CRYP_KEYSIZE_192B:
3486 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
3487 ivaddr+=4;
3488 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
3489 break;
3490 case CRYP_KEYSIZE_256B:
3491 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
3492 ivaddr+=4;
3493 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
3494 break;
3495 default:
3496 break;
3497 }
3498 }
3499
3500 /**
3501 * @brief Process Data: Writes Input data in polling mode and read the output data
3502 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3503 * the configuration information for CRYP module
3504 * @param Input: Pointer to the Input buffer
3505 * @param Ilength: Length of the Input buffer, must be a multiple of 16.
3506 * @param Output: Pointer to the returned buffer
3507 * @retval None
3508 */
3509 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
3510 {
3511 uint32_t tickstart = 0;
3512
3513 uint32_t i = 0;
3514 uint32_t inputaddr = (uint32_t)Input;
3515 uint32_t outputaddr = (uint32_t)Output;
3516
3517 for(i=0; (i < Ilength); i+=16)
3518 {
3519 /* Write the Input block in the IN FIFO */
3520 CRYP->DR = *(uint32_t*)(inputaddr);
3521 inputaddr+=4;
3522 CRYP->DR = *(uint32_t*)(inputaddr);
3523 inputaddr+=4;
3524 CRYP->DR = *(uint32_t*)(inputaddr);
3525 inputaddr+=4;
3526 CRYP->DR = *(uint32_t*)(inputaddr);
3527 inputaddr+=4;
3528
3529 /* Get tick */
3530 tickstart = HAL_GetTick();
3531
3532 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
3533 {
3534 /* Check for the Timeout */
3535 if(Timeout != HAL_MAX_DELAY)
3536 {
3537 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3538 {
3539 /* Change state */
3540 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
3541
3542 /* Process Unlocked */
3543 __HAL_UNLOCK(hcryp);
3544
3545 return HAL_TIMEOUT;
3546 }
3547 }
3548 }
3549 /* Read the Output block from the Output FIFO */
3550 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3551 outputaddr+=4;
3552 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3553 outputaddr+=4;
3554 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3555 outputaddr+=4;
3556 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3557 outputaddr+=4;
3558 }
3559 /* Return function status */
3560 return HAL_OK;
3561 }
3562
3563 /**
3564 * @brief Process Data: Write Input data in polling mode.
3565 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3566 * the configuration information for CRYP module
3567 * @param Input: Pointer to the Input buffer
3568 * @param Ilength: Length of the Input buffer, must be a multiple of 8
3569 * @param Output: Pointer to the returned buffer
3570 * @param Timeout: Specify Timeout value
3571 * @retval None
3572 */
3573 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
3574 {
3575 uint32_t tickstart = 0;
3576
3577 uint32_t i = 0;
3578 uint32_t inputaddr = (uint32_t)Input;
3579 uint32_t outputaddr = (uint32_t)Output;
3580
3581 for(i=0; (i < Ilength); i+=8)
3582 {
3583 /* Write the Input block in the IN FIFO */
3584 CRYP->DR = *(uint32_t*)(inputaddr);
3585 inputaddr+=4;
3586 CRYP->DR = *(uint32_t*)(inputaddr);
3587 inputaddr+=4;
3588
3589 /* Get tick */
3590 tickstart = HAL_GetTick();
3591
3592 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
3593 {
3594 /* Check for the Timeout */
3595 if(Timeout != HAL_MAX_DELAY)
3596 {
3597 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3598 {
3599 /* Change state */
3600 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
3601
3602 /* Process Unlocked */
3603 __HAL_UNLOCK(hcryp);
3604
3605 return HAL_TIMEOUT;
3606 }
3607 }
3608 }
3609 /* Read the Output block from the Output FIFO */
3610 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3611 outputaddr+=4;
3612 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3613 outputaddr+=4;
3614 }
3615 /* Return function status */
3616 return HAL_OK;
3617 }
3618
3619 /**
3620 * @brief Set the DMA configuration and start the DMA transfer
3621 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3622 * the configuration information for CRYP module
3623 * @param inputaddr: address of the Input buffer
3624 * @param Size: Size of the Input buffer, must be a multiple of 16.
3625 * @param outputaddr: address of the Output buffer
3626 * @retval None
3627 */
3628 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
3629 {
3630 /* Set the CRYP DMA transfer complete callback */
3631 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
3632 /* Set the DMA error callback */
3633 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
3634
3635 /* Set the CRYP DMA transfer complete callback */
3636 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
3637 /* Set the DMA error callback */
3638 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
3639
3640 /* Enable CRYP */
3641 __HAL_CRYP_ENABLE();
3642
3643 /* Enable the DMA In DMA Stream */
3644 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&CRYP->DR, Size/4);
3645
3646 /* Enable In DMA request */
3647 CRYP->DMACR = (CRYP_DMACR_DIEN);
3648
3649 /* Enable the DMA Out DMA Stream */
3650 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&CRYP->DOUT, outputaddr, Size/4);
3651
3652 /* Enable Out DMA request */
3653 CRYP->DMACR |= CRYP_DMACR_DOEN;
3654
3655 }
3656
3657 /**
3658 * @brief Sets the CRYP peripheral in DES ECB mode.
3659 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3660 * the configuration information for CRYP module
3661 * @param Direction: Encryption or decryption
3662 * @retval None
3663 */
3664 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
3665 {
3666 /* Check if initialization phase has already been performed */
3667 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
3668 {
3669 /* Set the CRYP peripheral in AES ECB mode */
3670 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_DES_ECB | Direction);
3671
3672 /* Set the key */
3673 CRYP->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
3674 CRYP->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4));
3675
3676 /* Flush FIFO */
3677 __HAL_CRYP_FIFO_FLUSH();
3678
3679 /* Set the phase */
3680 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
3681 }
3682 }
3683
3684 /**
3685 * @brief Sets the CRYP peripheral in DES CBC mode.
3686 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3687 * the configuration information for CRYP module
3688 * @param Direction: Encryption or decryption
3689 * @retval None
3690 */
3691 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
3692 {
3693 /* Check if initialization phase has already been performed */
3694 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
3695 {
3696 /* Set the CRYP peripheral in AES ECB mode */
3697 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_DES_CBC | Direction);
3698
3699 /* Set the key */
3700 CRYP->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
3701 CRYP->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4));
3702
3703 /* Set the Initialization Vector */
3704 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
3705
3706 /* Flush FIFO */
3707 __HAL_CRYP_FIFO_FLUSH();
3708
3709 /* Set the phase */
3710 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
3711 }
3712 }
3713
3714 /**
3715 * @brief Sets the CRYP peripheral in TDES ECB mode.
3716 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3717 * the configuration information for CRYP module
3718 * @param Direction: Encryption or decryption
3719 * @retval None
3720 */
3721 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
3722 {
3723 /* Check if initialization phase has already been performed */
3724 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
3725 {
3726 /* Set the CRYP peripheral in AES ECB mode */
3727 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_TDES_ECB | Direction);
3728
3729 /* Set the key */
3730 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
3731
3732 /* Flush FIFO */
3733 __HAL_CRYP_FIFO_FLUSH();
3734
3735 /* Set the phase */
3736 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
3737 }
3738 }
3739
3740 /**
3741 * @brief Sets the CRYP peripheral in TDES CBC mode
3742 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3743 * the configuration information for CRYP module
3744 * @param Direction: Encryption or decryption
3745 * @retval None
3746 */
3747 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
3748 {
3749 /* Check if initialization phase has already been performed */
3750 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
3751 {
3752 /* Set the CRYP peripheral in AES CBC mode */
3753 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_TDES_CBC | Direction);
3754
3755 /* Set the key */
3756 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
3757
3758 /* Set the Initialization Vector */
3759 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
3760
3761 /* Flush FIFO */
3762 __HAL_CRYP_FIFO_FLUSH();
3763
3764 /* Set the phase */
3765 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
3766 }
3767 }
3768
3769 /**
3770 * @}
3771 */
3772
3773 #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */
3774
3775 #endif /* HAL_CRYP_MODULE_ENABLED */
3776 /**
3777 * @}
3778 */
3779
3780 /**
3781 * @}
3782 */
3783
3784 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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