2 ** ###################################################################
3 ** Compilers: Keil ARM C/C++ Compiler
4 ** Freescale C/C++ for Embedded ARM
6 ** IAR ANSI C/C++ Compiler for ARM
8 ** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
9 ** Version: rev. 2.5, 2014-05-06
13 ** Extension to the CMSIS register access layer header.
15 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
16 ** All rights reserved.
18 ** Redistribution and use in source and binary forms, with or without modification,
19 ** are permitted provided that the following conditions are met:
21 ** o Redistributions of source code must retain the above copyright notice, this list
22 ** of conditions and the following disclaimer.
24 ** o Redistributions in binary form must reproduce the above copyright notice, this
25 ** list of conditions and the following disclaimer in the documentation and/or
26 ** other materials provided with the distribution.
28 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
29 ** contributors may be used to endorse or promote products derived from this
30 ** software without specific prior written permission.
32 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
36 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
39 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ** http: www.freescale.com
44 ** mail: support@freescale.com
47 ** - rev. 1.0 (2013-07-23)
49 ** - rev. 1.1 (2013-09-17)
50 ** RM rev. 0.4 update.
51 ** - rev. 2.0 (2013-10-29)
52 ** Register accessor macros added to the memory map.
53 ** Symbols for Processor Expert memory map compatibility added to the memory map.
54 ** Startup file for gcc has been updated according to CMSIS 3.2.
55 ** System initialization updated.
56 ** - rev. 2.1 (2013-10-30)
57 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
58 ** - rev. 2.2 (2013-12-20)
59 ** Update according to reference manual rev. 0.6,
60 ** - rev. 2.3 (2014-01-13)
61 ** Update according to reference manual rev. 0.61,
62 ** - rev. 2.4 (2014-02-10)
63 ** The declaration of clock configurations has been moved to separate header file system_MK22F51212.h
64 ** - rev. 2.5 (2014-05-06)
65 ** Update according to reference manual rev. 1.0,
66 ** Update of system and startup files.
67 ** Module access macro module_BASES replaced by module_BASE_PTRS.
69 ** ###################################################################
73 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
75 * This file was generated automatically and any changes may be lost.
77 #ifndef __HW_RFSYS_REGISTERS_H__
78 #define __HW_RFSYS_REGISTERS_H__
80 #include "MK22F51212.h"
81 #include "fsl_bitaccess.h"
86 * System register file
88 * Registers defined in this header file:
89 * - HW_RFSYS_REGn - Register file register
91 * - hw_rfsys_t - Struct containing all module registers.
94 #define HW_RFSYS_INSTANCE_COUNT (1U) /*!< Number of instances of the RFSYS module. */
96 /*******************************************************************************
97 * HW_RFSYS_REGn - Register file register
98 ******************************************************************************/
101 * @brief HW_RFSYS_REGn - Register file register (RW)
103 * Reset value: 0x00000000U
105 * Each register can be accessed as 8-, 16-, or 32-bits.
107 typedef union _hw_rfsys_regn
110 struct _hw_rfsys_regn_bitfields
112 uint32_t LL
: 8; /*!< [7:0] */
113 uint32_t LH
: 8; /*!< [15:8] */
114 uint32_t HL
: 8; /*!< [23:16] */
115 uint32_t HH
: 8; /*!< [31:24] */
120 * @name Constants and macros for entire RFSYS_REGn register
123 #define HW_RFSYS_REGn_COUNT (8U)
125 #define HW_RFSYS_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
127 #define HW_RFSYS_REGn(x, n) (*(__IO hw_rfsys_regn_t *) HW_RFSYS_REGn_ADDR(x, n))
128 #define HW_RFSYS_REGn_RD(x, n) (HW_RFSYS_REGn(x, n).U)
129 #define HW_RFSYS_REGn_WR(x, n, v) (HW_RFSYS_REGn(x, n).U = (v))
130 #define HW_RFSYS_REGn_SET(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) | (v)))
131 #define HW_RFSYS_REGn_CLR(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) & ~(v)))
132 #define HW_RFSYS_REGn_TOG(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) ^ (v)))
136 * Constants & macros for individual RFSYS_REGn bitfields
140 * @name Register RFSYS_REGn, field LL[7:0] (RW)
145 #define BP_RFSYS_REGn_LL (0U) /*!< Bit position for RFSYS_REGn_LL. */
146 #define BM_RFSYS_REGn_LL (0x000000FFU) /*!< Bit mask for RFSYS_REGn_LL. */
147 #define BS_RFSYS_REGn_LL (8U) /*!< Bit field size in bits for RFSYS_REGn_LL. */
149 /*! @brief Read current value of the RFSYS_REGn_LL field. */
150 #define BR_RFSYS_REGn_LL(x, n) (HW_RFSYS_REGn(x, n).B.LL)
152 /*! @brief Format value for bitfield RFSYS_REGn_LL. */
153 #define BF_RFSYS_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LL) & BM_RFSYS_REGn_LL)
155 /*! @brief Set the LL field to a new value. */
156 #define BW_RFSYS_REGn_LL(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_LL) | BF_RFSYS_REGn_LL(v)))
160 * @name Register RFSYS_REGn, field LH[15:8] (RW)
165 #define BP_RFSYS_REGn_LH (8U) /*!< Bit position for RFSYS_REGn_LH. */
166 #define BM_RFSYS_REGn_LH (0x0000FF00U) /*!< Bit mask for RFSYS_REGn_LH. */
167 #define BS_RFSYS_REGn_LH (8U) /*!< Bit field size in bits for RFSYS_REGn_LH. */
169 /*! @brief Read current value of the RFSYS_REGn_LH field. */
170 #define BR_RFSYS_REGn_LH(x, n) (HW_RFSYS_REGn(x, n).B.LH)
172 /*! @brief Format value for bitfield RFSYS_REGn_LH. */
173 #define BF_RFSYS_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LH) & BM_RFSYS_REGn_LH)
175 /*! @brief Set the LH field to a new value. */
176 #define BW_RFSYS_REGn_LH(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_LH) | BF_RFSYS_REGn_LH(v)))
180 * @name Register RFSYS_REGn, field HL[23:16] (RW)
185 #define BP_RFSYS_REGn_HL (16U) /*!< Bit position for RFSYS_REGn_HL. */
186 #define BM_RFSYS_REGn_HL (0x00FF0000U) /*!< Bit mask for RFSYS_REGn_HL. */
187 #define BS_RFSYS_REGn_HL (8U) /*!< Bit field size in bits for RFSYS_REGn_HL. */
189 /*! @brief Read current value of the RFSYS_REGn_HL field. */
190 #define BR_RFSYS_REGn_HL(x, n) (HW_RFSYS_REGn(x, n).B.HL)
192 /*! @brief Format value for bitfield RFSYS_REGn_HL. */
193 #define BF_RFSYS_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HL) & BM_RFSYS_REGn_HL)
195 /*! @brief Set the HL field to a new value. */
196 #define BW_RFSYS_REGn_HL(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_HL) | BF_RFSYS_REGn_HL(v)))
200 * @name Register RFSYS_REGn, field HH[31:24] (RW)
205 #define BP_RFSYS_REGn_HH (24U) /*!< Bit position for RFSYS_REGn_HH. */
206 #define BM_RFSYS_REGn_HH (0xFF000000U) /*!< Bit mask for RFSYS_REGn_HH. */
207 #define BS_RFSYS_REGn_HH (8U) /*!< Bit field size in bits for RFSYS_REGn_HH. */
209 /*! @brief Read current value of the RFSYS_REGn_HH field. */
210 #define BR_RFSYS_REGn_HH(x, n) (HW_RFSYS_REGn(x, n).B.HH)
212 /*! @brief Format value for bitfield RFSYS_REGn_HH. */
213 #define BF_RFSYS_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HH) & BM_RFSYS_REGn_HH)
215 /*! @brief Set the HH field to a new value. */
216 #define BW_RFSYS_REGn_HH(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_HH) | BF_RFSYS_REGn_HH(v)))
219 /*******************************************************************************
220 * hw_rfsys_t - module struct
221 ******************************************************************************/
223 * @brief All RFSYS module registers.
226 typedef struct _hw_rfsys
228 __IO hw_rfsys_regn_t REGn
[8]; /*!< [0x0] Register file register */
232 /*! @brief Macro to access all RFSYS registers. */
233 /*! @param x RFSYS module instance base address. */
234 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
235 * use the '&' operator, like <code>&HW_RFSYS(RFSYS_BASE)</code>. */
236 #define HW_RFSYS(x) (*(hw_rfsys_t *)(x))
238 #endif /* __HW_RFSYS_REGISTERS_H__ */