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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/ether_iodefine.h
1 /*******************************************************************************
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : ether_iodefine.h
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef ETHER_IODEFINE_H
30 #define ETHER_IODEFINE_H
31 /* ->QAC 0639 : Over 127 members (C90) */
32 /* ->SEC M1.10.1 : Not magic number */
36 volatile uint32_t EDSR0
; /* EDSR0 */
37 volatile uint8_t dummy207
[12]; /* */
38 volatile uint32_t TDLAR0
; /* TDLAR0 */
39 volatile uint32_t TDFAR0
; /* TDFAR0 */
40 volatile uint32_t TDFXR0
; /* TDFXR0 */
41 volatile uint32_t TDFFR0
; /* TDFFR0 */
42 volatile uint8_t dummy208
[16]; /* */
43 volatile uint32_t RDLAR0
; /* RDLAR0 */
44 volatile uint32_t RDFAR0
; /* RDFAR0 */
45 volatile uint32_t RDFXR0
; /* RDFXR0 */
46 volatile uint32_t RDFFR0
; /* RDFFR0 */
47 volatile uint8_t dummy209
[960]; /* */
48 volatile uint32_t EDMR0
; /* EDMR0 */
49 volatile uint8_t dummy210
[4]; /* */
50 volatile uint32_t EDTRR0
; /* EDTRR0 */
51 volatile uint8_t dummy211
[4]; /* */
52 volatile uint32_t EDRRR0
; /* EDRRR0 */
53 volatile uint8_t dummy212
[20]; /* */
54 volatile uint32_t EESR0
; /* EESR0 */
55 volatile uint8_t dummy213
[4]; /* */
56 volatile uint32_t EESIPR0
; /* EESIPR0 */
57 volatile uint8_t dummy214
[4]; /* */
58 volatile uint32_t TRSCER0
; /* TRSCER0 */
59 volatile uint8_t dummy215
[4]; /* */
60 volatile uint32_t RMFCR0
; /* RMFCR0 */
61 volatile uint8_t dummy216
[4]; /* */
62 volatile uint32_t TFTR0
; /* TFTR0 */
63 volatile uint8_t dummy217
[4]; /* */
64 volatile uint32_t FDR0
; /* FDR0 */
65 volatile uint8_t dummy218
[4]; /* */
66 volatile uint32_t RMCR0
; /* RMCR0 */
67 volatile uint8_t dummy219
[4]; /* */
68 volatile uint32_t RPADIR0
; /* RPADIR0 */
69 volatile uint8_t dummy220
[4]; /* */
70 volatile uint32_t FCFTR0
; /* FCFTR0 */
71 volatile uint8_t dummy221
[120]; /* */
72 volatile uint32_t CSMR
; /* CSMR */
73 volatile uint32_t CSSBM
; /* CSSBM */
74 volatile uint32_t CSSMR
; /* CSSMR */
75 volatile uint8_t dummy222
[16]; /* */
76 volatile uint32_t ECMR0
; /* ECMR0 */
77 volatile uint8_t dummy223
[4]; /* */
78 volatile uint32_t RFLR0
; /* RFLR0 */
79 volatile uint8_t dummy224
[4]; /* */
80 volatile uint32_t ECSR0
; /* ECSR0 */
81 volatile uint8_t dummy225
[4]; /* */
82 volatile uint32_t ECSIPR0
; /* ECSIPR0 */
83 volatile uint8_t dummy226
[4]; /* */
84 volatile uint32_t PIR0
; /* PIR0 */
85 volatile uint8_t dummy227
[48]; /* */
86 volatile uint32_t APR0
; /* APR0 */
87 volatile uint32_t MPR0
; /* MPR0 */
88 volatile uint32_t PFTCR0
; /* PFTCR0 */
89 volatile uint32_t PFRCR0
; /* PFRCR0 */
90 volatile uint32_t TPAUSER0
; /* TPAUSER0 */
91 volatile uint8_t dummy228
[88]; /* */
92 volatile uint32_t MAHR0
; /* MAHR0 */
93 volatile uint8_t dummy229
[4]; /* */
94 volatile uint32_t MALR0
; /* MALR0 */
95 volatile uint8_t dummy230
[372]; /* */
96 volatile uint32_t CEFCR0
; /* CEFCR0 */
97 volatile uint8_t dummy231
[4]; /* */
98 volatile uint32_t FRECR0
; /* FRECR0 */
99 volatile uint8_t dummy232
[4]; /* */
100 volatile uint32_t TSFRCR0
; /* TSFRCR0 */
101 volatile uint8_t dummy233
[4]; /* */
102 volatile uint32_t TLFRCR0
; /* TLFRCR0 */
103 volatile uint8_t dummy234
[4]; /* */
104 volatile uint32_t RFCR0
; /* RFCR0 */
105 volatile uint8_t dummy235
[20]; /* */
106 volatile uint32_t MAFCR0
; /* MAFCR0 */
107 volatile uint8_t dummy236
[4228]; /* */
108 volatile uint32_t ARSTR
; /* ARSTR */
109 volatile uint32_t TSU_CTRST
; /* TSU_CTRST */
110 volatile uint8_t dummy237
[80]; /* */
111 volatile uint32_t TSU_VTAG0
; /* TSU_VTAG0 */
112 volatile uint8_t dummy238
[4]; /* */
113 volatile uint32_t TSU_ADSBSY
; /* TSU_ADSBSY */
114 volatile uint32_t TSU_TEN
; /* TSU_TEN */
115 volatile uint8_t dummy239
[24]; /* */
116 volatile uint32_t TXNLCR0
; /* TXNLCR0 */
117 volatile uint32_t TXALCR0
; /* TXALCR0 */
118 volatile uint32_t RXNLCR0
; /* RXNLCR0 */
119 volatile uint32_t RXALCR0
; /* RXALCR0 */
120 volatile uint8_t dummy240
[112]; /* */
121 /* start of struct st_ether_from_tsu_adrh0 */
122 volatile uint32_t TSU_ADRH0
; /* TSU_ADRH0 */
123 volatile uint32_t TSU_ADRL0
; /* TSU_ADRL0 */
124 /* end of struct st_ether_from_tsu_adrh0 */
125 /* start of struct st_ether_from_tsu_adrh0 */
126 volatile uint32_t TSU_ADRH1
; /* TSU_ADRH1 */
127 volatile uint32_t TSU_ADRL1
; /* TSU_ADRL1 */
128 /* end of struct st_ether_from_tsu_adrh0 */
129 /* start of struct st_ether_from_tsu_adrh0 */
130 volatile uint32_t TSU_ADRH2
; /* TSU_ADRH2 */
131 volatile uint32_t TSU_ADRL2
; /* TSU_ADRL2 */
132 /* end of struct st_ether_from_tsu_adrh0 */
133 /* start of struct st_ether_from_tsu_adrh0 */
134 volatile uint32_t TSU_ADRH3
; /* TSU_ADRH3 */
135 volatile uint32_t TSU_ADRL3
; /* TSU_ADRL3 */
136 /* end of struct st_ether_from_tsu_adrh0 */
137 /* start of struct st_ether_from_tsu_adrh0 */
138 volatile uint32_t TSU_ADRH4
; /* TSU_ADRH4 */
139 volatile uint32_t TSU_ADRL4
; /* TSU_ADRL4 */
140 /* end of struct st_ether_from_tsu_adrh0 */
141 /* start of struct st_ether_from_tsu_adrh0 */
142 volatile uint32_t TSU_ADRH5
; /* TSU_ADRH5 */
143 volatile uint32_t TSU_ADRL5
; /* TSU_ADRL5 */
144 /* end of struct st_ether_from_tsu_adrh0 */
145 /* start of struct st_ether_from_tsu_adrh0 */
146 volatile uint32_t TSU_ADRH6
; /* TSU_ADRH6 */
147 volatile uint32_t TSU_ADRL6
; /* TSU_ADRL6 */
148 /* end of struct st_ether_from_tsu_adrh0 */
149 /* start of struct st_ether_from_tsu_adrh0 */
150 volatile uint32_t TSU_ADRH7
; /* TSU_ADRH7 */
151 volatile uint32_t TSU_ADRL7
; /* TSU_ADRL7 */
152 /* end of struct st_ether_from_tsu_adrh0 */
153 /* start of struct st_ether_from_tsu_adrh0 */
154 volatile uint32_t TSU_ADRH8
; /* TSU_ADRH8 */
155 volatile uint32_t TSU_ADRL8
; /* TSU_ADRL8 */
156 /* end of struct st_ether_from_tsu_adrh0 */
157 /* start of struct st_ether_from_tsu_adrh0 */
158 volatile uint32_t TSU_ADRH9
; /* TSU_ADRH9 */
159 volatile uint32_t TSU_ADRL9
; /* TSU_ADRL9 */
160 /* end of struct st_ether_from_tsu_adrh0 */
161 /* start of struct st_ether_from_tsu_adrh0 */
162 volatile uint32_t TSU_ADRH10
; /* TSU_ADRH10 */
163 volatile uint32_t TSU_ADRL10
; /* TSU_ADRL10 */
164 /* end of struct st_ether_from_tsu_adrh0 */
165 /* start of struct st_ether_from_tsu_adrh0 */
166 volatile uint32_t TSU_ADRH11
; /* TSU_ADRH11 */
167 volatile uint32_t TSU_ADRL11
; /* TSU_ADRL11 */
168 /* end of struct st_ether_from_tsu_adrh0 */
169 /* start of struct st_ether_from_tsu_adrh0 */
170 volatile uint32_t TSU_ADRH12
; /* TSU_ADRH12 */
171 volatile uint32_t TSU_ADRL12
; /* TSU_ADRL12 */
172 /* end of struct st_ether_from_tsu_adrh0 */
173 /* start of struct st_ether_from_tsu_adrh0 */
174 volatile uint32_t TSU_ADRH13
; /* TSU_ADRH13 */
175 volatile uint32_t TSU_ADRL13
; /* TSU_ADRL13 */
176 /* end of struct st_ether_from_tsu_adrh0 */
177 /* start of struct st_ether_from_tsu_adrh0 */
178 volatile uint32_t TSU_ADRH14
; /* TSU_ADRH14 */
179 volatile uint32_t TSU_ADRL14
; /* TSU_ADRL14 */
180 /* end of struct st_ether_from_tsu_adrh0 */
181 /* start of struct st_ether_from_tsu_adrh0 */
182 volatile uint32_t TSU_ADRH15
; /* TSU_ADRH15 */
183 volatile uint32_t TSU_ADRL15
; /* TSU_ADRL15 */
184 /* end of struct st_ether_from_tsu_adrh0 */
185 /* start of struct st_ether_from_tsu_adrh0 */
186 volatile uint32_t TSU_ADRH16
; /* TSU_ADRH16 */
187 volatile uint32_t TSU_ADRL16
; /* TSU_ADRL16 */
188 /* end of struct st_ether_from_tsu_adrh0 */
189 /* start of struct st_ether_from_tsu_adrh0 */
190 volatile uint32_t TSU_ADRH17
; /* TSU_ADRH17 */
191 volatile uint32_t TSU_ADRL17
; /* TSU_ADRL17 */
192 /* end of struct st_ether_from_tsu_adrh0 */
193 /* start of struct st_ether_from_tsu_adrh0 */
194 volatile uint32_t TSU_ADRH18
; /* TSU_ADRH18 */
195 volatile uint32_t TSU_ADRL18
; /* TSU_ADRL18 */
196 /* end of struct st_ether_from_tsu_adrh0 */
197 /* start of struct st_ether_from_tsu_adrh0 */
198 volatile uint32_t TSU_ADRH19
; /* TSU_ADRH19 */
199 volatile uint32_t TSU_ADRL19
; /* TSU_ADRL19 */
200 /* end of struct st_ether_from_tsu_adrh0 */
201 /* start of struct st_ether_from_tsu_adrh0 */
202 volatile uint32_t TSU_ADRH20
; /* TSU_ADRH20 */
203 volatile uint32_t TSU_ADRL20
; /* TSU_ADRL20 */
204 /* end of struct st_ether_from_tsu_adrh0 */
205 /* start of struct st_ether_from_tsu_adrh0 */
206 volatile uint32_t TSU_ADRH21
; /* TSU_ADRH21 */
207 volatile uint32_t TSU_ADRL21
; /* TSU_ADRL21 */
208 /* end of struct st_ether_from_tsu_adrh0 */
209 /* start of struct st_ether_from_tsu_adrh0 */
210 volatile uint32_t TSU_ADRH22
; /* TSU_ADRH22 */
211 volatile uint32_t TSU_ADRL22
; /* TSU_ADRL22 */
212 /* end of struct st_ether_from_tsu_adrh0 */
213 /* start of struct st_ether_from_tsu_adrh0 */
214 volatile uint32_t TSU_ADRH23
; /* TSU_ADRH23 */
215 volatile uint32_t TSU_ADRL23
; /* TSU_ADRL23 */
216 /* end of struct st_ether_from_tsu_adrh0 */
217 /* start of struct st_ether_from_tsu_adrh0 */
218 volatile uint32_t TSU_ADRH24
; /* TSU_ADRH24 */
219 volatile uint32_t TSU_ADRL24
; /* TSU_ADRL24 */
220 /* end of struct st_ether_from_tsu_adrh0 */
221 /* start of struct st_ether_from_tsu_adrh0 */
222 volatile uint32_t TSU_ADRH25
; /* TSU_ADRH25 */
223 volatile uint32_t TSU_ADRL25
; /* TSU_ADRL25 */
224 /* end of struct st_ether_from_tsu_adrh0 */
225 /* start of struct st_ether_from_tsu_adrh0 */
226 volatile uint32_t TSU_ADRH26
; /* TSU_ADRH26 */
227 volatile uint32_t TSU_ADRL26
; /* TSU_ADRL26 */
228 /* end of struct st_ether_from_tsu_adrh0 */
229 /* start of struct st_ether_from_tsu_adrh0 */
230 volatile uint32_t TSU_ADRH27
; /* TSU_ADRH27 */
231 volatile uint32_t TSU_ADRL27
; /* TSU_ADRL27 */
232 /* end of struct st_ether_from_tsu_adrh0 */
233 /* start of struct st_ether_from_tsu_adrh0 */
234 volatile uint32_t TSU_ADRH28
; /* TSU_ADRH28 */
235 volatile uint32_t TSU_ADRL28
; /* TSU_ADRL28 */
236 /* end of struct st_ether_from_tsu_adrh0 */
237 /* start of struct st_ether_from_tsu_adrh0 */
238 volatile uint32_t TSU_ADRH29
; /* TSU_ADRH29 */
239 volatile uint32_t TSU_ADRL29
; /* TSU_ADRL29 */
240 /* end of struct st_ether_from_tsu_adrh0 */
241 /* start of struct st_ether_from_tsu_adrh0 */
242 volatile uint32_t TSU_ADRH30
; /* TSU_ADRH30 */
243 volatile uint32_t TSU_ADRL30
; /* TSU_ADRL30 */
244 /* end of struct st_ether_from_tsu_adrh0 */
245 /* start of struct st_ether_from_tsu_adrh0 */
246 volatile uint32_t TSU_ADRH31
; /* TSU_ADRH31 */
247 volatile uint32_t TSU_ADRL31
; /* TSU_ADRL31 */
248 /* end of struct st_ether_from_tsu_adrh0 */
252 struct st_ether_from_tsu_adrh0
254 volatile uint32_t TSU_ADRH0
; /* TSU_ADRH0 */
255 volatile uint32_t TSU_ADRL0
; /* TSU_ADRL0 */
259 #define ETHER (*(struct st_ether *)0xE8203000uL) /* ETHER */
262 /* Start of channnel array defines of ETHER */
264 /* Channnel array defines of ETHER_FROM_TSU_ADRH0_ARRAY */
265 /*(Sample) value = ETHER_FROM_TSU_ADRH0_ARRAY[ channel ]->TSU_ADRH0; */
266 #define ETHER_FROM_TSU_ADRH0_ARRAY_COUNT 32
267 #define ETHER_FROM_TSU_ADRH0_ARRAY_ADDRESS_LIST \
268 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
269 ÐER_FROM_TSU_ADRH0, ÐER_FROM_TSU_ADRH1, ÐER_FROM_TSU_ADRH2, ÐER_FROM_TSU_ADRH3, ÐER_FROM_TSU_ADRH4, ÐER_FROM_TSU_ADRH5, ÐER_FROM_TSU_ADRH6, ÐER_FROM_TSU_ADRH7, \
270 ÐER_FROM_TSU_ADRH8, ÐER_FROM_TSU_ADRH9, ÐER_FROM_TSU_ADRH10, ÐER_FROM_TSU_ADRH11, ÐER_FROM_TSU_ADRH12, ÐER_FROM_TSU_ADRH13, ÐER_FROM_TSU_ADRH14, ÐER_FROM_TSU_ADRH15, \
271 ÐER_FROM_TSU_ADRH16, ÐER_FROM_TSU_ADRH17, ÐER_FROM_TSU_ADRH18, ÐER_FROM_TSU_ADRH19, ÐER_FROM_TSU_ADRH20, ÐER_FROM_TSU_ADRH21, ÐER_FROM_TSU_ADRH22, ÐER_FROM_TSU_ADRH23, \
272 ÐER_FROM_TSU_ADRH24, ÐER_FROM_TSU_ADRH25, ÐER_FROM_TSU_ADRH26, ÐER_FROM_TSU_ADRH27, ÐER_FROM_TSU_ADRH28, ÐER_FROM_TSU_ADRH29, ÐER_FROM_TSU_ADRH30, ÐER_FROM_TSU_ADRH31 \
273 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
274 #define ETHER_FROM_TSU_ADRH0 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH0) /* ETHER_FROM_TSU_ADRH0 */
275 #define ETHER_FROM_TSU_ADRH1 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH1) /* ETHER_FROM_TSU_ADRH1 */
276 #define ETHER_FROM_TSU_ADRH2 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH2) /* ETHER_FROM_TSU_ADRH2 */
277 #define ETHER_FROM_TSU_ADRH3 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH3) /* ETHER_FROM_TSU_ADRH3 */
278 #define ETHER_FROM_TSU_ADRH4 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH4) /* ETHER_FROM_TSU_ADRH4 */
279 #define ETHER_FROM_TSU_ADRH5 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH5) /* ETHER_FROM_TSU_ADRH5 */
280 #define ETHER_FROM_TSU_ADRH6 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH6) /* ETHER_FROM_TSU_ADRH6 */
281 #define ETHER_FROM_TSU_ADRH7 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH7) /* ETHER_FROM_TSU_ADRH7 */
282 #define ETHER_FROM_TSU_ADRH8 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH8) /* ETHER_FROM_TSU_ADRH8 */
283 #define ETHER_FROM_TSU_ADRH9 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH9) /* ETHER_FROM_TSU_ADRH9 */
284 #define ETHER_FROM_TSU_ADRH10 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH10) /* ETHER_FROM_TSU_ADRH10 */
285 #define ETHER_FROM_TSU_ADRH11 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH11) /* ETHER_FROM_TSU_ADRH11 */
286 #define ETHER_FROM_TSU_ADRH12 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH12) /* ETHER_FROM_TSU_ADRH12 */
287 #define ETHER_FROM_TSU_ADRH13 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH13) /* ETHER_FROM_TSU_ADRH13 */
288 #define ETHER_FROM_TSU_ADRH14 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH14) /* ETHER_FROM_TSU_ADRH14 */
289 #define ETHER_FROM_TSU_ADRH15 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH15) /* ETHER_FROM_TSU_ADRH15 */
290 #define ETHER_FROM_TSU_ADRH16 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH16) /* ETHER_FROM_TSU_ADRH16 */
291 #define ETHER_FROM_TSU_ADRH17 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH17) /* ETHER_FROM_TSU_ADRH17 */
292 #define ETHER_FROM_TSU_ADRH18 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH18) /* ETHER_FROM_TSU_ADRH18 */
293 #define ETHER_FROM_TSU_ADRH19 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH19) /* ETHER_FROM_TSU_ADRH19 */
294 #define ETHER_FROM_TSU_ADRH20 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH20) /* ETHER_FROM_TSU_ADRH20 */
295 #define ETHER_FROM_TSU_ADRH21 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH21) /* ETHER_FROM_TSU_ADRH21 */
296 #define ETHER_FROM_TSU_ADRH22 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH22) /* ETHER_FROM_TSU_ADRH22 */
297 #define ETHER_FROM_TSU_ADRH23 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH23) /* ETHER_FROM_TSU_ADRH23 */
298 #define ETHER_FROM_TSU_ADRH24 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH24) /* ETHER_FROM_TSU_ADRH24 */
299 #define ETHER_FROM_TSU_ADRH25 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH25) /* ETHER_FROM_TSU_ADRH25 */
300 #define ETHER_FROM_TSU_ADRH26 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH26) /* ETHER_FROM_TSU_ADRH26 */
301 #define ETHER_FROM_TSU_ADRH27 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH27) /* ETHER_FROM_TSU_ADRH27 */
302 #define ETHER_FROM_TSU_ADRH28 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH28) /* ETHER_FROM_TSU_ADRH28 */
303 #define ETHER_FROM_TSU_ADRH29 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH29) /* ETHER_FROM_TSU_ADRH29 */
304 #define ETHER_FROM_TSU_ADRH30 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH30) /* ETHER_FROM_TSU_ADRH30 */
305 #define ETHER_FROM_TSU_ADRH31 (*(struct st_ether_from_tsu_adrh0 *)ÐER.TSU_ADRH31) /* ETHER_FROM_TSU_ADRH31 */
307 /* End of channnel array defines of ETHER */
310 #define ETHEREDSR0 ETHER.EDSR0
311 #define ETHERTDLAR0 ETHER.TDLAR0
312 #define ETHERTDFAR0 ETHER.TDFAR0
313 #define ETHERTDFXR0 ETHER.TDFXR0
314 #define ETHERTDFFR0 ETHER.TDFFR0
315 #define ETHERRDLAR0 ETHER.RDLAR0
316 #define ETHERRDFAR0 ETHER.RDFAR0
317 #define ETHERRDFXR0 ETHER.RDFXR0
318 #define ETHERRDFFR0 ETHER.RDFFR0
319 #define ETHEREDMR0 ETHER.EDMR0
320 #define ETHEREDTRR0 ETHER.EDTRR0
321 #define ETHEREDRRR0 ETHER.EDRRR0
322 #define ETHEREESR0 ETHER.EESR0
323 #define ETHEREESIPR0 ETHER.EESIPR0
324 #define ETHERTRSCER0 ETHER.TRSCER0
325 #define ETHERRMFCR0 ETHER.RMFCR0
326 #define ETHERTFTR0 ETHER.TFTR0
327 #define ETHERFDR0 ETHER.FDR0
328 #define ETHERRMCR0 ETHER.RMCR0
329 #define ETHERRPADIR0 ETHER.RPADIR0
330 #define ETHERFCFTR0 ETHER.FCFTR0
331 #define ETHERCSMR ETHER.CSMR
332 #define ETHERCSSBM ETHER.CSSBM
333 #define ETHERCSSMR ETHER.CSSMR
334 #define ETHERECMR0 ETHER.ECMR0
335 #define ETHERRFLR0 ETHER.RFLR0
336 #define ETHERECSR0 ETHER.ECSR0
337 #define ETHERECSIPR0 ETHER.ECSIPR0
338 #define ETHERPIR0 ETHER.PIR0
339 #define ETHERAPR0 ETHER.APR0
340 #define ETHERMPR0 ETHER.MPR0
341 #define ETHERPFTCR0 ETHER.PFTCR0
342 #define ETHERPFRCR0 ETHER.PFRCR0
343 #define ETHERTPAUSER0 ETHER.TPAUSER0
344 #define ETHERMAHR0 ETHER.MAHR0
345 #define ETHERMALR0 ETHER.MALR0
346 #define ETHERCEFCR0 ETHER.CEFCR0
347 #define ETHERFRECR0 ETHER.FRECR0
348 #define ETHERTSFRCR0 ETHER.TSFRCR0
349 #define ETHERTLFRCR0 ETHER.TLFRCR0
350 #define ETHERRFCR0 ETHER.RFCR0
351 #define ETHERMAFCR0 ETHER.MAFCR0
352 #define ETHERARSTR ETHER.ARSTR
353 #define ETHERTSU_CTRST ETHER.TSU_CTRST
354 #define ETHERTSU_VTAG0 ETHER.TSU_VTAG0
355 #define ETHERTSU_ADSBSY ETHER.TSU_ADSBSY
356 #define ETHERTSU_TEN ETHER.TSU_TEN
357 #define ETHERTXNLCR0 ETHER.TXNLCR0
358 #define ETHERTXALCR0 ETHER.TXALCR0
359 #define ETHERRXNLCR0 ETHER.RXNLCR0
360 #define ETHERRXALCR0 ETHER.RXALCR0
361 #define ETHERTSU_ADRH0 ETHER.TSU_ADRH0
362 #define ETHERTSU_ADRL0 ETHER.TSU_ADRL0
363 #define ETHERTSU_ADRH1 ETHER.TSU_ADRH1
364 #define ETHERTSU_ADRL1 ETHER.TSU_ADRL1
365 #define ETHERTSU_ADRH2 ETHER.TSU_ADRH2
366 #define ETHERTSU_ADRL2 ETHER.TSU_ADRL2
367 #define ETHERTSU_ADRH3 ETHER.TSU_ADRH3
368 #define ETHERTSU_ADRL3 ETHER.TSU_ADRL3
369 #define ETHERTSU_ADRH4 ETHER.TSU_ADRH4
370 #define ETHERTSU_ADRL4 ETHER.TSU_ADRL4
371 #define ETHERTSU_ADRH5 ETHER.TSU_ADRH5
372 #define ETHERTSU_ADRL5 ETHER.TSU_ADRL5
373 #define ETHERTSU_ADRH6 ETHER.TSU_ADRH6
374 #define ETHERTSU_ADRL6 ETHER.TSU_ADRL6
375 #define ETHERTSU_ADRH7 ETHER.TSU_ADRH7
376 #define ETHERTSU_ADRL7 ETHER.TSU_ADRL7
377 #define ETHERTSU_ADRH8 ETHER.TSU_ADRH8
378 #define ETHERTSU_ADRL8 ETHER.TSU_ADRL8
379 #define ETHERTSU_ADRH9 ETHER.TSU_ADRH9
380 #define ETHERTSU_ADRL9 ETHER.TSU_ADRL9
381 #define ETHERTSU_ADRH10 ETHER.TSU_ADRH10
382 #define ETHERTSU_ADRL10 ETHER.TSU_ADRL10
383 #define ETHERTSU_ADRH11 ETHER.TSU_ADRH11
384 #define ETHERTSU_ADRL11 ETHER.TSU_ADRL11
385 #define ETHERTSU_ADRH12 ETHER.TSU_ADRH12
386 #define ETHERTSU_ADRL12 ETHER.TSU_ADRL12
387 #define ETHERTSU_ADRH13 ETHER.TSU_ADRH13
388 #define ETHERTSU_ADRL13 ETHER.TSU_ADRL13
389 #define ETHERTSU_ADRH14 ETHER.TSU_ADRH14
390 #define ETHERTSU_ADRL14 ETHER.TSU_ADRL14
391 #define ETHERTSU_ADRH15 ETHER.TSU_ADRH15
392 #define ETHERTSU_ADRL15 ETHER.TSU_ADRL15
393 #define ETHERTSU_ADRH16 ETHER.TSU_ADRH16
394 #define ETHERTSU_ADRL16 ETHER.TSU_ADRL16
395 #define ETHERTSU_ADRH17 ETHER.TSU_ADRH17
396 #define ETHERTSU_ADRL17 ETHER.TSU_ADRL17
397 #define ETHERTSU_ADRH18 ETHER.TSU_ADRH18
398 #define ETHERTSU_ADRL18 ETHER.TSU_ADRL18
399 #define ETHERTSU_ADRH19 ETHER.TSU_ADRH19
400 #define ETHERTSU_ADRL19 ETHER.TSU_ADRL19
401 #define ETHERTSU_ADRH20 ETHER.TSU_ADRH20
402 #define ETHERTSU_ADRL20 ETHER.TSU_ADRL20
403 #define ETHERTSU_ADRH21 ETHER.TSU_ADRH21
404 #define ETHERTSU_ADRL21 ETHER.TSU_ADRL21
405 #define ETHERTSU_ADRH22 ETHER.TSU_ADRH22
406 #define ETHERTSU_ADRL22 ETHER.TSU_ADRL22
407 #define ETHERTSU_ADRH23 ETHER.TSU_ADRH23
408 #define ETHERTSU_ADRL23 ETHER.TSU_ADRL23
409 #define ETHERTSU_ADRH24 ETHER.TSU_ADRH24
410 #define ETHERTSU_ADRL24 ETHER.TSU_ADRL24
411 #define ETHERTSU_ADRH25 ETHER.TSU_ADRH25
412 #define ETHERTSU_ADRL25 ETHER.TSU_ADRL25
413 #define ETHERTSU_ADRH26 ETHER.TSU_ADRH26
414 #define ETHERTSU_ADRL26 ETHER.TSU_ADRL26
415 #define ETHERTSU_ADRH27 ETHER.TSU_ADRH27
416 #define ETHERTSU_ADRL27 ETHER.TSU_ADRL27
417 #define ETHERTSU_ADRH28 ETHER.TSU_ADRH28
418 #define ETHERTSU_ADRL28 ETHER.TSU_ADRL28
419 #define ETHERTSU_ADRH29 ETHER.TSU_ADRH29
420 #define ETHERTSU_ADRL29 ETHER.TSU_ADRL29
421 #define ETHERTSU_ADRH30 ETHER.TSU_ADRH30
422 #define ETHERTSU_ADRL30 ETHER.TSU_ADRL30
423 #define ETHERTSU_ADRH31 ETHER.TSU_ADRH31
424 #define ETHERTSU_ADRL31 ETHER.TSU_ADRL31