tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_i2s.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_i2s.c
   4   * @author  MCD Application Team
   5   * @version V1.0.0
   6   * @date    15-December-2014
   7   * @brief   I2S HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
  10   *           + Initialization and de-initialization functions
  11   *           + IO operation functions
  12   *           + Peripheral State and Errors functions
  13   @verbatim
  14  ===============================================================================
  15                   ##### How to use this driver #####
  16  ===============================================================================
  17  [..]
  18     The I2S HAL driver can be used as follow:
  19
  20     (#) Declare a I2S_HandleTypeDef handle structure.
  21     (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
  22         (##) Enable the SPIx interface clock.
  23         (##) I2S pins configuration:
  24             (+++) Enable the clock for the I2S GPIOs.
  25             (+++) Configure these I2S pins as alternate function.
  26         (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
  27              and HAL_I2S_Receive_IT() APIs).
  28             (+++) Configure the I2Sx interrupt priority.
  29             (+++) Enable the NVIC I2S IRQ handle.
  30         (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
  31              and HAL_I2S_Receive_DMA() APIs:
  32             (+++) Declare a DMA handle structure for the Tx/Rx Channel.
  33             (+++) Enable the DMAx interface clock.
  34             (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
  35             (+++) Configure the DMA Tx/Rx Channel.
  36             (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
  37             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  38                   DMA Tx/Rx Channel.
  39
  40    (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
  41        using HAL_I2S_Init() function.
  42
  43    -@- The specific I2S interrupts (Transmission complete interrupt,
  44        RXNE interrupt and Error Interrupts) will be managed using the macros
  45        __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
  46    -@- The I2SxCLK source is the system clock (provided by the HSI, the HSE or the PLL, and sourcing the AHB clock).
  47        For connectivity line devices, the I2SxCLK source can be either SYSCLK or the PLL3 VCO (2 x PLL3CLK) clock
  48        in order to achieve the maximum accuracy.
  49    -@- Make sure that either:
  50        (+@) External clock source is configured after setting correctly
  51             the define constant HSE_VALUE in the stm32f1xx_hal_conf.h file.
  52
  53     (#) Three mode of operations are available within this driver :
  54
  55    *** Polling mode IO operation ***
  56    =================================
  57    [..]
  58      (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
  59      (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
  60
  61    *** Interrupt mode IO operation ***
  62    ===================================
  63    [..]
  64      (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
  65      (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  66          add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  67      (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  68          add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  69      (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
  70      (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  71          add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  72      (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  73          add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  74      (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  75          add his own code by customization of function pointer HAL_I2S_ErrorCallback
  76
  77    *** DMA mode IO operation ***
  78    ==============================
  79    [..]
  80      (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
  81      (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  82          add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  83      (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  84          add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  85      (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
  86      (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  87          add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  88      (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  89          add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  90      (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  91          add his own code by customization of function pointer HAL_I2S_ErrorCallback
  92      (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
  93      (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
  94      (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
  95
  96    *** I2S HAL driver macros list ***
  97    =============================================
  98    [..]
  99      Below the list of most used macros in USART HAL driver.
 100
 101       (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
 102       (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
 103       (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
 104       (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
 105       (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
 106
 107     [..]
 108       (@) You can refer to the I2S HAL driver header file for more useful macros
 109
 110
 111      *** I2C Workarounds linked to Silicon Limitation ***
 112      ====================================================
 113      [..]
 114        (@) Only the 16-bit mode with no data extension can be used when the I2S
 115            is in Master and used the PCM long synchronization mode.
 116
 117
 118   @endverbatim
 119   ******************************************************************************
 120   * @attention
 121   *
 122   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
 123   *
 124   * Redistribution and use in source and binary forms, with or without modification,
 125   * are permitted provided that the following conditions are met:
 126   *   1. Redistributions of source code must retain the above copyright notice,
 127   *      this list of conditions and the following disclaimer.
 128   *   2. Redistributions in binary form must reproduce the above copyright notice,
 129   *      this list of conditions and the following disclaimer in the documentation
 130   *      and/or other materials provided with the distribution.
 131   *   3. Neither the name of STMicroelectronics nor the names of its contributors
 132   *      may be used to endorse or promote products derived from this software
 133   *      without specific prior written permission.
 134   *
 135   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 136   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 137   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 138   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 139   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 140   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 141   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 142   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 143   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 144   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 145   *
 146   ******************************************************************************
 147   */
 148
 149 /* Includes ------------------------------------------------------------------*/
 150 #include "stm32f1xx_hal.h"
 151
 152 /** @addtogroup STM32F1xx_HAL_Driver
 153   * @{
 154   */
 155
 156 #ifdef HAL_I2S_MODULE_ENABLED
 157 #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
 158
 159 /** @defgroup I2S I2S
 160   * @brief I2S HAL module driver
 161   * @{
 162   */
 163
 164 /* Private typedef -----------------------------------------------------------*/
 165 /* Private define ------------------------------------------------------------*/
 166 /* Private macro -------------------------------------------------------------*/
 167 /* Private variables ---------------------------------------------------------*/
 168 /* Private function prototypes -----------------------------------------------*/
 169 /** @addtogroup I2S_Private_Functions I2S Private Functions
 170   * @{
 171   */
 172 static void               I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
 173 static void               I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
 174 static void               I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
 175 static void               I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
 176 static void               I2S_DMAError(DMA_HandleTypeDef *hdma);
 177 static void               I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
 178 static void               I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
 179 static HAL_StatusTypeDef  I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
 180 /**
 181   * @}
 182   */
 183
 184 /* Exported functions ---------------------------------------------------------*/
 185 /** @defgroup I2S_Exported_Functions I2S Exported Functions
 186   * @{
 187   */
 188
 189 /** @defgroup  I2S_Exported_Functions_Group1 Initialization and de-initialization functions
 190   *  @brief    Initialization and Configuration functions
 191   *
 192 @verbatim
 193  ===============================================================================
 194               ##### Initialization and de-initialization functions #####
 195  ===============================================================================
 196     [..]  This subsection provides a set of functions allowing to initialize and
 197           de-initialiaze the I2Sx peripheral in simplex mode:
 198
 199       (+) User must Implement HAL_I2S_MspInit() function in which he configures
 200           all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
 201
 202       (+) Call the function HAL_I2S_Init() to configure the selected device with
 203           the selected configuration:
 204         (++) Mode
 205         (++) Standard
 206         (++) Data Format
 207         (++) MCLK Output
 208         (++) Audio frequency
 209         (++) Polarity
 210
 211      (+) Call the function HAL_I2S_DeInit() to restore the default configuration
 212          of the selected I2Sx periperal.
 213   @endverbatim
 214   * @{
 215   */
 216
 217 /**
 218   * @brief Initializes the I2S according to the specified parameters
 219   *         in the I2S_InitTypeDef and create the associated handle.
 220   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 221   *         the configuration information for I2S module
 222   * @retval HAL status
 223   */
 224 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
 225 {
 226   uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1;
 227   uint32_t tmp = 0, i2sclk = 0;
 228
 229   /* Check the I2S handle allocation */
 230   if(hi2s == NULL)
 231   {
 232     return HAL_ERROR;
 233   }
 234
 235   /* Check the I2S parameters */
 236   assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
 237   assert_param(IS_I2S_MODE(hi2s->Init.Mode));
 238   assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
 239   assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
 240   assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
 241   assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
 242   assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
 243
 244   if(hi2s->State == HAL_I2S_STATE_RESET)
 245   {
 246     /* Allocate lock resource and initialize it */
 247     hi2s-> Lock = HAL_UNLOCKED;
 248
 249     /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
 250     HAL_I2S_MspInit(hi2s);
 251   }
 252
 253   hi2s->State = HAL_I2S_STATE_BUSY;
 254
 255   /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
 256   if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
 257   {
 258     i2sodd = (uint32_t)0;
 259     i2sdiv = (uint32_t)2;
 260   }
 261   /* If the requested audio frequency is not the default, compute the prescaler */
 262   else
 263   {
 264     /* Check the frame length (For the Prescaler computing) *******************/
 265     if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
 266     {
 267       /* Packet length is 16 bits */
 268       packetlength = 1;
 269     }
 270     else
 271     {
 272       /* Packet length is 32 bits */
 273       packetlength = 2;
 274     }
 275
 276     if(hi2s->Instance == SPI2)
 277     {
 278       /* Get the source clock value: based on SPI2 Instance */
 279       i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S2);
 280     }
 281     else if(hi2s->Instance == SPI3)
 282     {
 283       /* Get the source clock value: based on SPI3 Instance */
 284       i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S3);
 285     }
 286     else
 287     {
 288       /* Get the source clock value: based on System Clock value */
 289       i2sclk = HAL_RCC_GetSysClockFreq();
 290     }
 291     if(i2sclk == 0)
 292     {
 293       return HAL_ERROR;
 294     }
 295
 296     /* Compute the Real divider depending on the MCLK output state, with a floating point */
 297     if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
 298     {
 299       /* MCLK output is enabled */
 300       tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
 301     }
 302     else
 303     {
 304       /* MCLK output is disabled */
 305       tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
 306     }
 307
 308     /* Remove the flatting point */
 309     tmp = tmp / 10;
 310
 311     /* Check the parity of the divider */
 312     i2sodd = (uint32_t)(tmp & (uint32_t)1);
 313
 314     /* Compute the i2sdiv prescaler */
 315     i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
 316
 317     /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
 318     i2sodd = (uint32_t) (i2sodd << 8);
 319   }
 320
 321   /* Test if the divider is 1 or 0 or greater than 0xFF */
 322   if((i2sdiv < 2) || (i2sdiv > 0xFF))
 323   {
 324     /* Set the default values */
 325     i2sdiv = 2;
 326     i2sodd = 0;
 327   }
 328
 329   /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
 330   /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
 331   /* And configure the I2S with the I2S_InitStruct values                      */
 332   MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\
 333                                         SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\
 334                                         SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\
 335                                         SPI_I2SCFGR_I2SE  | SPI_I2SCFGR_I2SMOD),\
 336                                        (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\
 337                                         hi2s->Init.Standard | hi2s->Init.DataFormat |\
 338                                         hi2s->Init.CPOL));
 339
 340   /* Write to SPIx I2SPR register the computed value */
 341   hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
 342
 343   hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 344   hi2s->State= HAL_I2S_STATE_READY;
 345
 346   return HAL_OK;
 347 }
 348
 349 /**
 350   * @brief DeInitializes the I2S peripheral
 351   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 352   *         the configuration information for I2S module
 353   * @retval HAL status
 354   */
 355 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
 356 {
 357   /* Check the I2S handle allocation */
 358   if(hi2s == NULL)
 359   {
 360     return HAL_ERROR;
 361   }
 362
 363   hi2s->State = HAL_I2S_STATE_BUSY;
 364
 365   /* Disable the I2S Peripheral Clock */
 366   __HAL_I2S_DISABLE(hi2s);
 367
 368   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
 369   HAL_I2S_MspDeInit(hi2s);
 370
 371   hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 372   hi2s->State = HAL_I2S_STATE_RESET;
 373
 374   /* Release Lock */
 375   __HAL_UNLOCK(hi2s);
 376
 377   return HAL_OK;
 378 }
 379
 380 /**
 381   * @brief I2S MSP Init
 382   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 383   *         the configuration information for I2S module
 384   * @retval None
 385   */
 386  __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
 387 {
 388   /* NOTE : This function Should not be modified, when the callback is needed,
 389             the HAL_I2S_MspInit could be implemented in the user file
 390    */
 391 }
 392
 393 /**
 394   * @brief I2S MSP DeInit
 395   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 396   *         the configuration information for I2S module
 397   * @retval None
 398   */
 399  __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
 400 {
 401   /* NOTE : This function Should not be modified, when the callback is needed,
 402             the HAL_I2S_MspDeInit could be implemented in the user file
 403    */
 404 }
 405
 406 /**
 407   * @}
 408   */
 409
 410 /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
 411   *  @brief Data transfers functions
 412   *
 413 @verbatim
 414  ===============================================================================
 415                       ##### IO operation functions #####
 416  ===============================================================================
 417     [..]
 418     This subsection provides a set of functions allowing to manage the I2S data
 419     transfers.
 420
 421     (#) There are two modes of transfer:
 422        (++) Blocking mode : The communication is performed in the polling mode.
 423             The status of all data processing is returned by the same function
 424             after finishing transfer.
 425        (++) No-Blocking mode : The communication is performed using Interrupts
 426             or DMA. These functions return the status of the transfer startup.
 427             The end of the data processing will be indicated through the
 428             dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
 429             using DMA mode.
 430
 431     (#) Blocking mode functions are :
 432         (++) HAL_I2S_Transmit()
 433         (++) HAL_I2S_Receive()
 434
 435     (#) No-Blocking mode functions with Interrupt are :
 436         (++) HAL_I2S_Transmit_IT()
 437         (++) HAL_I2S_Receive_IT()
 438
 439     (#) No-Blocking mode functions with DMA are :
 440         (++) HAL_I2S_Transmit_DMA()
 441         (++) HAL_I2S_Receive_DMA()
 442
 443     (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
 444         (++) HAL_I2S_TxCpltCallback()
 445         (++) HAL_I2S_RxCpltCallback()
 446         (++) HAL_I2S_ErrorCallback()
 447
 448 @endverbatim
 449   * @{
 450   */
 451
 452 /**
 453   * @brief Transmit an amount of data in blocking mode
 454   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 455   *         the configuration information for I2S module
 456   * @param pData: a 16-bit pointer to data buffer.
 457   * @param Size: number of data sample to be sent:
 458   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
 459   *       configuration phase, the Size parameter means the number of 16-bit data length
 460   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
 461   *       the Size parameter means the number of 16-bit data length.
 462   * @param  Timeout: Timeout duration
 463   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
 464   *       between Master and Slave(example: audio streaming).
 465   * @retval HAL status
 466   */
 467 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
 468 {
 469   if((pData == NULL ) || (Size == 0))
 470   {
 471     return  HAL_ERROR;
 472   }
 473
 474   /* Process Locked */
 475   __HAL_LOCK(hi2s);
 476
 477   if(hi2s->State == HAL_I2S_STATE_READY)
 478   {
 479     if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
 480       ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
 481     {
 482       hi2s->TxXferSize = (Size << 1);
 483       hi2s->TxXferCount = (Size << 1);
 484     }
 485     else
 486     {
 487       hi2s->TxXferSize = Size;
 488       hi2s->TxXferCount = Size;
 489     }
 490
 491     /* Set state and reset error code */
 492     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 493     hi2s->State = HAL_I2S_STATE_BUSY_TX;
 494     hi2s->pTxBuffPtr = pData;
 495
 496     /* Check if the I2S is already enabled */
 497     if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
 498     {
 499       /* Enable I2S peripheral */
 500       __HAL_I2S_ENABLE(hi2s);
 501     }
 502
 503     while(hi2s->TxXferCount > 0)
 504     {
 505       /* Wait until TXE flag is set */
 506       if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
 507       {
 508         return HAL_TIMEOUT;
 509       }
 510       hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
 511       hi2s->TxXferCount--;
 512
 513       /* Check if an underrun occurs */
 514       if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
 515       {
 516         /* Set the I2S State ready */
 517         hi2s->State = HAL_I2S_STATE_READY;
 518
 519         /* Process Unlocked */
 520         __HAL_UNLOCK(hi2s);
 521
 522         /* Set the error code and execute error callback*/
 523         hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
 524         return HAL_ERROR;
 525       }
 526     }
 527
 528     /* Wait until TXE flag is set, to confirm the end of the transcation */
 529     if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
 530     {
 531       return HAL_TIMEOUT;
 532     }
 533     /* Wait until Busy flag is reset */
 534     if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
 535     {
 536       return HAL_TIMEOUT;
 537     }
 538
 539     hi2s->State = HAL_I2S_STATE_READY;
 540
 541     /* Process Unlocked */
 542     __HAL_UNLOCK(hi2s);
 543
 544     return HAL_OK;
 545   }
 546   else
 547   {
 548     /* Process Unlocked */
 549     __HAL_UNLOCK(hi2s);
 550     return HAL_BUSY;
 551   }
 552 }
 553
 554 /**
 555   * @brief Receive an amount of data in blocking mode
 556   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 557   *         the configuration information for I2S module
 558   * @param pData: a 16-bit pointer to data buffer.
 559   * @param Size: number of data sample to be sent:
 560   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
 561   *       configuration phase, the Size parameter means the number of 16-bit data length
 562   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
 563   *       the Size parameter means the number of 16-bit data length.
 564   * @param Timeout: Timeout duration
 565   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
 566   *       between Master and Slave(example: audio streaming).
 567   * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
 568   *       in continouse way and as the I2S is not disabled at the end of the I2S transaction.
 569   * @retval HAL status
 570   */
 571 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
 572 {
 573   if((pData == NULL ) || (Size == 0))
 574   {
 575     return  HAL_ERROR;
 576   }
 577
 578   /* Process Locked */
 579   __HAL_LOCK(hi2s);
 580
 581   if(hi2s->State == HAL_I2S_STATE_READY)
 582   {
 583     if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
 584       ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
 585     {
 586       hi2s->RxXferSize = (Size << 1);
 587       hi2s->RxXferCount = (Size << 1);
 588     }
 589     else
 590     {
 591       hi2s->RxXferSize = Size;
 592       hi2s->RxXferCount = Size;
 593     }
 594
 595     /* Set state and reset error code */
 596     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 597     hi2s->State = HAL_I2S_STATE_BUSY_RX;
 598     hi2s->pRxBuffPtr = pData;
 599
 600     /* Check if the I2S is already enabled */
 601     if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
 602     {
 603       /* Enable I2S peripheral */
 604       __HAL_I2S_ENABLE(hi2s);
 605     }
 606
 607     /* Receive data */
 608     while(hi2s->RxXferCount > 0)
 609     {
 610       /* Wait until RXNE flag is reset */
 611       if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 612       {
 613         return HAL_TIMEOUT;
 614       }
 615
 616       (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
 617       hi2s->RxXferCount--;
 618
 619       /* Check if an overrun occurs */
 620       if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
 621       {
 622         /* Set the I2S State ready */
 623         hi2s->State = HAL_I2S_STATE_READY;
 624
 625         /* Process Unlocked */
 626         __HAL_UNLOCK(hi2s);
 627
 628         /* Set the error code and execute error callback*/
 629         hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
 630         return HAL_ERROR;
 631       }
 632     }
 633
 634     hi2s->State = HAL_I2S_STATE_READY;
 635
 636     /* Process Unlocked */
 637     __HAL_UNLOCK(hi2s);
 638
 639     return HAL_OK;
 640   }
 641   else
 642   {
 643     /* Process Unlocked */
 644     __HAL_UNLOCK(hi2s);
 645     return HAL_BUSY;
 646   }
 647 }
 648
 649 /**
 650   * @brief Transmit an amount of data in non-blocking mode with Interrupt
 651   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 652   *         the configuration information for I2S module
 653   * @param pData: a 16-bit pointer to data buffer.
 654   * @param Size: number of data sample to be sent:
 655   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
 656   *       configuration phase, the Size parameter means the number of 16-bit data length
 657   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
 658   *       the Size parameter means the number of 16-bit data length.
 659   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
 660   *       between Master and Slave(example: audio streaming).
 661   * @retval HAL status
 662   */
 663 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
 664 {
 665   if((pData == NULL) || (Size == 0))
 666   {
 667     return  HAL_ERROR;
 668   }
 669
 670   /* Process Locked */
 671   __HAL_LOCK(hi2s);
 672
 673   if(hi2s->State == HAL_I2S_STATE_READY)
 674   {
 675     hi2s->pTxBuffPtr = pData;
 676     hi2s->State = HAL_I2S_STATE_BUSY_TX;
 677     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 678
 679     if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
 680       ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
 681     {
 682       hi2s->TxXferSize = (Size << 1);
 683       hi2s->TxXferCount = (Size << 1);
 684     }
 685     else
 686     {
 687       hi2s->TxXferSize = Size;
 688       hi2s->TxXferCount = Size;
 689     }
 690
 691     /* Enable TXE and ERR interrupt */
 692     __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
 693
 694     /* Check if the I2S is already enabled */
 695     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
 696     {
 697       /* Enable I2S peripheral */
 698       __HAL_I2S_ENABLE(hi2s);
 699     }
 700
 701     /* Process Unlocked */
 702     __HAL_UNLOCK(hi2s);
 703
 704     return HAL_OK;
 705   }
 706   else
 707   {
 708     /* Process Unlocked */
 709     __HAL_UNLOCK(hi2s);
 710     return HAL_BUSY;
 711   }
 712 }
 713
 714 /**
 715   * @brief Receive an amount of data in non-blocking mode with Interrupt
 716   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 717   *         the configuration information for I2S module
 718   * @param pData: a 16-bit pointer to the Receive data buffer.
 719   * @param Size: number of data sample to be sent:
 720   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
 721   *       configuration phase, the Size parameter means the number of 16-bit data length
 722   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
 723   *       the Size parameter means the number of 16-bit data length.
 724   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
 725   *       between Master and Slave(example: audio streaming).
 726   * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
 727   * between Master and Slave otherwise the I2S interrupt should be optimized.
 728   * @retval HAL status
 729   */
 730 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
 731 {
 732     if((pData == NULL) || (Size == 0))
 733     {
 734       return  HAL_ERROR;
 735     }
 736
 737   /* Process Locked */
 738   __HAL_LOCK(hi2s);
 739
 740   if(hi2s->State == HAL_I2S_STATE_READY)
 741   {
 742     hi2s->pRxBuffPtr = pData;
 743     hi2s->State = HAL_I2S_STATE_BUSY_RX;
 744     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 745
 746     if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
 747       ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
 748     {
 749       hi2s->RxXferSize = (Size << 1);
 750       hi2s->RxXferCount = (Size << 1);
 751     }
 752     else
 753     {
 754       hi2s->RxXferSize = Size;
 755       hi2s->RxXferCount = Size;
 756     }
 757
 758     /* Enable RXNE and ERR interrupt */
 759     __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
 760
 761     /* Check if the I2S is already enabled */
 762     if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
 763     {
 764       /* Enable I2S peripheral */
 765       __HAL_I2S_ENABLE(hi2s);
 766     }
 767
 768     /* Process Unlocked */
 769     __HAL_UNLOCK(hi2s);
 770
 771     return HAL_OK;
 772   }
 773   else
 774   {
 775     /* Process Unlocked */
 776     __HAL_UNLOCK(hi2s);
 777     return HAL_BUSY;
 778   }
 779 }
 780
 781 /**
 782   * @brief Transmit an amount of data in non-blocking mode with DMA
 783   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 784   *         the configuration information for I2S module
 785   * @param pData: a 16-bit pointer to the Transmit data buffer.
 786   * @param Size: number of data sample to be sent:
 787   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
 788   *       configuration phase, the Size parameter means the number of 16-bit data length
 789   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
 790   *       the Size parameter means the number of 16-bit data length.
 791   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
 792   *       between Master and Slave(example: audio streaming).
 793   * @retval HAL status
 794   */
 795 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
 796 {
 797   if((pData == NULL) || (Size == 0))
 798   {
 799     return  HAL_ERROR;
 800   }
 801
 802   /* Process Locked */
 803   __HAL_LOCK(hi2s);
 804
 805   if(hi2s->State == HAL_I2S_STATE_READY)
 806   {
 807     hi2s->pTxBuffPtr = pData;
 808     hi2s->State = HAL_I2S_STATE_BUSY_TX;
 809     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 810
 811     if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
 812       ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
 813     {
 814       hi2s->TxXferSize = (Size << 1);
 815       hi2s->TxXferCount = (Size << 1);
 816     }
 817     else
 818     {
 819       hi2s->TxXferSize = Size;
 820       hi2s->TxXferCount = Size;
 821     }
 822
 823     /* Set the I2S Tx DMA Half transfert complete callback */
 824     hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
 825
 826     /* Set the I2S Tx DMA transfert complete callback */
 827     hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
 828
 829     /* Set the DMA error callback */
 830     hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
 831
 832     /* Enable the Tx DMA Channel */
 833     HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
 834
 835     /* Check if the I2S is already enabled */
 836     if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
 837     {
 838       /* Enable I2S peripheral */
 839       __HAL_I2S_ENABLE(hi2s);
 840     }
 841
 842     /* Check if the I2S Tx request is already enabled */
 843     if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
 844     {
 845       /* Enable Tx DMA Request */
 846       SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
 847     }
 848
 849     /* Process Unlocked */
 850     __HAL_UNLOCK(hi2s);
 851
 852     return HAL_OK;
 853   }
 854   else
 855   {
 856     /* Process Unlocked */
 857     __HAL_UNLOCK(hi2s);
 858     return HAL_BUSY;
 859   }
 860 }
 861
 862 /**
 863   * @brief Receive an amount of data in non-blocking mode with DMA
 864   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 865   *         the configuration information for I2S module
 866   * @param pData: a 16-bit pointer to the Receive data buffer.
 867   * @param Size: number of data sample to be sent:
 868   * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
 869   *       configuration phase, the Size parameter means the number of 16-bit data length
 870   *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
 871   *       the Size parameter means the number of 16-bit data length.
 872   * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
 873   *       between Master and Slave(example: audio streaming).
 874   * @retval HAL status
 875   */
 876 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
 877 {
 878   if((pData == NULL) || (Size == 0))
 879   {
 880     return  HAL_ERROR;
 881   }
 882
 883   /* Process Locked */
 884   __HAL_LOCK(hi2s);
 885
 886   if(hi2s->State == HAL_I2S_STATE_READY)
 887   {
 888     hi2s->pRxBuffPtr = pData;
 889     hi2s->State = HAL_I2S_STATE_BUSY_RX;
 890     hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
 891
 892     if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
 893       ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
 894     {
 895       hi2s->RxXferSize = (Size << 1);
 896       hi2s->RxXferCount = (Size << 1);
 897     }
 898     else
 899     {
 900       hi2s->RxXferSize = Size;
 901       hi2s->RxXferCount = Size;
 902     }
 903
 904
 905     /* Set the I2S Rx DMA Half transfert complete callback */
 906     hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
 907
 908     /* Set the I2S Rx DMA transfert complete callback */
 909     hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
 910
 911     /* Set the DMA error callback */
 912     hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
 913
 914     /* Check if Master Receiver mode is selected */
 915     if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
 916     {
 917       /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
 918       access to the SPI_SR register. */
 919       __HAL_I2S_CLEAR_OVRFLAG(hi2s);
 920     }
 921
 922     /* Enable the Rx DMA Channel */
 923     HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
 924
 925     /* Check if the I2S is already enabled */
 926     if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
 927     {
 928       /* Enable I2S peripheral */
 929       __HAL_I2S_ENABLE(hi2s);
 930     }
 931
 932      /* Check if the I2S Rx request is already enabled */
 933     if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
 934     {
 935       /* Enable Rx DMA Request */
 936       SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
 937     }
 938
 939     /* Process Unlocked */
 940     __HAL_UNLOCK(hi2s);
 941
 942     return HAL_OK;
 943   }
 944   else
 945   {
 946     /* Process Unlocked */
 947     __HAL_UNLOCK(hi2s);
 948     return HAL_BUSY;
 949   }
 950 }
 951
 952 /**
 953   * @brief Pauses the audio stream playing from the Media.
 954   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 955   *         the configuration information for I2S module
 956   * @retval HAL status
 957   */
 958 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
 959 {
 960   /* Process Locked */
 961   __HAL_LOCK(hi2s);
 962
 963   if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
 964   {
 965     /* Disable the I2S DMA Tx request */
 966     CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
 967   }
 968   else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
 969   {
 970     /* Disable the I2S DMA Rx request */
 971     CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
 972   }
 973
 974   /* Process Unlocked */
 975   __HAL_UNLOCK(hi2s);
 976
 977   return HAL_OK;
 978 }
 979
 980 /**
 981   * @brief Resumes the audio stream playing from the Media.
 982   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
 983   *         the configuration information for I2S module
 984   * @retval HAL status
 985   */
 986 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
 987 {
 988   /* Process Locked */
 989   __HAL_LOCK(hi2s);
 990
 991   if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
 992   {
 993     /* Enable the I2S DMA Tx request */
 994     SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
 995   }
 996   else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
 997   {
 998     /* Enable the I2S DMA Rx request */
 999     SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1000   }
1001
1002   /* If the I2S peripheral is still not enabled, enable it */
1003   if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
1004   {
1005     /* Enable I2S peripheral */
1006     __HAL_I2S_ENABLE(hi2s);
1007   }
1008
1009   /* Process Unlocked */
1010   __HAL_UNLOCK(hi2s);
1011
1012   return HAL_OK;
1013 }
1014
1015 /**
1016   * @brief Resumes the audio stream playing from the Media.
1017   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1018   *         the configuration information for I2S module
1019   * @retval HAL status
1020   */
1021 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
1022 {
1023   /* Process Locked */
1024   __HAL_LOCK(hi2s);
1025
1026   /* Disable the I2S Tx/Rx DMA requests */
1027   CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1028   CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1029
1030   /* Abort the I2S DMA Channel tx */
1031   if(hi2s->hdmatx != NULL)
1032   {
1033     /* Disable the I2S DMA channel */
1034     __HAL_DMA_DISABLE(hi2s->hdmatx);
1035     HAL_DMA_Abort(hi2s->hdmatx);
1036   }
1037   /* Abort the I2S DMA Channel rx */
1038   if(hi2s->hdmarx != NULL)
1039   {
1040     /* Disable the I2S DMA channel */
1041     __HAL_DMA_DISABLE(hi2s->hdmarx);
1042     HAL_DMA_Abort(hi2s->hdmarx);
1043   }
1044
1045   /* Disable I2S peripheral */
1046   __HAL_I2S_DISABLE(hi2s);
1047
1048   hi2s->State = HAL_I2S_STATE_READY;
1049
1050   /* Process Unlocked */
1051   __HAL_UNLOCK(hi2s);
1052
1053   return HAL_OK;
1054 }
1055
1056 /**
1057   * @brief  This function handles I2S interrupt request.
1058   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1059   *         the configuration information for I2S module
1060   * @retval None
1061   */
1062 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
1063 {
1064   uint32_t i2ssr = hi2s->Instance->SR;
1065
1066   /* I2S in mode Receiver ------------------------------------------------*/
1067   if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
1068      ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
1069   {
1070     I2S_Receive_IT(hi2s);
1071     return;
1072   }
1073
1074   /* I2S in mode Tramitter -----------------------------------------------*/
1075   if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
1076   {
1077     I2S_Transmit_IT(hi2s);
1078     return;
1079   }
1080
1081   /* I2S interrupt error -------------------------------------------------*/
1082   if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)
1083   {
1084     /* I2S Overrun error interrupt occured ---------------------------------*/
1085     if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR)
1086     {
1087       /* Disable RXNE and ERR interrupt */
1088       __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1089
1090       /* Set the error code and execute error callback*/
1091       SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
1092     }
1093
1094     /* I2S Underrun error interrupt occured --------------------------------*/
1095     if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR)
1096     {
1097       /* Disable TXE and ERR interrupt */
1098       __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1099
1100       /* Set the error code and execute error callback*/
1101       SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
1102     }
1103
1104     /* Set the I2S State ready */
1105     hi2s->State = HAL_I2S_STATE_READY;
1106     /* Call the Error Callback */
1107     HAL_I2S_ErrorCallback(hi2s);
1108   }
1109 }
1110
1111 /**
1112   * @brief Tx Transfer Half completed callbacks
1113   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1114   *         the configuration information for I2S module
1115   * @retval None
1116   */
1117  __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1118 {
1119   /* NOTE : This function Should not be modified, when the callback is needed,
1120             the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
1121    */
1122 }
1123
1124 /**
1125   * @brief Tx Transfer completed callbacks
1126   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1127   *         the configuration information for I2S module
1128   * @retval None
1129   */
1130  __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
1131 {
1132   /* NOTE : This function Should not be modified, when the callback is needed,
1133             the HAL_I2S_TxCpltCallback could be implemented in the user file
1134    */
1135 }
1136
1137 /**
1138   * @brief Rx Transfer half completed callbacks
1139   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1140   *         the configuration information for I2S module
1141   * @retval None
1142   */
1143 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1144 {
1145   /* NOTE : This function Should not be modified, when the callback is needed,
1146             the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
1147    */
1148 }
1149
1150 /**
1151   * @brief Rx Transfer completed callbacks
1152   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1153   *         the configuration information for I2S module
1154   * @retval None
1155   */
1156 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
1157 {
1158   /* NOTE : This function Should not be modified, when the callback is needed,
1159             the HAL_I2S_RxCpltCallback could be implemented in the user file
1160    */
1161 }
1162
1163 /**
1164   * @brief I2S error callbacks
1165   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1166   *         the configuration information for I2S module
1167   * @retval None
1168   */
1169  __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
1170 {
1171   /* NOTE : This function Should not be modified, when the callback is needed,
1172             the HAL_I2S_ErrorCallback could be implemented in the user file
1173    */
1174 }
1175
1176 /**
1177   * @}
1178   */
1179
1180 /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
1181   *  @brief   Peripheral State functions
1182   *
1183 @verbatim
1184  ===============================================================================
1185                       ##### Peripheral State and Errors functions #####
1186  ===============================================================================
1187     [..]
1188     This subsection permits to get in run-time the status of the peripheral
1189     and the data flow.
1190
1191 @endverbatim
1192   * @{
1193   */
1194
1195 /**
1196   * @brief  Return the I2S state
1197   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1198   *         the configuration information for I2S module
1199   * @retval HAL state
1200   */
1201 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
1202 {
1203   return hi2s->State;
1204 }
1205
1206 /**
1207   * @brief  Return the I2S error code
1208   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1209   *         the configuration information for I2S module
1210   * @retval I2S Error Code
1211   */
1212 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
1213 {
1214   return hi2s->ErrorCode;
1215 }
1216 /**
1217   * @}
1218   */
1219
1220 /**
1221   * @}
1222   */
1223
1224 /* Private functions ---------------------------------------------------------*/
1225 /** @addtogroup I2S_Private_Functions I2S Private Functions
1226   * @{
1227   */
1228 /**
1229   * @brief DMA I2S transmit process complete callback
1230   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1231   *                the configuration information for the specified DMA module.
1232   * @retval None
1233   */
1234 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
1235 {
1236   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1237
1238   if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1239   {
1240     /* Disable Tx DMA Request */
1241     CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1242
1243     hi2s->TxXferCount = 0;
1244     hi2s->State = HAL_I2S_STATE_READY;
1245   }
1246   HAL_I2S_TxCpltCallback(hi2s);
1247 }
1248
1249 /**
1250   * @brief DMA I2S transmit process half complete callback
1251   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1252   *                the configuration information for the specified DMA module.
1253   * @retval None
1254   */
1255 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
1256 {
1257   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1258
1259   HAL_I2S_TxHalfCpltCallback(hi2s);
1260 }
1261
1262 /**
1263   * @brief DMA I2S receive process complete callback
1264   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1265   *                the configuration information for the specified DMA module.
1266   * @retval None
1267   */
1268 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
1269 {
1270   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1271
1272   if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1273   {
1274     /* Disable Rx DMA Request */
1275     CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1276     hi2s->RxXferCount = 0;
1277     hi2s->State = HAL_I2S_STATE_READY;
1278   }
1279   HAL_I2S_RxCpltCallback(hi2s);
1280 }
1281
1282 /**
1283   * @brief DMA I2S receive process half complete callback
1284   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1285   *                the configuration information for the specified DMA module.
1286   * @retval None
1287   */
1288 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1289 {
1290   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1291
1292   HAL_I2S_RxHalfCpltCallback(hi2s);
1293 }
1294
1295 /**
1296   * @brief DMA I2S communication error callback
1297   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1298   *                the configuration information for the specified DMA module.
1299   * @retval None
1300   */
1301 static void I2S_DMAError(DMA_HandleTypeDef *hdma)
1302 {
1303   I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1304
1305   /* Disable Rx and Tx DMA Request */
1306   CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
1307   hi2s->TxXferCount = 0;
1308   hi2s->RxXferCount = 0;
1309
1310   hi2s->State= HAL_I2S_STATE_READY;
1311
1312   /* Set the error code and execute error callback*/
1313   SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
1314   HAL_I2S_ErrorCallback(hi2s);
1315 }
1316
1317 /**
1318   * @brief Transmit an amount of data in non-blocking mode with Interrupt
1319   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1320   *         the configuration information for I2S module
1321   * @retval None
1322   */
1323 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
1324 {
1325   /* Transmit data */
1326   hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
1327   hi2s->TxXferCount--;
1328
1329   if(hi2s->TxXferCount == 0)
1330   {
1331     /* Disable TXE and ERR interrupt */
1332     __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1333
1334     hi2s->State = HAL_I2S_STATE_READY;
1335     HAL_I2S_TxCpltCallback(hi2s);
1336   }
1337 }
1338
1339 /**
1340   * @brief Receive an amount of data in non-blocking mode with Interrupt
1341   * @param hi2s: I2S handle
1342   * @retval None
1343   */
1344 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
1345 {
1346   /* Receive data */
1347   (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
1348   hi2s->RxXferCount--;
1349
1350   if(hi2s->RxXferCount == 0)
1351   {
1352     /* Disable RXNE and ERR interrupt */
1353     __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1354
1355     hi2s->State = HAL_I2S_STATE_READY;
1356     HAL_I2S_RxCpltCallback(hi2s);
1357   }
1358 }
1359
1360
1361 /**
1362   * @brief This function handles I2S Communication Timeout.
1363   * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1364   *         the configuration information for I2S module
1365   * @param Flag: Flag checked
1366   * @param Status: Value of the flag expected
1367   * @param Timeout: Duration of the timeout
1368   * @retval HAL status
1369   */
1370 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
1371 {
1372   uint32_t tickstart = 0;
1373
1374   /* Get tick */
1375   tickstart = HAL_GetTick();
1376
1377   /* Wait until flag is set */
1378   if(Status == RESET)
1379   {
1380     while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
1381     {
1382       if(Timeout != HAL_MAX_DELAY)
1383       {
1384         if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1385         {
1386           /* Set the I2S State ready */
1387           hi2s->State= HAL_I2S_STATE_READY;
1388
1389           /* Process Unlocked */
1390           __HAL_UNLOCK(hi2s);
1391
1392           return HAL_TIMEOUT;
1393         }
1394       }
1395     }
1396   }
1397   else
1398   {
1399     while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
1400     {
1401       if(Timeout != HAL_MAX_DELAY)
1402       {
1403         if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1404         {
1405           /* Set the I2S State ready */
1406           hi2s->State= HAL_I2S_STATE_READY;
1407
1408           /* Process Unlocked */
1409           __HAL_UNLOCK(hi2s);
1410
1411           return HAL_TIMEOUT;
1412         }
1413       }
1414     }
1415   }
1416   return HAL_OK;
1417 }
1418
1419 /**
1420   * @}
1421   */
1422
1423 /**
1424   * @}
1425   */
1426
1427 #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
1428 #endif /* HAL_I2S_MODULE_ENABLED */
1429
1430
1431 /**
1432   * @}
1433   */
1434
1435 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/