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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_STM / TARGET_STM32F3XX / stm32f30x_adc.c
1 /**
2 ******************************************************************************
3 * @file stm32f30x_adc.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 27-February-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Analog to Digital Convertor (ADC) peripheral:
9 * + Initialization and Configuration
10 * + Analog Watchdog configuration
11 * + Temperature Sensor, Vbat & Vrefint (Internal Reference Voltage) management
12 * + Regular Channels Configuration
13 * + Regular Channels DMA Configuration
14 * + Injected channels Configuration
15 * + Interrupts and flags management
16 * + Dual mode configuration
17 *
18 @verbatim
19 ==============================================================================
20 ##### How to use this driver #####
21 ==============================================================================
22 [..]
23 (#) select the ADC clock using the function RCC_ADCCLKConfig()
24 (#) Enable the ADC interface clock using RCC_AHBPeriphClockCmd();
25 (#) ADC pins configuration
26 (++) Enable the clock for the ADC GPIOs using the following function:
27 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOx, ENABLE);
28 (++) Configure these ADC pins in analog mode using GPIO_Init();
29 (#) Configure the ADC conversion resolution, data alignment, external
30 trigger and edge, sequencer lenght and Enable/Disable the continuous mode
31 using the ADC_Init() function.
32 (#) Activate the ADC peripheral using ADC_Cmd() function.
33
34 *** ADC channels group configuration ***
35 ========================================
36 [..]
37 (+) To configure the ADC channels features, use ADC_Init(), ADC_InjectedInit()
38 and/or ADC_RegularChannelConfig() functions.
39 (+) To activate the continuous mode, use the ADC_ContinuousModeCmd()
40 function.
41 (+) To activate the Discontinuous mode, use the ADC_DiscModeCmd() functions.
42 (+) To activate the overrun mode, use the ADC_OverrunModeCmd() functions.
43 (+) To activate the calibration mode, use the ADC_StartCalibration() functions.
44 (+) To read the ADC converted values, use the ADC_GetConversionValue()
45 function.
46
47 *** DMA for ADC channels features configuration ***
48 ===================================================
49 [..]
50 (+) To enable the DMA mode for ADC channels group, use the ADC_DMACmd() function.
51 (+) To configure the DMA transfer request, use ADC_DMAConfig() function.
52
53 @endverbatim
54 *
55 ******************************************************************************
56 * @attention
57 *
58 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
59 *
60 * Redistribution and use in source and binary forms, with or without modification,
61 * are permitted provided that the following conditions are met:
62 * 1. Redistributions of source code must retain the above copyright notice,
63 * this list of conditions and the following disclaimer.
64 * 2. Redistributions in binary form must reproduce the above copyright notice,
65 * this list of conditions and the following disclaimer in the documentation
66 * and/or other materials provided with the distribution.
67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
68 * may be used to endorse or promote products derived from this software
69 * without specific prior written permission.
70 *
71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81 *
82 ******************************************************************************
83 */
84
85 /* Includes ------------------------------------------------------------------*/
86 #include "stm32f30x_adc.h"
87 #include "stm32f30x_rcc.h"
88
89 /** @addtogroup STM32F30x_StdPeriph_Driver
90 * @{
91 */
92
93 /** @defgroup ADC
94 * @brief ADC driver modules
95 * @{
96 */
97
98 /* Private typedef -----------------------------------------------------------*/
99 /* Private define ------------------------------------------------------------*/
100
101 /* CFGR register Mask */
102 #define CFGR_CLEAR_Mask ((uint32_t)0xFDFFC007)
103
104 /* JSQR register Mask */
105 #define JSQR_CLEAR_Mask ((uint32_t)0x00000000)
106
107 /* ADC ADON mask */
108 #define CCR_CLEAR_MASK ((uint32_t)0xFFFC10E0)
109
110 /* ADC JDRx registers offset */
111 #define JDR_Offset ((uint8_t)0x80)
112
113 /* Private macro -------------------------------------------------------------*/
114 /* Private variables ---------------------------------------------------------*/
115 /* Private function prototypes -----------------------------------------------*/
116 /* Private functions ---------------------------------------------------------*/
117
118 /** @defgroup ADC_Private_Functions
119 * @{
120 */
121
122 /** @defgroup ADC_Group1 Initialization and Configuration functions
123 * @brief Initialization and Configuration functions
124 *
125 @verbatim
126 ===============================================================================
127 ##### Initialization and Configuration functions #####
128 ===============================================================================
129 [..]
130 This section provides functions allowing to:
131 (#) Initialize and configure the ADC injected and/or regular channels and dual mode.
132 (#) Management of the calibration process
133 (#) ADC Power-on Power-off
134 (#) Single ended or differential mode
135 (#) Enabling the queue of context and the auto delay mode
136 (#) The number of ADC conversions that will be done using the sequencer for regular
137 channel group
138 (#) Enable or disable the ADC peripheral
139
140 @endverbatim
141 * @{
142 */
143
144 /**
145 * @brief Deinitializes the ADCx peripheral registers to their default reset values.
146 * @param ADCx: where x can be 1, 2,3 or 4 to select the ADC peripheral.
147 * @retval None
148 */
149 void ADC_DeInit(ADC_TypeDef* ADCx)
150 {
151 /* Check the parameters */
152 assert_param(IS_ADC_ALL_PERIPH(ADCx));
153
154
155 if((ADCx == ADC1) || (ADCx == ADC2))
156 {
157 /* Enable ADC1/ADC2 reset state */
158 RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC12, ENABLE);
159 /* Release ADC1/ADC2 from reset state */
160 RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC12, DISABLE);
161 }
162 else if((ADCx == ADC3) || (ADCx == ADC4))
163 {
164 /* Enable ADC3/ADC4 reset state */
165 RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC34, ENABLE);
166 /* Release ADC3/ADC4 from reset state */
167 RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC34, DISABLE);
168 }
169 }
170 /**
171 * @brief Initializes the ADCx peripheral according to the specified parameters
172 * in the ADC_InitStruct.
173 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
174 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
175 * the configuration information for the specified ADC peripheral.
176 * @retval None
177 */
178 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
179 {
180 uint32_t tmpreg1 = 0;
181 /* Check the parameters */
182 assert_param(IS_ADC_ALL_PERIPH(ADCx));
183 assert_param(IS_ADC_CONVMODE(ADC_InitStruct->ADC_ContinuousConvMode));
184 assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution));
185 assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConvEvent));
186 assert_param(IS_EXTERNALTRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigEventEdge));
187 assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
188 assert_param(IS_ADC_OVRUNMODE(ADC_InitStruct->ADC_OverrunMode));
189 assert_param(IS_ADC_AUTOINJECMODE(ADC_InitStruct->ADC_AutoInjMode));
190 assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfRegChannel));
191
192 /*---------------------------- ADCx CFGR Configuration -----------------*/
193 /* Get the ADCx CFGR value */
194 tmpreg1 = ADCx->CFGR;
195 /* Clear SCAN bit */
196 tmpreg1 &= CFGR_CLEAR_Mask;
197 /* Configure ADCx: scan conversion mode */
198 /* Set SCAN bit according to ADC_ScanConvMode value */
199 tmpreg1 |= (uint32_t)ADC_InitStruct->ADC_ContinuousConvMode |
200 ADC_InitStruct->ADC_Resolution|
201 ADC_InitStruct->ADC_ExternalTrigConvEvent|
202 ADC_InitStruct->ADC_ExternalTrigEventEdge|
203 ADC_InitStruct->ADC_DataAlign|
204 ADC_InitStruct->ADC_OverrunMode|
205 ADC_InitStruct->ADC_AutoInjMode;
206
207 /* Write to ADCx CFGR */
208 ADCx->CFGR = tmpreg1;
209
210 /*---------------------------- ADCx SQR1 Configuration -----------------*/
211 /* Get the ADCx SQR1 value */
212 tmpreg1 = ADCx->SQR1;
213 /* Clear L bits */
214 tmpreg1 &= ~(uint32_t)(ADC_SQR1_L);
215 /* Configure ADCx: regular channel sequence length */
216 /* Set L bits according to ADC_NbrOfRegChannel value */
217 tmpreg1 |= (uint32_t) (ADC_InitStruct->ADC_NbrOfRegChannel - 1);
218 /* Write to ADCx SQR1 */
219 ADCx->SQR1 = tmpreg1;
220
221 }
222
223 /**
224 * @brief Fills each ADC_InitStruct member with its default value.
225 * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized.
226 * @retval None
227 */
228 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
229 {
230 /* Reset ADC init structure parameters values */
231 ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
232 ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b;
233 ADC_InitStruct->ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0;
234 ADC_InitStruct->ADC_ExternalTrigEventEdge = ADC_ExternalTrigEventEdge_None;
235 ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
236 ADC_InitStruct->ADC_OverrunMode = DISABLE;
237 ADC_InitStruct->ADC_AutoInjMode = DISABLE;
238 ADC_InitStruct->ADC_NbrOfRegChannel = 1;
239 }
240
241 /**
242 * @brief Initializes the ADCx peripheral according to the specified parameters
243 * in the ADC_InitStruct.
244 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
245 * @param ADC_InjectInitStruct: pointer to an ADC_InjecInitTypeDef structure that contains
246 * the configuration information for the specified ADC injected channel.
247 * @retval None
248 */
249 void ADC_InjectedInit(ADC_TypeDef* ADCx, ADC_InjectedInitTypeDef* ADC_InjectedInitStruct)
250 {
251 uint32_t tmpreg1 = 0;
252 /* Check the parameters */
253 assert_param(IS_ADC_ALL_PERIPH(ADCx));
254 assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent));
255 assert_param(IS_EXTERNALTRIGINJ_EDGE(ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge));
256 assert_param(IS_ADC_INJECTED_LENGTH(ADC_InjectedInitStruct->ADC_NbrOfInjecChannel));
257 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence1));
258 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence2));
259 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence3));
260 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence4));
261
262 /*---------------------------- ADCx JSQR Configuration -----------------*/
263 /* Get the ADCx JSQR value */
264 tmpreg1 = ADCx->JSQR;
265 /* Clear L bits */
266 tmpreg1 &= JSQR_CLEAR_Mask;
267 /* Configure ADCx: Injected channel sequence length, external trigger,
268 external trigger edge and sequences
269 */
270 tmpreg1 = (uint32_t) ((ADC_InjectedInitStruct->ADC_NbrOfInjecChannel - (uint8_t)1) |
271 ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent |
272 ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge |
273 (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence1) << 8) |
274 (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence2) << 14) |
275 (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence3) << 20) |
276 (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence4) << 26));
277 /* Write to ADCx SQR1 */
278 ADCx->JSQR = tmpreg1;
279 }
280
281 /**
282 * @brief Fills each ADC_InjectedInitStruct member with its default value.
283 * @param ADC_InjectedInitStruct : pointer to an ADC_InjectedInitTypeDef structure which will be initialized.
284 * @retval None
285 */
286 void ADC_InjectedStructInit(ADC_InjectedInitTypeDef* ADC_InjectedInitStruct)
287 {
288 ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent = ADC_ExternalTrigInjecConvEvent_0;
289 ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge = ADC_ExternalTrigInjecEventEdge_None;
290 ADC_InjectedInitStruct->ADC_NbrOfInjecChannel = 1;
291 ADC_InjectedInitStruct->ADC_InjecSequence1 = ADC_InjectedChannel_1;
292 ADC_InjectedInitStruct->ADC_InjecSequence2 = ADC_InjectedChannel_1;
293 ADC_InjectedInitStruct->ADC_InjecSequence3 = ADC_InjectedChannel_1;
294 ADC_InjectedInitStruct->ADC_InjecSequence4 = ADC_InjectedChannel_1;
295 }
296
297 /**
298 * @brief Initializes the ADCs peripherals according to the specified parameters
299 * in the ADC_CommonInitStruct.
300 * @param ADCx: where x can be 1 or 4 to select the ADC peripheral.
301 * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure
302 * that contains the configuration information for All ADCs peripherals.
303 * @retval None
304 */
305 void ADC_CommonInit(ADC_TypeDef* ADCx, ADC_CommonInitTypeDef* ADC_CommonInitStruct)
306 {
307 uint32_t tmpreg1 = 0;
308 /* Check the parameters */
309 assert_param(IS_ADC_MODE(ADC_CommonInitStruct->ADC_Mode));
310 assert_param(IS_ADC_CLOCKMODE(ADC_CommonInitStruct->ADC_Clock));
311 assert_param(IS_ADC_DMA_MODE(ADC_CommonInitStruct->ADC_DMAMode));
312 assert_param(IS_ADC_DMA_ACCESS_MODE(ADC_CommonInitStruct->ADC_DMAAccessMode));
313 assert_param(IS_ADC_TWOSAMPLING_DELAY(ADC_CommonInitStruct->ADC_TwoSamplingDelay));
314
315 if((ADCx == ADC1) || (ADCx == ADC2))
316 {
317 /* Get the ADC CCR value */
318 tmpreg1 = ADC1_2->CCR;
319
320 /* Clear MULTI, DELAY, DMA and ADCPRE bits */
321 tmpreg1 &= CCR_CLEAR_MASK;
322 }
323 else
324 {
325 /* Get the ADC CCR value */
326 tmpreg1 = ADC3_4->CCR;
327
328 /* Clear MULTI, DELAY, DMA and ADCPRE bits */
329 tmpreg1 &= CCR_CLEAR_MASK;
330 }
331 /*---------------------------- ADC CCR Configuration -----------------*/
332 /* Configure ADCx: Multi mode, Delay between two sampling time, ADC clock, DMA mode
333 and DMA access mode for dual mode */
334 /* Set MULTI bits according to ADC_Mode value */
335 /* Set CKMODE bits according to ADC_Clock value */
336 /* Set MDMA bits according to ADC_DMAAccessMode value */
337 /* Set DMACFG bits according to ADC_DMAMode value */
338 /* Set DELAY bits according to ADC_TwoSamplingDelay value */
339 tmpreg1 |= (uint32_t)(ADC_CommonInitStruct->ADC_Mode |
340 ADC_CommonInitStruct->ADC_Clock |
341 ADC_CommonInitStruct->ADC_DMAAccessMode |
342 (uint32_t)(ADC_CommonInitStruct->ADC_DMAMode << 12) |
343 (uint32_t)((uint32_t)ADC_CommonInitStruct->ADC_TwoSamplingDelay << 8));
344
345 if((ADCx == ADC1) || (ADCx == ADC2))
346 {
347 /* Write to ADC CCR */
348 ADC1_2->CCR = tmpreg1;
349 }
350 else
351 {
352 /* Write to ADC CCR */
353 ADC3_4->CCR = tmpreg1;
354 }
355 }
356
357 /**
358 * @brief Fills each ADC_CommonInitStruct member with its default value.
359 * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure
360 * which will be initialized.
361 * @retval None
362 */
363 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct)
364 {
365 /* Initialize the ADC_Mode member */
366 ADC_CommonInitStruct->ADC_Mode = ADC_Mode_Independent;
367
368 /* initialize the ADC_Clock member */
369 ADC_CommonInitStruct->ADC_Clock = ADC_Clock_AsynClkMode;
370
371 /* Initialize the ADC_DMAAccessMode member */
372 ADC_CommonInitStruct->ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
373
374 /* Initialize the ADC_DMAMode member */
375 ADC_CommonInitStruct->ADC_DMAMode = ADC_DMAMode_OneShot;
376
377 /* Initialize the ADC_TwoSamplingDelay member */
378 ADC_CommonInitStruct->ADC_TwoSamplingDelay = 0;
379
380 }
381
382 /**
383 * @brief Enables or disables the specified ADC peripheral.
384 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
385 * @param NewState: new state of the ADCx peripheral.
386 * This parameter can be: ENABLE or DISABLE.
387 * @retval None
388 */
389 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
390 {
391 /* Check the parameters */
392 assert_param(IS_ADC_ALL_PERIPH(ADCx));
393 assert_param(IS_FUNCTIONAL_STATE(NewState));
394
395 if (NewState != DISABLE)
396 {
397 /* Set the ADEN bit */
398 ADCx->CR |= ADC_CR_ADEN;
399 }
400 else
401 {
402 /* Disable the selected ADC peripheral: Set the ADDIS bit */
403 ADCx->CR |= ADC_CR_ADDIS;
404 }
405 }
406
407 /**
408 * @brief Starts the selected ADC calibration process.
409 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
410 * @retval None
411 */
412 void ADC_StartCalibration(ADC_TypeDef* ADCx)
413 {
414 /* Check the parameters */
415 assert_param(IS_ADC_ALL_PERIPH(ADCx));
416
417 /* Set the ADCAL bit */
418 ADCx->CR |= ADC_CR_ADCAL;
419 }
420
421 /**
422 * @brief Returns the ADCx calibration value.
423 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
424 * @retval None
425 */
426 uint32_t ADC_GetCalibrationValue(ADC_TypeDef* ADCx)
427 {
428 /* Check the parameters */
429 assert_param(IS_ADC_ALL_PERIPH(ADCx));
430
431 /* Return the selected ADC calibration value */
432 return (uint32_t)ADCx->CALFACT;
433 }
434
435 /**
436 * @brief Sets the ADCx calibration register.
437 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
438 * @retval None
439 */
440 void ADC_SetCalibrationValue(ADC_TypeDef* ADCx, uint32_t ADC_Calibration)
441 {
442 /* Check the parameters */
443 assert_param(IS_ADC_ALL_PERIPH(ADCx));
444
445 /* Set the ADC calibration register value */
446 ADCx->CALFACT = ADC_Calibration;
447 }
448
449 /**
450 * @brief Select the ADC calibration mode.
451 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
452 * @param ADC_CalibrationMode: the ADC calibration mode.
453 * This parameter can be one of the following values:
454 * @arg ADC_CalibrationMode_Single: to select the calibration for single channel
455 * @arg ADC_CalibrationMode_Differential: to select the calibration for differential channel
456 * @retval None
457 */
458 void ADC_SelectCalibrationMode(ADC_TypeDef* ADCx, uint32_t ADC_CalibrationMode)
459 {
460 /* Check the parameters */
461 assert_param(IS_ADC_ALL_PERIPH(ADCx));
462 assert_param(IS_ADC_CALIBRATION_MODE(ADC_CalibrationMode));
463 /* Set or Reset the ADCALDIF bit */
464 ADCx->CR &= (~ADC_CR_ADCALDIF);
465 ADCx->CR |= ADC_CalibrationMode;
466
467 }
468
469 /**
470 * @brief Gets the selected ADC calibration status.
471 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
472 * @retval The new state of ADC calibration (SET or RESET).
473 */
474 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx)
475 {
476 FlagStatus bitstatus = RESET;
477 /* Check the parameters */
478 assert_param(IS_ADC_ALL_PERIPH(ADCx));
479 /* Check the status of CAL bit */
480 if ((ADCx->CR & ADC_CR_ADCAL) != (uint32_t)RESET)
481 {
482 /* CAL bit is set: calibration on going */
483 bitstatus = SET;
484 }
485 else
486 {
487 /* CAL bit is reset: end of calibration */
488 bitstatus = RESET;
489 }
490 /* Return the CAL bit status */
491 return bitstatus;
492 }
493
494 /**
495 * @brief ADC Disable Command.
496 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
497 * @retval None
498 */
499 void ADC_DisableCmd(ADC_TypeDef* ADCx)
500 {
501 /* Check the parameters */
502 assert_param(IS_ADC_ALL_PERIPH(ADCx));
503
504 /* Set the ADDIS bit */
505 ADCx->CR |= ADC_CR_ADDIS;
506 }
507
508
509 /**
510 * @brief Gets the selected ADC disable command Status.
511 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
512 * @retval The new state of ADC ADC disable command (SET or RESET).
513 */
514 FlagStatus ADC_GetDisableCmdStatus(ADC_TypeDef* ADCx)
515 {
516 FlagStatus bitstatus = RESET;
517 /* Check the parameters */
518 assert_param(IS_ADC_ALL_PERIPH(ADCx));
519
520 /* Check the status of ADDIS bit */
521 if ((ADCx->CR & ADC_CR_ADDIS) != (uint32_t)RESET)
522 {
523 /* ADDIS bit is set */
524 bitstatus = SET;
525 }
526 else
527 {
528 /* ADDIS bit is reset */
529 bitstatus = RESET;
530 }
531 /* Return the ADDIS bit status */
532 return bitstatus;
533 }
534
535 /**
536 * @brief Enables or disables the specified ADC Voltage Regulator.
537 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
538 * @param NewState: new state of the ADCx Voltage Regulator.
539 * This parameter can be: ENABLE or DISABLE.
540 * @retval None
541 */
542 void ADC_VoltageRegulatorCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
543 {
544 /* Check the parameters */
545 assert_param(IS_ADC_ALL_PERIPH(ADCx));
546 assert_param(IS_FUNCTIONAL_STATE(NewState));
547
548 /* set the intermediate state before moving the ADC voltage regulator
549 from enable state to disable state or from disable state to enable state */
550 ADCx->CR &= ~(ADC_CR_ADVREGEN);
551
552 if (NewState != DISABLE)
553 {
554 /* Set the ADVREGEN bit 0 */
555 ADCx->CR |= ADC_CR_ADVREGEN_0;
556 }
557 else
558 {
559 /* Set the ADVREGEN bit 1 */
560 ADCx->CR |=ADC_CR_ADVREGEN_1;
561 }
562 }
563
564 /**
565 * @brief Selectes the differential mode for a specific channel
566 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
567 * @param ADC_Channel: the ADC channel to configure for the analog watchdog.
568 * This parameter can be one of the following values:
569 * @arg ADC_Channel_1: ADC Channel1 selected
570 * @arg ADC_Channel_2: ADC Channel2 selected
571 * @arg ADC_Channel_3: ADC Channel3 selected
572 * @arg ADC_Channel_4: ADC Channel4 selected
573 * @arg ADC_Channel_5: ADC Channel5 selected
574 * @arg ADC_Channel_6: ADC Channel6 selected
575 * @arg ADC_Channel_7: ADC Channel7 selected
576 * @arg ADC_Channel_8: ADC Channel8 selected
577 * @arg ADC_Channel_9: ADC Channel9 selected
578 * @arg ADC_Channel_10: ADC Channel10 selected
579 * @arg ADC_Channel_11: ADC Channel11 selected
580 * @arg ADC_Channel_12: ADC Channel12 selected
581 * @arg ADC_Channel_13: ADC Channel13 selected
582 * @arg ADC_Channel_14: ADC Channel14 selected
583 * @note : Channel 15, 16 and 17 are fixed to single-ended inputs mode.
584 * @retval None
585 */
586 void ADC_SelectDifferentialMode(ADC_TypeDef* ADCx, uint8_t ADC_Channel, FunctionalState NewState)
587 {
588 /* Check the parameters */
589 assert_param(IS_ADC_ALL_PERIPH(ADCx));
590 assert_param(IS_ADC_DIFFCHANNEL(ADC_Channel));
591 assert_param(IS_FUNCTIONAL_STATE(NewState));
592
593 if (NewState != DISABLE)
594 {
595 /* Set the DIFSEL bit */
596 ADCx->DIFSEL |= (uint32_t)(1 << ADC_Channel );
597 }
598 else
599 {
600 /* Reset the DIFSEL bit */
601 ADCx->DIFSEL &= ~(uint32_t)(1 << ADC_Channel);
602 }
603 }
604
605 /**
606 * @brief Selects the Queue Of Context Mode for injected channels.
607 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
608 * @param NewState: new state of the Queue Of Context Mode.
609 * This parameter can be: ENABLE or DISABLE.
610 * @retval None
611 */
612 void ADC_SelectQueueOfContextMode(ADC_TypeDef* ADCx, FunctionalState NewState)
613 {
614 /* Check the parameters */
615 assert_param(IS_ADC_ALL_PERIPH(ADCx));
616 assert_param(IS_FUNCTIONAL_STATE(NewState));
617
618 if (NewState != DISABLE)
619 {
620 /* Set the JQM bit */
621 ADCx->CFGR |= (uint32_t)(ADC_CFGR_JQM );
622 }
623 else
624 {
625 /* Reset the JQM bit */
626 ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_JQM);
627 }
628 }
629
630 /**
631 * @brief Selects the ADC Delayed Conversion Mode.
632 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
633 * @param NewState: new state of the ADC Delayed Conversion Mode.
634 * This parameter can be: ENABLE or DISABLE.
635 * @retval None
636 */
637 void ADC_AutoDelayCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
638 {
639 /* Check the parameters */
640 assert_param(IS_ADC_ALL_PERIPH(ADCx));
641 assert_param(IS_FUNCTIONAL_STATE(NewState));
642
643 if (NewState != DISABLE)
644 {
645 /* Set the AUTDLY bit */
646 ADCx->CFGR |= (uint32_t)(ADC_CFGR_AUTDLY );
647 }
648 else
649 {
650 /* Reset the AUTDLY bit */
651 ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_AUTDLY);
652 }
653 }
654
655 /**
656 * @}
657 */
658
659 /** @defgroup ADC_Group2 Analog Watchdog configuration functions
660 * @brief Analog Watchdog configuration functions
661 *
662 @verbatim
663 ===============================================================================
664 ##### Analog Watchdog configuration functions #####
665 ===============================================================================
666
667 [..] This section provides functions allowing to configure the 3 Analog Watchdogs
668 (AWDG1, AWDG2 and AWDG3) in the ADC.
669
670 [..] A typical configuration Analog Watchdog is done following these steps :
671 (#) The ADC guarded channel(s) is (are) selected using the functions:
672 (++) ADC_AnalogWatchdog1SingleChannelConfig().
673 (++) ADC_AnalogWatchdog2SingleChannelConfig().
674 (++) ADC_AnalogWatchdog3SingleChannelConfig().
675
676 (#) The Analog watchdog lower and higher threshold are configured using the functions:
677 (++) ADC_AnalogWatchdog1ThresholdsConfig().
678 (++) ADC_AnalogWatchdog2ThresholdsConfig().
679 (++) ADC_AnalogWatchdog3ThresholdsConfig().
680
681 (#) The Analog watchdog is enabled and configured to enable the check, on one
682 or more channels, using the function:
683 (++) ADC_AnalogWatchdogCmd().
684
685 @endverbatim
686 * @{
687 */
688
689 /**
690 * @brief Enables or disables the analog watchdog on single/all regular
691 * or injected channels
692 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
693 * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration.
694 * This parameter can be one of the following values:
695 * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel
696 * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel
697 * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel
698 * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel
699 * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel
700 * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels
701 * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog
702 * @retval None
703 */
704 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
705 {
706 uint32_t tmpreg = 0;
707 /* Check the parameters */
708 assert_param(IS_ADC_ALL_PERIPH(ADCx));
709 assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
710 /* Get the old register value */
711 tmpreg = ADCx->CFGR;
712 /* Clear AWDEN, AWDENJ and AWDSGL bits */
713 tmpreg &= ~(uint32_t)(ADC_CFGR_AWD1SGL|ADC_CFGR_AWD1EN|ADC_CFGR_JAWD1EN);
714 /* Set the analog watchdog enable mode */
715 tmpreg |= ADC_AnalogWatchdog;
716 /* Store the new register value */
717 ADCx->CFGR = tmpreg;
718 }
719
720 /**
721 * @brief Configures the high and low thresholds of the analog watchdog1.
722 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
723 * @param HighThreshold: the ADC analog watchdog High threshold value.
724 * This parameter must be a 12bit value.
725 * @param LowThreshold: the ADC analog watchdog Low threshold value.
726 * This parameter must be a 12bit value.
727 * @retval None
728 */
729 void ADC_AnalogWatchdog1ThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
730 uint16_t LowThreshold)
731 {
732 /* Check the parameters */
733 assert_param(IS_ADC_ALL_PERIPH(ADCx));
734 assert_param(IS_ADC_THRESHOLD(HighThreshold));
735 assert_param(IS_ADC_THRESHOLD(LowThreshold));
736 /* Set the ADCx high threshold */
737 ADCx->TR1 &= ~(uint32_t)ADC_TR1_HT1;
738 ADCx->TR1 |= (uint32_t)((uint32_t)HighThreshold << 16);
739
740 /* Set the ADCx low threshold */
741 ADCx->TR1 &= ~(uint32_t)ADC_TR1_LT1;
742 ADCx->TR1 |= LowThreshold;
743 }
744
745 /**
746 * @brief Configures the high and low thresholds of the analog watchdog2.
747 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
748 * @param HighThreshold: the ADC analog watchdog High threshold value.
749 * This parameter must be a 8bit value.
750 * @param LowThreshold: the ADC analog watchdog Low threshold value.
751 * This parameter must be a 8bit value.
752 * @retval None
753 */
754 void ADC_AnalogWatchdog2ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold,
755 uint8_t LowThreshold)
756 {
757 /* Check the parameters */
758 assert_param(IS_ADC_ALL_PERIPH(ADCx));
759
760 /* Set the ADCx high threshold */
761 ADCx->TR2 &= ~(uint32_t)ADC_TR2_HT2;
762 ADCx->TR2 |= (uint32_t)((uint32_t)HighThreshold << 16);
763
764 /* Set the ADCx low threshold */
765 ADCx->TR2 &= ~(uint32_t)ADC_TR2_LT2;
766 ADCx->TR2 |= LowThreshold;
767 }
768
769 /**
770 * @brief Configures the high and low thresholds of the analog watchdog3.
771 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
772 * @param HighThreshold: the ADC analog watchdog High threshold value.
773 * This parameter must be a 8bit value.
774 * @param LowThreshold: the ADC analog watchdog Low threshold value.
775 * This parameter must be a 8bit value.
776 * @retval None
777 */
778 void ADC_AnalogWatchdog3ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold,
779 uint8_t LowThreshold)
780 {
781 /* Check the parameters */
782 assert_param(IS_ADC_ALL_PERIPH(ADCx));
783
784 /* Set the ADCx high threshold */
785 ADCx->TR3 &= ~(uint32_t)ADC_TR3_HT3;
786 ADCx->TR3 |= (uint32_t)((uint32_t)HighThreshold << 16);
787
788 /* Set the ADCx low threshold */
789 ADCx->TR3 &= ~(uint32_t)ADC_TR3_LT3;
790 ADCx->TR3 |= LowThreshold;
791 }
792
793 /**
794 * @brief Configures the analog watchdog 2 guarded single channel
795 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
796 * @param ADC_Channel: the ADC channel to configure for the analog watchdog.
797 * This parameter can be one of the following values:
798 * @arg ADC_Channel_1: ADC Channel1 selected
799 * @arg ADC_Channel_2: ADC Channel2 selected
800 * @arg ADC_Channel_3: ADC Channel3 selected
801 * @arg ADC_Channel_4: ADC Channel4 selected
802 * @arg ADC_Channel_5: ADC Channel5 selected
803 * @arg ADC_Channel_6: ADC Channel6 selected
804 * @arg ADC_Channel_7: ADC Channel7 selected
805 * @arg ADC_Channel_8: ADC Channel8 selected
806 * @arg ADC_Channel_9: ADC Channel9 selected
807 * @arg ADC_Channel_10: ADC Channel10 selected
808 * @arg ADC_Channel_11: ADC Channel11 selected
809 * @arg ADC_Channel_12: ADC Channel12 selected
810 * @arg ADC_Channel_13: ADC Channel13 selected
811 * @arg ADC_Channel_14: ADC Channel14 selected
812 * @arg ADC_Channel_15: ADC Channel15 selected
813 * @arg ADC_Channel_16: ADC Channel16 selected
814 * @arg ADC_Channel_17: ADC Channel17 selected
815 * @arg ADC_Channel_18: ADC Channel18 selected
816 * @retval None
817 */
818 void ADC_AnalogWatchdog1SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
819 {
820 uint32_t tmpreg = 0;
821 /* Check the parameters */
822 assert_param(IS_ADC_ALL_PERIPH(ADCx));
823 assert_param(IS_ADC_CHANNEL(ADC_Channel));
824 /* Get the old register value */
825 tmpreg = ADCx->CFGR;
826 /* Clear the Analog watchdog channel select bits */
827 tmpreg &= ~(uint32_t)ADC_CFGR_AWD1CH;
828 /* Set the Analog watchdog channel */
829 tmpreg |= (uint32_t)((uint32_t)ADC_Channel << 26);
830 /* Store the new register value */
831 ADCx->CFGR = tmpreg;
832 }
833
834 /**
835 * @brief Configures the analog watchdog 2 guarded single channel
836 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
837 * @param ADC_Channel: the ADC channel to configure for the analog watchdog.
838 * This parameter can be one of the following values:
839 * @arg ADC_Channel_1: ADC Channel1 selected
840 * @arg ADC_Channel_2: ADC Channel2 selected
841 * @arg ADC_Channel_3: ADC Channel3 selected
842 * @arg ADC_Channel_4: ADC Channel4 selected
843 * @arg ADC_Channel_5: ADC Channel5 selected
844 * @arg ADC_Channel_6: ADC Channel6 selected
845 * @arg ADC_Channel_7: ADC Channel7 selected
846 * @arg ADC_Channel_8: ADC Channel8 selected
847 * @arg ADC_Channel_9: ADC Channel9 selected
848 * @arg ADC_Channel_10: ADC Channel10 selected
849 * @arg ADC_Channel_11: ADC Channel11 selected
850 * @arg ADC_Channel_12: ADC Channel12 selected
851 * @arg ADC_Channel_13: ADC Channel13 selected
852 * @arg ADC_Channel_14: ADC Channel14 selected
853 * @arg ADC_Channel_15: ADC Channel15 selected
854 * @arg ADC_Channel_16: ADC Channel16 selected
855 * @arg ADC_Channel_17: ADC Channel17 selected
856 * @arg ADC_Channel_18: ADC Channel18 selected
857 * @retval None
858 */
859 void ADC_AnalogWatchdog2SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
860 {
861 uint32_t tmpreg = 0;
862 /* Check the parameters */
863 assert_param(IS_ADC_ALL_PERIPH(ADCx));
864 assert_param(IS_ADC_CHANNEL(ADC_Channel));
865 /* Get the old register value */
866 tmpreg = ADCx->AWD2CR;
867 /* Clear the Analog watchdog channel select bits */
868 tmpreg &= ~(uint32_t)ADC_AWD2CR_AWD2CH;
869 /* Set the Analog watchdog channel */
870 tmpreg |= (uint32_t)1 << (ADC_Channel);
871 /* Store the new register value */
872 ADCx->AWD2CR |= tmpreg;
873 }
874
875 /**
876 * @brief Configures the analog watchdog 3 guarded single channel
877 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
878 * @param ADC_Channel: the ADC channel to configure for the analog watchdog.
879 * This parameter can be one of the following values:
880 * @arg ADC_Channel_1: ADC Channel1 selected
881 * @arg ADC_Channel_2: ADC Channel2 selected
882 * @arg ADC_Channel_3: ADC Channel3 selected
883 * @arg ADC_Channel_4: ADC Channel4 selected
884 * @arg ADC_Channel_5: ADC Channel5 selected
885 * @arg ADC_Channel_6: ADC Channel6 selected
886 * @arg ADC_Channel_7: ADC Channel7 selected
887 * @arg ADC_Channel_8: ADC Channel8 selected
888 * @arg ADC_Channel_9: ADC Channel9 selected
889 * @arg ADC_Channel_10: ADC Channel10 selected
890 * @arg ADC_Channel_11: ADC Channel11 selected
891 * @arg ADC_Channel_12: ADC Channel12 selected
892 * @arg ADC_Channel_13: ADC Channel13 selected
893 * @arg ADC_Channel_14: ADC Channel14 selected
894 * @arg ADC_Channel_15: ADC Channel15 selected
895 * @arg ADC_Channel_16: ADC Channel16 selected
896 * @arg ADC_Channel_17: ADC Channel17 selected
897 * @arg ADC_Channel_18: ADC Channel18 selected
898 * @retval None
899 */
900 void ADC_AnalogWatchdog3SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
901 {
902 uint32_t tmpreg = 0;
903 /* Check the parameters */
904 assert_param(IS_ADC_ALL_PERIPH(ADCx));
905 assert_param(IS_ADC_CHANNEL(ADC_Channel));
906 /* Get the old register value */
907 tmpreg = ADCx->AWD3CR;
908 /* Clear the Analog watchdog channel select bits */
909 tmpreg &= ~(uint32_t)ADC_AWD3CR_AWD3CH;
910 /* Set the Analog watchdog channel */
911 tmpreg |= (uint32_t)1 << (ADC_Channel);
912 /* Store the new register value */
913 ADCx->AWD3CR |= tmpreg;
914 }
915
916 /**
917 * @}
918 */
919
920 /** @defgroup ADC_Group3 Temperature Sensor - Vrefint (Internal Reference Voltage) and VBAT management functions
921 * @brief Vbat, Temperature Sensor & Vrefint (Internal Reference Voltage) management function
922 *
923 @verbatim
924 ====================================================================================================
925 ##### Temperature Sensor - Vrefint (Internal Reference Voltage) and VBAT management functions #####
926 ====================================================================================================
927
928 [..] This section provides a function allowing to enable/ disable the internal
929 connections between the ADC and the Vbat/2, Temperature Sensor and the Vrefint source.
930
931 [..] A typical configuration to get the Temperature sensor and Vrefint channels
932 voltages is done following these steps :
933 (#) Enable the internal connection of Vbat/2, Temperature sensor and Vrefint sources
934 with the ADC channels using:
935 (++) ADC_TempSensorCmd()
936 (++) ADC_VrefintCmd()
937 (++) ADC_VbatCmd()
938
939 (#) select the ADC_Channel_TempSensor and/or ADC_Channel_Vrefint and/or ADC_Channel_Vbat using
940 (++) ADC_RegularChannelConfig() or
941 (++) ADC_InjectedInit() functions
942
943 (#) Get the voltage values, using:
944 (++) ADC_GetConversionValue() or
945 (++) ADC_GetInjectedConversionValue().
946
947 @endverbatim
948 * @{
949 */
950
951 /**
952 * @brief Enables or disables the temperature sensor channel.
953 * @param ADCx: where x can be 1 to select the ADC peripheral.
954 * @param NewState: new state of the temperature sensor.
955 * This parameter can be: ENABLE or DISABLE.
956 * @retval None
957 */
958 void ADC_TempSensorCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
959 {
960 /* Check the parameters */
961 assert_param(IS_FUNCTIONAL_STATE(NewState));
962
963 if (NewState != DISABLE)
964 {
965 /* Enable the temperature sensor channel*/
966 ADC1_2->CCR |= ADC12_CCR_TSEN;
967 }
968 else
969 {
970 /* Disable the temperature sensor channel*/
971 ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_TSEN;
972 }
973 }
974
975 /**
976 * @brief Enables or disables the Vrefint channel.
977 * @param ADCx: where x can be 1 or 4 to select the ADC peripheral.
978 * @param NewState: new state of the Vrefint.
979 * This parameter can be: ENABLE or DISABLE.
980 * @retval None
981 */
982 void ADC_VrefintCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
983 {
984 /* Check the parameters */
985 assert_param(IS_ADC_ALL_PERIPH(ADCx));
986 assert_param(IS_FUNCTIONAL_STATE(NewState));
987
988 if((ADCx == ADC1) || (ADCx == ADC2))
989 {
990 if (NewState != DISABLE)
991 {
992 /* Enable the Vrefint channel*/
993 ADC1_2->CCR |= ADC12_CCR_VREFEN;
994 }
995 else
996 {
997 /* Disable the Vrefint channel*/
998 ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_VREFEN;
999 }
1000 }
1001 else
1002 {
1003 if (NewState != DISABLE)
1004 {
1005 /* Enable the Vrefint channel*/
1006 ADC3_4->CCR |= ADC34_CCR_VREFEN;
1007 }
1008 else
1009 {
1010 /* Disable the Vrefint channel*/
1011 ADC3_4->CCR &= ~(uint32_t)ADC34_CCR_VREFEN;
1012 }
1013 }
1014 }
1015
1016 /**
1017 * @brief Enables or disables the Vbat channel.
1018 * @param ADCx: where x can be 1 to select the ADC peripheral.
1019 * @param NewState: new state of the Vbat.
1020 * This parameter can be: ENABLE or DISABLE.
1021 * @retval None
1022 */
1023 void ADC_VbatCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1024 {
1025 /* Check the parameters */
1026 assert_param(IS_FUNCTIONAL_STATE(NewState));
1027
1028 if (NewState != DISABLE)
1029 {
1030 /* Enable the Vbat channel*/
1031 ADC1_2->CCR |= ADC12_CCR_VBATEN;
1032 }
1033 else
1034 {
1035 /* Disable the Vbat channel*/
1036 ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_VBATEN;
1037 }
1038 }
1039
1040 /**
1041 * @}
1042 */
1043
1044 /** @defgroup ADC_Group4 Regular Channels Configuration functions
1045 * @brief Regular Channels Configuration functions
1046 *
1047 @verbatim
1048 ===============================================================================
1049 ##### Channels Configuration functions #####
1050 ===============================================================================
1051
1052 [..] This section provides functions allowing to manage the ADC regular channels.
1053
1054 [..] To configure a regular sequence of channels use:
1055 (#) ADC_RegularChannelConfig()
1056 this fuction allows:
1057 (++) Configure the rank in the regular group sequencer for each channel
1058 (++) Configure the sampling time for each channel
1059
1060 (#) ADC_RegularChannelSequencerLengthConfig() to set the length of the regular sequencer
1061
1062 [..] The regular trigger is configured using the following functions:
1063 (#) ADC_SelectExternalTrigger()
1064 (#) ADC_ExternalTriggerPolarityConfig()
1065
1066 [..] The start and the stop conversion are controlled by:
1067 (#) ADC_StartConversion()
1068 (#) ADC_StopConversion()
1069
1070 [..]
1071 (@)Please Note that the following features for regular channels are configurated
1072 using the ADC_Init() function :
1073 (++) continuous mode activation
1074 (++) Resolution
1075 (++) Data Alignement
1076 (++) Overrun Mode.
1077
1078 [..] Get the conversion data: This subsection provides an important function in
1079 the ADC peripheral since it returns the converted data of the current
1080 regular channel. When the Conversion value is read, the EOC Flag is
1081 automatically cleared.
1082
1083 [..] To configure the discontinous mode, the following functions should be used:
1084 (#) ADC_DiscModeChannelCountConfig() to configure the number of discontinuous channel to be converted.
1085 (#) ADC_DiscModeCmd() to enable the discontinuous mode.
1086
1087 [..] To configure and enable/disable the Channel offset use the functions:
1088 (++) ADC_SetChannelOffset1()
1089 (++) ADC_SetChannelOffset2()
1090 (++) ADC_SetChannelOffset3()
1091 (++) ADC_SetChannelOffset4()
1092 (++) ADC_ChannelOffset1Cmd()
1093 (++) ADC_ChannelOffset2Cmd()
1094 (++) ADC_ChannelOffset3Cmd()
1095 (++) ADC_ChannelOffset4Cmd()
1096
1097 @endverbatim
1098 * @{
1099 */
1100
1101 /**
1102 * @brief Configures for the selected ADC regular channel its corresponding
1103 * rank in the sequencer and its sample time.
1104 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1105 * @param ADC_Channel: the ADC channel to configure.
1106 * This parameter can be one of the following values:
1107 * @arg ADC_Channel_1: ADC Channel1 selected
1108 * @arg ADC_Channel_2: ADC Channel2 selected
1109 * @arg ADC_Channel_3: ADC Channel3 selected
1110 * @arg ADC_Channel_4: ADC Channel4 selected
1111 * @arg ADC_Channel_5: ADC Channel5 selected
1112 * @arg ADC_Channel_6: ADC Channel6 selected
1113 * @arg ADC_Channel_7: ADC Channel7 selected
1114 * @arg ADC_Channel_8: ADC Channel8 selected
1115 * @arg ADC_Channel_9: ADC Channel9 selected
1116 * @arg ADC_Channel_10: ADC Channel10 selected
1117 * @arg ADC_Channel_11: ADC Channel11 selected
1118 * @arg ADC_Channel_12: ADC Channel12 selected
1119 * @arg ADC_Channel_13: ADC Channel13 selected
1120 * @arg ADC_Channel_14: ADC Channel14 selected
1121 * @arg ADC_Channel_15: ADC Channel15 selected
1122 * @arg ADC_Channel_16: ADC Channel16 selected
1123 * @arg ADC_Channel_17: ADC Channel17 selected
1124 * @arg ADC_Channel_18: ADC Channel18 selected
1125 * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16.
1126 * @param ADC_SampleTime: The sample time value to be set for the selected channel.
1127 * This parameter can be one of the following values:
1128 * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
1129 * @arg ADC_SampleTime_2Cycles5: Sample time equal to 2.5 cycles
1130 * @arg ADC_SampleTime_4Cycles5: Sample time equal to 4.5 cycles
1131 * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
1132 * @arg ADC_SampleTime_19Cycles5: Sample time equal to 19.5 cycles
1133 * @arg ADC_SampleTime_61Cycles5: Sample time equal to 61.5 cycles
1134 * @arg ADC_SampleTime_181Cycles5: Sample time equal to 181.5 cycles
1135 * @arg ADC_SampleTime_601Cycles5: Sample time equal to 601.5 cycles
1136 * @retval None
1137 */
1138 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
1139 {
1140 uint32_t tmpreg1 = 0, tmpreg2 = 0;
1141 /* Check the parameters */
1142 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1143 assert_param(IS_ADC_CHANNEL(ADC_Channel));
1144 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
1145
1146 /* Regular sequence configuration */
1147 /* For Rank 1 to 4 */
1148 if (Rank < 5)
1149 {
1150 /* Get the old register value */
1151 tmpreg1 = ADCx->SQR1;
1152 /* Calculate the mask to clear */
1153 tmpreg2 = 0x1F << (6 * (Rank ));
1154 /* Clear the old SQx bits for the selected rank */
1155 tmpreg1 &= ~tmpreg2;
1156 /* Calculate the mask to set */
1157 tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank));
1158 /* Set the SQx bits for the selected rank */
1159 tmpreg1 |= tmpreg2;
1160 /* Store the new register value */
1161 ADCx->SQR1 = tmpreg1;
1162 }
1163 /* For Rank 5 to 9 */
1164 else if (Rank < 10)
1165 {
1166 /* Get the old register value */
1167 tmpreg1 = ADCx->SQR2;
1168 /* Calculate the mask to clear */
1169 tmpreg2 = ADC_SQR2_SQ5 << (6 * (Rank - 5));
1170 /* Clear the old SQx bits for the selected rank */
1171 tmpreg1 &= ~tmpreg2;
1172 /* Calculate the mask to set */
1173 tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 5));
1174 /* Set the SQx bits for the selected rank */
1175 tmpreg1 |= tmpreg2;
1176 /* Store the new register value */
1177 ADCx->SQR2 = tmpreg1;
1178 }
1179 /* For Rank 10 to 14 */
1180 else if (Rank < 15)
1181 {
1182 /* Get the old register value */
1183 tmpreg1 = ADCx->SQR3;
1184 /* Calculate the mask to clear */
1185 tmpreg2 = ADC_SQR3_SQ10 << (6 * (Rank - 10));
1186 /* Clear the old SQx bits for the selected rank */
1187 tmpreg1 &= ~tmpreg2;
1188 /* Calculate the mask to set */
1189 tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 10));
1190 /* Set the SQx bits for the selected rank */
1191 tmpreg1 |= tmpreg2;
1192 /* Store the new register value */
1193 ADCx->SQR3 = tmpreg1;
1194 }
1195 else
1196 {
1197 /* Get the old register value */
1198 tmpreg1 = ADCx->SQR4;
1199 /* Calculate the mask to clear */
1200 tmpreg2 = ADC_SQR3_SQ15 << (6 * (Rank - 15));
1201 /* Clear the old SQx bits for the selected rank */
1202 tmpreg1 &= ~tmpreg2;
1203 /* Calculate the mask to set */
1204 tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 15));
1205 /* Set the SQx bits for the selected rank */
1206 tmpreg1 |= tmpreg2;
1207 /* Store the new register value */
1208 ADCx->SQR4 = tmpreg1;
1209 }
1210
1211 /* Channel sampling configuration */
1212 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
1213 if (ADC_Channel > ADC_Channel_9)
1214 {
1215 /* Get the old register value */
1216 tmpreg1 = ADCx->SMPR2;
1217 /* Calculate the mask to clear */
1218 tmpreg2 = ADC_SMPR2_SMP10 << (3 * (ADC_Channel - 10));
1219 /* Clear the old channel sample time */
1220 ADCx->SMPR2 &= ~tmpreg2;
1221 /* Calculate the mask to set */
1222 ADCx->SMPR2 |= (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
1223
1224 }
1225 else /* ADC_Channel include in ADC_Channel_[0..9] */
1226 {
1227 /* Get the old register value */
1228 tmpreg1 = ADCx->SMPR1;
1229 /* Calculate the mask to clear */
1230 tmpreg2 = ADC_SMPR1_SMP1 << (3 * (ADC_Channel - 1));
1231 /* Clear the old channel sample time */
1232 ADCx->SMPR1 &= ~tmpreg2;
1233 /* Calculate the mask to set */
1234 ADCx->SMPR1 |= (uint32_t)ADC_SampleTime << (3 * (ADC_Channel));
1235 }
1236 }
1237
1238 /**
1239 * @brief Sets the ADC regular channel sequence lenght.
1240 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
1241 * @param SequenceLength: The Regular sequence length. This parameter must be between 1 to 16.
1242 * This parameter can be: ENABLE or DISABLE.
1243 * @retval None
1244 */
1245 void ADC_RegularChannelSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t SequencerLength)
1246 {
1247 /* Check the parameters */
1248 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1249
1250 /* Configure the ADC sequence lenght */
1251 ADCx->SQR1 &= ~(uint32_t)ADC_SQR1_L;
1252 ADCx->SQR1 |= (uint32_t)(SequencerLength - 1);
1253 }
1254
1255 /**
1256 * @brief External Trigger Enable and Polarity Selection for regular channels.
1257 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1258 * @param ADC_ExternalTrigConvEvent: ADC external Trigger source.
1259 * This parameter can be one of the following values:
1260 * @arg ADC_ExternalTrigger_Event0: External trigger event 0
1261 * @arg ADC_ExternalTrigger_Event1: External trigger event 1
1262 * @arg ADC_ExternalTrigger_Event2: External trigger event 2
1263 * @arg ADC_ExternalTrigger_Event3: External trigger event 3
1264 * @arg ADC_ExternalTrigger_Event4: External trigger event 4
1265 * @arg ADC_ExternalTrigger_Event5: External trigger event 5
1266 * @arg ADC_ExternalTrigger_Event6: External trigger event 6
1267 * @arg ADC_ExternalTrigger_Event7: External trigger event 7
1268 * @arg ADC_ExternalTrigger_Event8: External trigger event 8
1269 * @arg ADC_ExternalTrigger_Event9: External trigger event 9
1270 * @arg ADC_ExternalTrigger_Event10: External trigger event 10
1271 * @arg ADC_ExternalTrigger_Event11: External trigger event 11
1272 * @arg ADC_ExternalTrigger_Event12: External trigger event 12
1273 * @arg ADC_ExternalTrigger_Event13: External trigger event 13
1274 * @arg ADC_ExternalTrigger_Event14: External trigger event 14
1275 * @arg ADC_ExternalTrigger_Event15: External trigger event 15
1276 * @param ADC_ExternalTrigEventEdge: ADC external Trigger Polarity.
1277 * This parameter can be one of the following values:
1278 * @arg ADC_ExternalTrigEventEdge_OFF: Hardware trigger detection disabled
1279 * (conversions can be launched by software)
1280 * @arg ADC_ExternalTrigEventEdge_RisingEdge: Hardware trigger detection on the rising edge
1281 * @arg ADC_ExternalTrigEventEdge_FallingEdge: Hardware trigger detection on the falling edge
1282 * @arg ADC_ExternalTrigEventEdge_BothEdge: Hardware trigger detection on both the rising and falling edges
1283 * @retval None
1284 */
1285 void ADC_ExternalTriggerConfig(ADC_TypeDef* ADCx, uint16_t ADC_ExternalTrigConvEvent, uint16_t ADC_ExternalTrigEventEdge)
1286 {
1287 /* Check the parameters */
1288 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1289 assert_param(IS_ADC_EXT_TRIG(ADC_ExternalTrigConvEvent));
1290 assert_param(IS_EXTERNALTRIG_EDGE(ADC_ExternalTrigEventEdge));
1291
1292 /* Disable the selected ADC conversion on external event */
1293 ADCx->CFGR &= ~(ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL);
1294 ADCx->CFGR |= (uint32_t)(ADC_ExternalTrigEventEdge | ADC_ExternalTrigConvEvent);
1295 }
1296
1297 /**
1298 * @brief Enables or disables the selected ADC start conversion .
1299 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1300 * @retval None
1301 */
1302 void ADC_StartConversion(ADC_TypeDef* ADCx)
1303 {
1304 /* Check the parameters */
1305 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1306
1307 /* Set the ADSTART bit */
1308 ADCx->CR |= ADC_CR_ADSTART;
1309 }
1310
1311 /**
1312 * @brief Gets the selected ADC start conversion Status.
1313 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1314 * @retval The new state of ADC start conversion (SET or RESET).
1315 */
1316 FlagStatus ADC_GetStartConversionStatus(ADC_TypeDef* ADCx)
1317 {
1318 FlagStatus bitstatus = RESET;
1319 /* Check the parameters */
1320 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1321 /* Check the status of ADSTART bit */
1322 if ((ADCx->CR & ADC_CR_ADSTART) != (uint32_t)RESET)
1323 {
1324 /* ADSTART bit is set */
1325 bitstatus = SET;
1326 }
1327 else
1328 {
1329 /* ADSTART bit is reset */
1330 bitstatus = RESET;
1331 }
1332 /* Return the ADSTART bit status */
1333 return bitstatus;
1334 }
1335
1336 /**
1337 * @brief Stops the selected ADC ongoing conversion.
1338 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1339 * @retval None
1340 */
1341 void ADC_StopConversion(ADC_TypeDef* ADCx)
1342 {
1343 /* Check the parameters */
1344 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1345
1346 /* Set the ADSTP bit */
1347 ADCx->CR |= ADC_CR_ADSTP;
1348 }
1349
1350
1351 /**
1352 * @brief Configures the discontinuous mode for the selected ADC regular
1353 * group channel.
1354 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1355 * @param Number: specifies the discontinuous mode regular channel
1356 * count value. This number must be between 1 and 8.
1357 * @retval None
1358 */
1359 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
1360 {
1361 uint32_t tmpreg1 = 0;
1362 uint32_t tmpreg2 = 0;
1363 /* Check the parameters */
1364 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1365 assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
1366 /* Get the old register value */
1367 tmpreg1 = ADCx->CFGR;
1368 /* Clear the old discontinuous mode channel count */
1369 tmpreg1 &= ~(uint32_t)(ADC_CFGR_DISCNUM);
1370 /* Set the discontinuous mode channel count */
1371 tmpreg2 = Number - 1;
1372 tmpreg1 |= tmpreg2 << 17;
1373 /* Store the new register value */
1374 ADCx->CFGR = tmpreg1;
1375 }
1376
1377 /**
1378 * @brief Enables or disables the discontinuous mode on regular group
1379 * channel for the specified ADC
1380 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1381 * @param NewState: new state of the selected ADC discontinuous mode
1382 * on regular group channel.
1383 * This parameter can be: ENABLE or DISABLE.
1384 * @retval None
1385 */
1386 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1387 {
1388 /* Check the parameters */
1389 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1390 assert_param(IS_FUNCTIONAL_STATE(NewState));
1391 if (NewState != DISABLE)
1392 {
1393 /* Enable the selected ADC regular discontinuous mode */
1394 ADCx->CFGR |= ADC_CFGR_DISCEN;
1395 }
1396 else
1397 {
1398 /* Disable the selected ADC regular discontinuous mode */
1399 ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_DISCEN);
1400 }
1401 }
1402
1403 /**
1404 * @brief Returns the last ADCx conversion result data for regular channel.
1405 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1406 * @retval The Data conversion value.
1407 */
1408 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
1409 {
1410 /* Check the parameters */
1411 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1412 /* Return the selected ADC conversion value */
1413 return (uint16_t) ADCx->DR;
1414 }
1415
1416 /**
1417 * @brief Returns the last ADC1, ADC2, ADC3 and ADC4 regular conversions results
1418 * data in the selected dual mode.
1419 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1420 * @retval The Data conversion value.
1421 * @note In dual mode, the value returned by this function is as following
1422 * Data[15:0] : these bits contain the regular data of the Master ADC.
1423 * Data[31:16]: these bits contain the regular data of the Slave ADC.
1424 */
1425 uint32_t ADC_GetDualModeConversionValue(ADC_TypeDef* ADCx)
1426 {
1427 uint32_t tmpreg1 = 0;
1428
1429 /* Check the parameters */
1430 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1431
1432 if((ADCx == ADC1) || (ADCx== ADC2))
1433 {
1434 /* Get the dual mode conversion value */
1435 tmpreg1 = ADC1_2->CDR;
1436 }
1437 else
1438 {
1439 /* Get the dual mode conversion value */
1440 tmpreg1 = ADC3_4->CDR;
1441 }
1442 /* Return the dual mode conversion value */
1443 return (uint32_t) tmpreg1;
1444 }
1445
1446 /**
1447 * @brief Set the ADC channels conversion value offset1
1448 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1449 * @param ADC_Channel: the ADC channel to configure.
1450 * This parameter can be one of the following values:
1451 * @arg ADC_Channel_1: ADC Channel1 selected
1452 * @arg ADC_Channel_2: ADC Channel2 selected
1453 * @arg ADC_Channel_3: ADC Channel3 selected
1454 * @arg ADC_Channel_4: ADC Channel4 selected
1455 * @arg ADC_Channel_5: ADC Channel5 selected
1456 * @arg ADC_Channel_6: ADC Channel6 selected
1457 * @arg ADC_Channel_7: ADC Channel7 selected
1458 * @arg ADC_Channel_8: ADC Channel8 selected
1459 * @arg ADC_Channel_9: ADC Channel9 selected
1460 * @arg ADC_Channel_10: ADC Channel10 selected
1461 * @arg ADC_Channel_11: ADC Channel11 selected
1462 * @arg ADC_Channel_12: ADC Channel12 selected
1463 * @arg ADC_Channel_13: ADC Channel13 selected
1464 * @arg ADC_Channel_14: ADC Channel14 selected
1465 * @arg ADC_Channel_15: ADC Channel15 selected
1466 * @arg ADC_Channel_16: ADC Channel16 selected
1467 * @arg ADC_Channel_17: ADC Channel17 selected
1468 * @arg ADC_Channel_18: ADC Channel18 selected
1469 * @param Offset: the offset value for the selected ADC Channel
1470 * This parameter must be a 12bit value.
1471 * @retval None
1472 */
1473 void ADC_SetChannelOffset1(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
1474 {
1475 /* Check the parameters */
1476 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1477 assert_param(IS_ADC_CHANNEL(ADC_Channel));
1478 assert_param(IS_ADC_OFFSET(Offset));
1479
1480 /* Select the Channel */
1481 ADCx->OFR1 &= ~ (uint32_t) ADC_OFR1_OFFSET1_CH;
1482 ADCx->OFR1 |= (uint32_t)((uint32_t)ADC_Channel << 26);
1483
1484 /* Set the data offset */
1485 ADCx->OFR1 &= ~ (uint32_t) ADC_OFR1_OFFSET1;
1486 ADCx->OFR1 |= (uint32_t)Offset;
1487 }
1488
1489 /**
1490 * @brief Set the ADC channels conversion value offset2
1491 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1492 * @param ADC_Channel: the ADC channel to configure.
1493 * This parameter can be one of the following values:
1494 * @arg ADC_Channel_1: ADC Channel1 selected
1495 * @arg ADC_Channel_2: ADC Channel2 selected
1496 * @arg ADC_Channel_3: ADC Channel3 selected
1497 * @arg ADC_Channel_4: ADC Channel4 selected
1498 * @arg ADC_Channel_5: ADC Channel5 selected
1499 * @arg ADC_Channel_6: ADC Channel6 selected
1500 * @arg ADC_Channel_7: ADC Channel7 selected
1501 * @arg ADC_Channel_8: ADC Channel8 selected
1502 * @arg ADC_Channel_9: ADC Channel9 selected
1503 * @arg ADC_Channel_10: ADC Channel10 selected
1504 * @arg ADC_Channel_11: ADC Channel11 selected
1505 * @arg ADC_Channel_12: ADC Channel12 selected
1506 * @arg ADC_Channel_13: ADC Channel13 selected
1507 * @arg ADC_Channel_14: ADC Channel14 selected
1508 * @arg ADC_Channel_15: ADC Channel15 selected
1509 * @arg ADC_Channel_16: ADC Channel16 selected
1510 * @arg ADC_Channel_17: ADC Channel17 selected
1511 * @arg ADC_Channel_18: ADC Channel18 selected
1512 * @param Offset: the offset value for the selected ADC Channel
1513 * This parameter must be a 12bit value.
1514 * @retval None
1515 */
1516 void ADC_SetChannelOffset2(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
1517 {
1518 /* Check the parameters */
1519 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1520 assert_param(IS_ADC_CHANNEL(ADC_Channel));
1521 assert_param(IS_ADC_OFFSET(Offset));
1522
1523 /* Select the Channel */
1524 ADCx->OFR2 &= ~ (uint32_t) ADC_OFR2_OFFSET2_CH;
1525 ADCx->OFR2 |= (uint32_t)((uint32_t)ADC_Channel << 26);
1526
1527 /* Set the data offset */
1528 ADCx->OFR2 &= ~ (uint32_t) ADC_OFR2_OFFSET2;
1529 ADCx->OFR2 |= (uint32_t)Offset;
1530 }
1531
1532 /**
1533 * @brief Set the ADC channels conversion value offset3
1534 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1535 * @param ADC_Channel: the ADC channel to configure.
1536 * This parameter can be one of the following values:
1537 * @arg ADC_Channel_1: ADC Channel1 selected
1538 * @arg ADC_Channel_2: ADC Channel2 selected
1539 * @arg ADC_Channel_3: ADC Channel3 selected
1540 * @arg ADC_Channel_4: ADC Channel4 selected
1541 * @arg ADC_Channel_5: ADC Channel5 selected
1542 * @arg ADC_Channel_6: ADC Channel6 selected
1543 * @arg ADC_Channel_7: ADC Channel7 selected
1544 * @arg ADC_Channel_8: ADC Channel8 selected
1545 * @arg ADC_Channel_9: ADC Channel9 selected
1546 * @arg ADC_Channel_10: ADC Channel10 selected
1547 * @arg ADC_Channel_11: ADC Channel11 selected
1548 * @arg ADC_Channel_12: ADC Channel12 selected
1549 * @arg ADC_Channel_13: ADC Channel13 selected
1550 * @arg ADC_Channel_14: ADC Channel14 selected
1551 * @arg ADC_Channel_15: ADC Channel15 selected
1552 * @arg ADC_Channel_16: ADC Channel16 selected
1553 * @arg ADC_Channel_17: ADC Channel17 selected
1554 * @arg ADC_Channel_18: ADC Channel18 selected
1555 * @param Offset: the offset value for the selected ADC Channel
1556 * This parameter must be a 12bit value.
1557 * @retval None
1558 */
1559 void ADC_SetChannelOffset3(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
1560 {
1561 /* Check the parameters */
1562 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1563 assert_param(IS_ADC_CHANNEL(ADC_Channel));
1564 assert_param(IS_ADC_OFFSET(Offset));
1565
1566 /* Select the Channel */
1567 ADCx->OFR3 &= ~ (uint32_t) ADC_OFR3_OFFSET3_CH;
1568 ADCx->OFR3 |= (uint32_t)((uint32_t)ADC_Channel << 26);
1569
1570 /* Set the data offset */
1571 ADCx->OFR3 &= ~ (uint32_t) ADC_OFR3_OFFSET3;
1572 ADCx->OFR3 |= (uint32_t)Offset;
1573 }
1574
1575 /**
1576 * @brief Set the ADC channels conversion value offset4
1577 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1578 * @param ADC_Channel: the ADC channel to configure.
1579 * This parameter can be one of the following values:
1580 * @arg ADC_Channel_1: ADC Channel1 selected
1581 * @arg ADC_Channel_2: ADC Channel2 selected
1582 * @arg ADC_Channel_3: ADC Channel3 selected
1583 * @arg ADC_Channel_4: ADC Channel4 selected
1584 * @arg ADC_Channel_5: ADC Channel5 selected
1585 * @arg ADC_Channel_6: ADC Channel6 selected
1586 * @arg ADC_Channel_7: ADC Channel7 selected
1587 * @arg ADC_Channel_8: ADC Channel8 selected
1588 * @arg ADC_Channel_9: ADC Channel9 selected
1589 * @arg ADC_Channel_10: ADC Channel10 selected
1590 * @arg ADC_Channel_11: ADC Channel11 selected
1591 * @arg ADC_Channel_12: ADC Channel12 selected
1592 * @arg ADC_Channel_13: ADC Channel13 selected
1593 * @arg ADC_Channel_14: ADC Channel14 selected
1594 * @arg ADC_Channel_15: ADC Channel15 selected
1595 * @arg ADC_Channel_16: ADC Channel16 selected
1596 * @arg ADC_Channel_17: ADC Channel17 selected
1597 * @arg ADC_Channel_18: ADC Channel18 selected
1598 * @param Offset: the offset value for the selected ADC Channel
1599 * This parameter must be a 12bit value.
1600 * @retval None
1601 */
1602 void ADC_SetChannelOffset4(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
1603 {
1604 /* Check the parameters */
1605 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1606 assert_param(IS_ADC_CHANNEL(ADC_Channel));
1607 assert_param(IS_ADC_OFFSET(Offset));
1608
1609 /* Select the Channel */
1610 ADCx->OFR4 &= ~ (uint32_t) ADC_OFR4_OFFSET4_CH;
1611 ADCx->OFR4 |= (uint32_t)((uint32_t)ADC_Channel << 26);
1612
1613 /* Set the data offset */
1614 ADCx->OFR4 &= ~ (uint32_t) ADC_OFR4_OFFSET4;
1615 ADCx->OFR4 |= (uint32_t)Offset;
1616 }
1617
1618 /**
1619 * @brief Enables or disables the Offset1.
1620 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1621 * @param NewState: new state of the ADCx offset1.
1622 * This parameter can be: ENABLE or DISABLE.
1623 * @retval None
1624 */
1625 void ADC_ChannelOffset1Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1626 {
1627 /* Check the parameters */
1628 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1629 assert_param(IS_FUNCTIONAL_STATE(NewState));
1630
1631 if (NewState != DISABLE)
1632 {
1633 /* Set the OFFSET1_EN bit */
1634 ADCx->OFR1 |= ADC_OFR1_OFFSET1_EN;
1635 }
1636 else
1637 {
1638 /* Reset the OFFSET1_EN bit */
1639 ADCx->OFR1 &= ~(ADC_OFR1_OFFSET1_EN);
1640 }
1641 }
1642
1643 /**
1644 * @brief Enables or disables the Offset2.
1645 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1646 * @param NewState: new state of the ADCx offset2.
1647 * This parameter can be: ENABLE or DISABLE.
1648 * @retval None
1649 */
1650 void ADC_ChannelOffset2Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1651 {
1652 /* Check the parameters */
1653 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1654 assert_param(IS_FUNCTIONAL_STATE(NewState));
1655
1656 if (NewState != DISABLE)
1657 {
1658 /* Set the OFFSET1_EN bit */
1659 ADCx->OFR2 |= ADC_OFR2_OFFSET2_EN;
1660 }
1661 else
1662 {
1663 /* Reset the OFFSET1_EN bit */
1664 ADCx->OFR2 &= ~(ADC_OFR2_OFFSET2_EN);
1665 }
1666 }
1667
1668 /**
1669 * @brief Enables or disables the Offset3.
1670 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1671 * @param NewState: new state of the ADCx offset3.
1672 * This parameter can be: ENABLE or DISABLE.
1673 * @retval None
1674 */
1675 void ADC_ChannelOffset3Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1676 {
1677 /* Check the parameters */
1678 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1679 assert_param(IS_FUNCTIONAL_STATE(NewState));
1680
1681 if (NewState != DISABLE)
1682 {
1683 /* Set the OFFSET1_EN bit */
1684 ADCx->OFR3 |= ADC_OFR3_OFFSET3_EN;
1685 }
1686 else
1687 {
1688 /* Reset the OFFSET1_EN bit */
1689 ADCx->OFR3 &= ~(ADC_OFR3_OFFSET3_EN);
1690 }
1691 }
1692
1693 /**
1694 * @brief Enables or disables the Offset4.
1695 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1696 * @param NewState: new state of the ADCx offset4.
1697 * This parameter can be: ENABLE or DISABLE.
1698 * @retval None
1699 */
1700 void ADC_ChannelOffset4Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1701 {
1702 /* Check the parameters */
1703 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1704 assert_param(IS_FUNCTIONAL_STATE(NewState));
1705
1706 if (NewState != DISABLE)
1707 {
1708 /* Set the OFFSET1_EN bit */
1709 ADCx->OFR4 |= ADC_OFR4_OFFSET4_EN;
1710 }
1711 else
1712 {
1713 /* Reset the OFFSET1_EN bit */
1714 ADCx->OFR4 &= ~(ADC_OFR4_OFFSET4_EN);
1715 }
1716 }
1717
1718 /**
1719 * @}
1720 */
1721
1722 /** @defgroup ADC_Group5 Regular Channels DMA Configuration functions
1723 * @brief Regular Channels DMA Configuration functions
1724 *
1725 @verbatim
1726 ===============================================================================
1727 ##### Regular Channels DMA Configuration functions #####
1728 ===============================================================================
1729
1730 [..] This section provides functions allowing to configure the DMA for ADC regular
1731 channels. Since converted regular channel values are stored into a unique data register,
1732 it is useful to use DMA for conversion of more than one regular channel. This
1733 avoids the loss of the data already stored in the ADC Data register.
1734
1735 (#) ADC_DMACmd() function is used to enable the ADC DMA mode, after each
1736 conversion of a regular channel, a DMA request is generated.
1737 (#) ADC_DMAConfig() function is used to select between the one shot DMA mode
1738 or the circular DMA mode
1739
1740 @endverbatim
1741 * @{
1742 */
1743
1744 /**
1745 * @brief Enables or disables the specified ADC DMA request.
1746 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1747 * @param NewState: new state of the selected ADC DMA transfer.
1748 * This parameter can be: ENABLE or DISABLE.
1749 * @retval None
1750 */
1751 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1752 {
1753 /* Check the parameters */
1754 assert_param(IS_ADC_DMA_PERIPH(ADCx));
1755 assert_param(IS_FUNCTIONAL_STATE(NewState));
1756 if (NewState != DISABLE)
1757 {
1758 /* Enable the selected ADC DMA request */
1759 ADCx->CFGR |= ADC_CFGR_DMAEN;
1760 }
1761 else
1762 {
1763 /* Disable the selected ADC DMA request */
1764 ADCx->CFGR &= ~(uint32_t)ADC_CFGR_DMAEN;
1765 }
1766 }
1767
1768 /**
1769 * @brief Configure ADC DMA mode.
1770 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1771 * @param ADC_DMAMode: select the ADC DMA mode.
1772 * This parameter can be one of the following values:
1773 * @arg ADC_DMAMode_OneShot: ADC DMA Oneshot mode
1774 * @arg ADC_DMAMode_Circular: ADC DMA circular mode
1775 * @retval None
1776 */
1777 void ADC_DMAConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMAMode)
1778 {
1779 /* Check the parameters */
1780 assert_param(IS_ADC_DMA_PERIPH(ADCx));
1781 assert_param(IS_ADC_DMA_MODE(ADC_DMAMode));
1782
1783 /* Set or reset the DMACFG bit */
1784 ADCx->CFGR &= ~(uint32_t)ADC_CFGR_DMACFG;
1785 ADCx->CFGR |= ADC_DMAMode;
1786 }
1787
1788 /**
1789 * @}
1790 */
1791
1792 /** @defgroup ADC_Group6 Injected channels Configuration functions
1793 * @brief Injected channels Configuration functions
1794 *
1795 @verbatim
1796 ===============================================================================
1797 ##### Injected channels Configuration functions #####
1798 ===============================================================================
1799
1800 [..] This section provide functions allowing to manage the ADC Injected channels,
1801 it is composed of :
1802
1803 (#) Configuration functions for Injected channels sample time
1804 (#) Functions to start and stop the injected conversion
1805 (#) unction to select the discontinuous mode
1806 (#) Function to get the Specified Injected channel conversion data: This subsection
1807 provides an important function in the ADC peripheral since it returns the
1808 converted data of the specific injected channel.
1809
1810 @endverbatim
1811 * @{
1812 */
1813
1814 /**
1815 * @brief Configures for the selected ADC injected channel its corresponding
1816 * sample time.
1817 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1818 * @param ADC_Channel: the ADC channel to configure.
1819 * This parameter can be one of the following values:
1820 * @arg ADC_InjectedChannel_1: ADC Channel1 selected
1821 * @arg ADC_InjectedChannel_2: ADC Channel2 selected
1822 * @arg ADC_InjectedChannel_3: ADC Channel3 selected
1823 * @arg ADC_InjectedChannel_4: ADC Channel4 selected
1824 * @arg ADC_InjectedChannel_5: ADC Channel5 selected
1825 * @arg ADC_InjectedChannel_6: ADC Channel6 selected
1826 * @arg ADC_InjectedChannel_7: ADC Channel7 selected
1827 * @arg ADC_InjectedChannel_8: ADC Channel8 selected
1828 * @arg ADC_InjectedChannel_9: ADC Channel9 selected
1829 * @arg ADC_InjectedChannel_10: ADC Channel10 selected
1830 * @arg ADC_InjectedChannel_11: ADC Channel11 selected
1831 * @arg ADC_InjectedChannel_12: ADC Channel12 selected
1832 * @arg ADC_InjectedChannel_13: ADC Channel13 selected
1833 * @arg ADC_InjectedChannel_14: ADC Channel14 selected
1834 * @arg ADC_InjectedChannel_15: ADC Channel15 selected
1835 * @arg ADC_InjectedChannel_16: ADC Channel16 selected
1836 * @arg ADC_InjectedChannel_17: ADC Channel17 selected
1837 * @arg ADC_InjectedChannel_18: ADC Channel18 selected
1838 * @param ADC_SampleTime: The sample time value to be set for the selected channel.
1839 * This parameter can be one of the following values:
1840 * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
1841 * @arg ADC_SampleTime_2Cycles5: Sample time equal to 2.5 cycles
1842 * @arg ADC_SampleTime_4Cycles5: Sample time equal to 4.5 cycles
1843 * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
1844 * @arg ADC_SampleTime_19Cycles5: Sample time equal to 19.5 cycles
1845 * @arg ADC_SampleTime_61Cycles5: Sample time equal to 61.5 cycles
1846 * @arg ADC_SampleTime_181Cycles5: Sample time equal to 181.5 cycles
1847 * @arg ADC_SampleTime_601Cycles5: Sample time equal to 601.5 cycles
1848 * @retval None
1849 */
1850 void ADC_InjectedChannelSampleTimeConfig(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint8_t ADC_SampleTime)
1851 {
1852 uint32_t tmpreg1 = 0;
1853 /* Check the parameters */
1854 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1855 assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
1856 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
1857
1858 /* Channel sampling configuration */
1859 /* if ADC_InjectedChannel_10 ... ADC_InjectedChannel_18 is selected */
1860 if (ADC_InjectedChannel > ADC_InjectedChannel_9)
1861 {
1862 /* Calculate the mask to clear */
1863 tmpreg1 = ADC_SMPR2_SMP10 << (3 * (ADC_InjectedChannel - 10));
1864 /* Clear the old channel sample time */
1865 ADCx->SMPR2 &= ~tmpreg1;
1866 /* Calculate the mask to set */
1867 ADCx->SMPR2 |= (uint32_t)ADC_SampleTime << (3 * (ADC_InjectedChannel - 10));
1868
1869 }
1870 else /* ADC_InjectedChannel include in ADC_InjectedChannel_[0..9] */
1871 {
1872 /* Calculate the mask to clear */
1873 tmpreg1 = ADC_SMPR1_SMP1 << (3 * (ADC_InjectedChannel - 1));
1874 /* Clear the old channel sample time */
1875 ADCx->SMPR1 &= ~tmpreg1;
1876 /* Calculate the mask to set */
1877 ADCx->SMPR1 |= (uint32_t)ADC_SampleTime << (3 * (ADC_InjectedChannel));
1878 }
1879 }
1880
1881 /**
1882 * @brief Enables or disables the selected ADC start of the injected
1883 * channels conversion.
1884 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1885 * @param NewState: new state of the selected ADC software start injected conversion.
1886 * This parameter can be: ENABLE or DISABLE.
1887 * @retval None
1888 */
1889 void ADC_StartInjectedConversion(ADC_TypeDef* ADCx)
1890 {
1891 /* Check the parameters */
1892 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1893
1894 /* Enable the selected ADC conversion for injected group on external event and start the selected
1895 ADC injected conversion */
1896 ADCx->CR |= ADC_CR_JADSTART;
1897 }
1898
1899 /**
1900 * @brief Stops the selected ADC ongoing injected conversion.
1901 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1902 * @retval None
1903 */
1904 void ADC_StopInjectedConversion(ADC_TypeDef* ADCx)
1905 {
1906 /* Check the parameters */
1907 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1908
1909 /* Set the JADSTP bit */
1910 ADCx->CR |= ADC_CR_JADSTP;
1911 }
1912
1913 /**
1914 * @brief Gets the selected ADC Software start injected conversion Status.
1915 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1916 * @retval The new state of ADC start injected conversion (SET or RESET).
1917 */
1918 FlagStatus ADC_GetStartInjectedConversionStatus(ADC_TypeDef* ADCx)
1919 {
1920 FlagStatus bitstatus = RESET;
1921 /* Check the parameters */
1922 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1923
1924 /* Check the status of JADSTART bit */
1925 if ((ADCx->CR & ADC_CR_JADSTART) != (uint32_t)RESET)
1926 {
1927 /* JADSTART bit is set */
1928 bitstatus = SET;
1929 }
1930 else
1931 {
1932 /* JADSTART bit is reset */
1933 bitstatus = RESET;
1934 }
1935 /* Return the JADSTART bit status */
1936 return bitstatus;
1937 }
1938
1939 /**
1940 * @brief Enables or disables the selected ADC automatic injected group
1941 * conversion after regular one.
1942 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1943 * @param NewState: new state of the selected ADC auto injected conversion
1944 * This parameter can be: ENABLE or DISABLE.
1945 * @retval None
1946 */
1947 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1948 {
1949 /* Check the parameters */
1950 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1951 assert_param(IS_FUNCTIONAL_STATE(NewState));
1952 if (NewState != DISABLE)
1953 {
1954 /* Enable the selected ADC automatic injected group conversion */
1955 ADCx->CFGR |= ADC_CFGR_JAUTO;
1956 }
1957 else
1958 {
1959 /* Disable the selected ADC automatic injected group conversion */
1960 ADCx->CFGR &= ~ADC_CFGR_JAUTO;
1961 }
1962 }
1963
1964 /**
1965 * @brief Enables or disables the discontinuous mode for injected group
1966 * channel for the specified ADC
1967 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1968 * @param NewState: new state of the selected ADC discontinuous mode
1969 * on injected group channel.
1970 * This parameter can be: ENABLE or DISABLE.
1971 * @retval None
1972 */
1973 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
1974 {
1975 /* Check the parameters */
1976 assert_param(IS_ADC_ALL_PERIPH(ADCx));
1977 assert_param(IS_FUNCTIONAL_STATE(NewState));
1978 if (NewState != DISABLE)
1979 {
1980 /* Enable the selected ADC injected discontinuous mode */
1981 ADCx->CFGR |= ADC_CFGR_JDISCEN;
1982 }
1983 else
1984 {
1985 /* Disable the selected ADC injected discontinuous mode */
1986 ADCx->CFGR &= ~ADC_CFGR_JDISCEN;
1987 }
1988 }
1989
1990 /**
1991 * @brief Returns the ADC injected channel conversion result
1992 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
1993 * @param ADC_InjectedSequence: the converted ADC injected sequence.
1994 * This parameter can be one of the following values:
1995 * @arg ADC_InjectedSequence_1: Injected Sequence1 selected
1996 * @arg ADC_InjectedSequence_2: Injected Sequence2 selected
1997 * @arg ADC_InjectedSequence_3: Injected Sequence3 selected
1998 * @arg ADC_InjectedSequence_4: Injected Sequence4 selected
1999 * @retval The Data conversion value.
2000 */
2001 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedSequence)
2002 {
2003 __IO uint32_t tmp = 0;
2004
2005 /* Check the parameters */
2006 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2007 assert_param(IS_ADC_INJECTED_SEQUENCE(ADC_InjectedSequence));
2008
2009 tmp = (uint32_t)ADCx;
2010 tmp += ((ADC_InjectedSequence - 1 )<< 2) + JDR_Offset;
2011
2012 /* Returns the selected injected channel conversion data value */
2013 return (uint16_t) (*(__IO uint32_t*) tmp);
2014 }
2015
2016 /**
2017 * @}
2018 */
2019
2020 /** @defgroup ADC_Group7 Interrupts and flags management functions
2021 * @brief Interrupts and flags management functions
2022 *
2023 @verbatim
2024 ===============================================================================
2025 ##### Interrupts and flags management functions #####
2026 ===============================================================================
2027
2028 [..] This section provides functions allowing to configure the ADC Interrupts, get
2029 the status and clear flags and Interrupts pending bits.
2030
2031 [..] The ADC provide 11 Interrupts sources and 11 Flags which can be divided into 3 groups:
2032
2033 (#) Flags and Interrupts for ADC regular channels
2034 (##)Flags
2035 (+) ADC_FLAG_RDY: ADC Ready flag
2036 (+) ADC_FLAG_EOSMP: ADC End of Sampling flag
2037 (+) ADC_FLAG_EOC: ADC End of Regular Conversion flag.
2038 (+) ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
2039 (+) ADC_FLAG_OVR: ADC overrun flag
2040
2041 (##) Interrupts
2042 (+) ADC_IT_RDY: ADC Ready interrupt source
2043 (+) ADC_IT_EOSMP: ADC End of Sampling interrupt source
2044 (+) ADC_IT_EOC: ADC End of Regular Conversion interrupt source
2045 (+) ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt
2046 (+) ADC_IT_OVR: ADC overrun interrupt source
2047
2048
2049 (#) Flags and Interrupts for ADC regular channels
2050 (##)Flags
2051 (+) ADC_FLAG_JEOC: ADC Ready flag
2052 (+) ADC_FLAG_JEOS: ADC End of Sampling flag
2053 (+) ADC_FLAG_JQOVF: ADC End of Regular Conversion flag.
2054
2055 (##) Interrupts
2056 (+) ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
2057 (+) ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source
2058 (+) ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source
2059
2060 (#) General Flags and Interrupts for the ADC
2061 (##)Flags
2062 (+) ADC_FLAG_AWD1: ADC Analog watchdog 1 flag
2063 (+) ADC_FLAG_AWD2: ADC Analog watchdog 2 flag
2064 (+) ADC_FLAG_AWD3: ADC Analog watchdog 3 flag
2065
2066 (##)Flags
2067 (+) ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source
2068 (+) ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source
2069 (+) ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source
2070
2071 (#) Flags for ADC dual mode
2072 (##)Flags for Master
2073 (+) ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag
2074 (+) ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag
2075 (+) ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag
2076 (+) ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag
2077 (+) ADC_FLAG_MSTOVR: ADC master overrun flag
2078 (+) ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag
2079 (+) ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag
2080 (+) ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag
2081 (+) ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag
2082 (+) ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag
2083 (+) ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag
2084
2085 (##) Flags for Slave
2086 (+) ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag
2087 (+) ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag
2088 (+) ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag
2089 (+) ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag
2090 (+) ADC_FLAG_SLVOVR: ADC slave overrun flag
2091 (+) ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag
2092 (+) ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag
2093 (+) ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag
2094 (+) ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag
2095 (+) ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag
2096 (+) ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag
2097
2098 The user should identify which mode will be used in his application to manage
2099 the ADC controller events: Polling mode or Interrupt mode.
2100
2101 In the Polling Mode it is advised to use the following functions:
2102 - ADC_GetFlagStatus() : to check if flags events occur.
2103 - ADC_ClearFlag() : to clear the flags events.
2104
2105 In the Interrupt Mode it is advised to use the following functions:
2106 - ADC_ITConfig() : to enable or disable the interrupt source.
2107 - ADC_GetITStatus() : to check if Interrupt occurs.
2108 - ADC_ClearITPendingBit() : to clear the Interrupt pending Bit
2109 (corresponding Flag).
2110 @endverbatim
2111 * @{
2112 */
2113
2114 /**
2115 * @brief Enables or disables the specified ADC interrupts.
2116 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
2117 * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled.
2118 * This parameter can be any combination of the following values:
2119 * @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source
2120 * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
2121 * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
2122 * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
2123 * @arg ADC_IT_OVR: ADC overrun interrupt source
2124 * @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
2125 * @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source
2126 * @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source
2127 * @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source
2128 * @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source
2129 * @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source
2130 * @param NewState: new state of the specified ADC interrupts.
2131 * This parameter can be: ENABLE or DISABLE.
2132 * @retval None
2133 */
2134 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState)
2135 {
2136 /* Check the parameters */
2137 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2138 assert_param(IS_FUNCTIONAL_STATE(NewState));
2139 assert_param(IS_ADC_IT(ADC_IT));
2140
2141 if (NewState != DISABLE)
2142 {
2143 /* Enable the selected ADC interrupts */
2144 ADCx->IER |= ADC_IT;
2145 }
2146 else
2147 {
2148 /* Disable the selected ADC interrupts */
2149 ADCx->IER &= (~(uint32_t)ADC_IT);
2150 }
2151 }
2152
2153 /**
2154 * @brief Checks whether the specified ADC flag is set or not.
2155 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
2156 * @param ADC_FLAG: specifies the flag to check.
2157 * This parameter can be one of the following values:
2158 * @arg ADC_FLAG_RDY: ADC Ready (ADRDY) flag
2159 * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag
2160 * @arg ADC_FLAG_EOC: ADC End of Regular Conversion flag
2161 * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
2162 * @arg ADC_FLAG_OVR: ADC overrun flag
2163 * @arg ADC_FLAG_JEOC: ADC End of Injected Conversion flag
2164 * @arg ADC_FLAG_JEOS: ADC End of Injected sequence of Conversions flag
2165 * @arg ADC_FLAG_AWD1: ADC Analog watchdog 1 flag
2166 * @arg ADC_FLAG_AWD2: ADC Analog watchdog 2 flag
2167 * @arg ADC_FLAG_AWD3: ADC Analog watchdog 3 flag
2168 * @arg ADC_FLAG_JQOVF: ADC Injected Context Queue Overflow flag
2169 * @retval The new state of ADC_FLAG (SET or RESET).
2170 */
2171 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
2172 {
2173 FlagStatus bitstatus = RESET;
2174 /* Check the parameters */
2175 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2176 assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
2177
2178 /* Check the status of the specified ADC flag */
2179 if ((ADCx->ISR & ADC_FLAG) != (uint32_t)RESET)
2180 {
2181 /* ADC_FLAG is set */
2182 bitstatus = SET;
2183 }
2184 else
2185 {
2186 /* ADC_FLAG is reset */
2187 bitstatus = RESET;
2188 }
2189 /* Return the ADC_FLAG status */
2190 return bitstatus;
2191 }
2192
2193 /**
2194 * @brief Clears the ADCx's pending flags.
2195 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
2196 * @param ADC_FLAG: specifies the flag to clear.
2197 * This parameter can be any combination of the following values:
2198 * @arg ADC_FLAG_RDY: ADC Ready (ADRDY) flag
2199 * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag
2200 * @arg ADC_FLAG_EOC: ADC End of Regular Conversion flag
2201 * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
2202 * @arg ADC_FLAG_OVR: ADC overrun flag
2203 * @arg ADC_FLAG_JEOC: ADC End of Injected Conversion flag
2204 * @arg ADC_FLAG_JEOS: ADC End of Injected sequence of Conversions flag
2205 * @arg ADC_FLAG_AWD1: ADC Analog watchdog 1 flag
2206 * @arg ADC_FLAG_AWD2: ADC Analog watchdog 2 flag
2207 * @arg ADC_FLAG_AWD3: ADC Analog watchdog 3 flag
2208 * @arg ADC_FLAG_JQOVF: ADC Injected Context Queue Overflow flag
2209 * @retval None
2210 */
2211 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
2212 {
2213 /* Check the parameters */
2214 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2215 assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
2216 /* Clear the selected ADC flags */
2217 ADCx->ISR = (uint32_t)ADC_FLAG;
2218 }
2219
2220 /**
2221 * @brief Checks whether the specified ADC flag is set or not.
2222 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
2223 * @param ADC_FLAG: specifies the master or slave flag to check.
2224 * This parameter can be one of the following values:
2225 * @arg ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag
2226 * @arg ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag
2227 * @arg ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag
2228 * @arg ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag
2229 * @arg ADC_FLAG_MSTOVR: ADC master overrun flag
2230 * @arg ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag
2231 * @arg ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag
2232 * @arg ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag
2233 * @arg ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag
2234 * @arg ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag
2235 * @arg ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag
2236 * @arg ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag
2237 * @arg ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag
2238 * @arg ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag
2239 * @arg ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag
2240 * @arg ADC_FLAG_SLVOVR: ADC slave overrun flag
2241 * @arg ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag
2242 * @arg ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag
2243 * @arg ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag
2244 * @arg ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag
2245 * @arg ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag
2246 * @arg ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag
2247 * @retval The new state of ADC_FLAG (SET or RESET).
2248 */
2249 FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
2250 {
2251 uint32_t tmpreg1 = 0;
2252 FlagStatus bitstatus = RESET;
2253
2254 /* Check the parameters */
2255 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2256 assert_param(IS_ADC_GET_COMMONFLAG(ADC_FLAG));
2257
2258 if((ADCx == ADC1) || (ADCx == ADC2))
2259 {
2260 tmpreg1 = ADC1_2->CSR;
2261 }
2262 else
2263 {
2264 tmpreg1 = ADC3_4->CSR;
2265 }
2266 /* Check the status of the specified ADC flag */
2267 if ((tmpreg1 & ADC_FLAG) != (uint32_t)RESET)
2268 {
2269 /* ADC_FLAG is set */
2270 bitstatus = SET;
2271 }
2272 else
2273 {
2274 /* ADC_FLAG is reset */
2275 bitstatus = RESET;
2276 }
2277 /* Return the ADC_FLAG status */
2278 return bitstatus;
2279 }
2280
2281 /**
2282 * @brief Clears the ADCx's pending flags.
2283 * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
2284 * @param ADC_FLAG: specifies the master or slave flag to clear.
2285 * This parameter can be one of the following values:
2286 * @arg ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag
2287 * @arg ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag
2288 * @arg ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag
2289 * @arg ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag
2290 * @arg ADC_FLAG_MSTOVR: ADC master overrun flag
2291 * @arg ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag
2292 * @arg ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag
2293 * @arg ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag
2294 * @arg ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag
2295 * @arg ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag
2296 * @arg ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag
2297 * @arg ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag
2298 * @arg ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag
2299 * @arg ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag
2300 * @arg ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag
2301 * @arg ADC_FLAG_SLVOVR: ADC slave overrun flag
2302 * @arg ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag
2303 * @arg ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag
2304 * @arg ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag
2305 * @arg ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag
2306 * @arg ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag
2307 * @arg ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag
2308 * @retval None
2309 */
2310 void ADC_ClearCommonFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
2311 {
2312 /* Check the parameters */
2313 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2314 assert_param(IS_ADC_CLEAR_COMMONFLAG(ADC_FLAG));
2315
2316 if((ADCx == ADC1) || (ADCx == ADC2))
2317 {
2318 /* Clear the selected ADC flags */
2319 ADC1_2->CSR |= (uint32_t)ADC_FLAG;
2320 }
2321 else
2322 {
2323 /* Clear the selected ADC flags */
2324 ADC3_4->CSR |= (uint32_t)ADC_FLAG;
2325 }
2326 }
2327
2328 /**
2329 * @brief Checks whether the specified ADC interrupt has occurred or not.
2330 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
2331 * @param ADC_IT: specifies the ADC interrupt source to check.
2332 * This parameter can be one of the following values:
2333 * @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source
2334 * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
2335 * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
2336 * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
2337 * @arg ADC_IT_OVR: ADC overrun interrupt source
2338 * @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
2339 * @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source
2340 * @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source
2341 * @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source
2342 * @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source
2343 * @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source
2344 * @retval The new state of ADC_IT (SET or RESET).
2345 */
2346 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT)
2347 {
2348 ITStatus bitstatus = RESET;
2349 uint16_t itstatus = 0x0, itenable = 0x0;
2350 /* Check the parameters */
2351 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2352 assert_param(IS_ADC_GET_IT(ADC_IT));
2353
2354 itstatus = ADCx->ISR & ADC_IT;
2355
2356 itenable = ADCx->IER & ADC_IT;
2357 if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET))
2358 {
2359 bitstatus = SET;
2360 }
2361 else
2362 {
2363 bitstatus = RESET;
2364 }
2365 return bitstatus;
2366 }
2367
2368 /**
2369 * @brief Clears the ADCx's interrupt pending bits.
2370 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
2371 * @param ADC_IT: specifies the ADC interrupt pending bit to clear.
2372 * This parameter can be any combination of the following values:
2373 * @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source
2374 * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
2375 * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
2376 * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
2377 * @arg ADC_IT_OVR: ADC overrun interrupt source
2378 * @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
2379 * @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source
2380 * @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source
2381 * @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source
2382 * @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source
2383 * @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source
2384 * @retval None
2385 */
2386 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT)
2387 {
2388 /* Check the parameters */
2389 assert_param(IS_ADC_ALL_PERIPH(ADCx));
2390 assert_param(IS_ADC_IT(ADC_IT));
2391 /* Clear the selected ADC interrupt pending bit */
2392 ADCx->ISR = (uint32_t)ADC_IT;
2393 }
2394
2395 /**
2396 * @}
2397 */
2398
2399 /**
2400 * @}
2401 */
2402
2403 /**
2404 * @}
2405 */
2406
2407 /**
2408 * @}
2409 */
2410
2411 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
custom keymap for my minivan; forked from http://github.com/evangs/tmk_keyboard
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