tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_i2c.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f30x_i2c.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    27-February-2014
   7   * @brief   This file provides firmware functions to manage the following
   8   *          functionalities of the Inter-Integrated circuit (I2C):
   9   *           + Initialization and Configuration
  10   *           + Communications handling
  11   *           + SMBUS management
  12   *           + I2C registers management
  13   *           + Data transfers management
  14   *           + DMA transfers management
  15   *           + Interrupts and flags management
  16   *
  17   *  @verbatim
  18  ============================================================================
  19                      ##### How to use this driver #####
  20  ============================================================================
  21    [..]
  22    (#) Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE)
  23        function for I2C1 or I2C2.
  24    (#) Enable SDA, SCL  and SMBA (when used) GPIO clocks using
  25        RCC_AHBPeriphClockCmd() function.
  26    (#) Peripherals alternate function:
  27        (++) Connect the pin to the desired peripherals' Alternate
  28             Function (AF) using GPIO_PinAFConfig() function.
  29        (++) Configure the desired pin in alternate function by:
  30             GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
  31        (++) Select the type, OpenDrain and speed via
  32             GPIO_PuPd, GPIO_OType and GPIO_Speed members
  33        (++) Call GPIO_Init() function.
  34    (#) Program the Mode, Timing , Own address, Ack and Acknowledged Address
  35        using the I2C_Init() function.
  36    (#) Optionally you can enable/configure the following parameters without
  37        re-initialization (i.e there is no need to call again I2C_Init() function):
  38        (++) Enable the acknowledge feature using I2C_AcknowledgeConfig() function.
  39        (++) Enable the dual addressing mode using I2C_DualAddressCmd() function.
  40        (++) Enable the general call using the I2C_GeneralCallCmd() function.
  41        (++) Enable the clock stretching using I2C_StretchClockCmd() function.
  42        (++) Enable the PEC Calculation using I2C_CalculatePEC() function.
  43        (++) For SMBus Mode:
  44             (+++) Enable the SMBusAlert pin using I2C_SMBusAlertCmd() function.
  45    (#) Enable the NVIC and the corresponding interrupt using the function
  46        I2C_ITConfig() if you need to use interrupt mode.
  47    (#) When using the DMA mode
  48       (++) Configure the DMA using DMA_Init() function.
  49       (++) Active the needed channel Request using I2C_DMACmd() function.
  50    (#) Enable the I2C using the I2C_Cmd() function.
  51    (#) Enable the DMA using the DMA_Cmd() function when using DMA mode in the
  52        transfers.
  53    [..]
  54    (@) When using I2C in Fast Mode Plus, SCL and SDA pin 20mA current drive capability
  55        must be enabled by setting the driving capability control bit in SYSCFG.
  56
  57     @endverbatim
  58   ******************************************************************************
  59   * @attention
  60   *
  61   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  62   *
  63   * Redistribution and use in source and binary forms, with or without modification,
  64   * are permitted provided that the following conditions are met:
  65   *   1. Redistributions of source code must retain the above copyright notice,
  66   *      this list of conditions and the following disclaimer.
  67   *   2. Redistributions in binary form must reproduce the above copyright notice,
  68   *      this list of conditions and the following disclaimer in the documentation
  69   *      and/or other materials provided with the distribution.
  70   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  71   *      may be used to endorse or promote products derived from this software
  72   *      without specific prior written permission.
  73   *
  74   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  75   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  76   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  77   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  78   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  79   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  80   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  81   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  82   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  83   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  84   *
  85   ******************************************************************************
  86   */
  87
  88 /* Includes ------------------------------------------------------------------*/
  89 #include "stm32f30x_i2c.h"
  90 #include "stm32f30x_rcc.h"
  91
  92 /** @addtogroup STM32F30x_StdPeriph_Driver
  93   * @{
  94   */
  95
  96 /** @defgroup I2C
  97   * @brief I2C driver modules
  98   * @{
  99   */
 100
 101 /* Private typedef -----------------------------------------------------------*/
 102 /* Private define ------------------------------------------------------------*/
 103
 104 #define CR1_CLEAR_MASK          ((uint32_t)0x00CFE0FF)  /*<! I2C CR1 clear register Mask */
 105 #define CR2_CLEAR_MASK          ((uint32_t)0x07FF7FFF)  /*<! I2C CR2 clear register Mask */
 106 #define TIMING_CLEAR_MASK       ((uint32_t)0xF0FFFFFF)  /*<! I2C TIMING clear register Mask */
 107 #define ERROR_IT_MASK           ((uint32_t)0x00003F00)  /*<! I2C Error interrupt register Mask */
 108 #define TC_IT_MASK              ((uint32_t)0x000000C0)  /*<! I2C TC interrupt register Mask */
 109
 110 /* Private macro -------------------------------------------------------------*/
 111 /* Private variables ---------------------------------------------------------*/
 112 /* Private function prototypes -----------------------------------------------*/
 113 /* Private functions ---------------------------------------------------------*/
 114
 115 /** @defgroup I2C_Private_Functions
 116   * @{
 117   */
 118
 119
 120 /** @defgroup I2C_Group1 Initialization and Configuration functions
 121  *  @brief   Initialization and Configuration functions
 122  *
 123 @verbatim
 124  ===============================================================================
 125            ##### Initialization and Configuration functions #####
 126  ===============================================================================
 127     [..] This section provides a set of functions allowing to initialize the I2C Mode,
 128          I2C Timing, I2C filters, I2C Addressing mode, I2C OwnAddress1.
 129
 130     [..] The I2C_Init() function follows the I2C configuration procedures (these procedures
 131          are available in reference manual).
 132
 133     [..] When the Software Reset is performed using I2C_SoftwareResetCmd() function, the internal
 134          states machines are reset and communication control bits, as well as status bits come
 135          back to their reset value.
 136
 137     [..] Before enabling Stop mode using I2C_StopModeCmd() I2C Clock source must be set to
 138          HSI and Digital filters must be disabled.
 139
 140     [..] Before enabling Own Address 2 via I2C_DualAddressCmd() function, OA2 and mask should be
 141          configured using I2C_OwnAddress2Config() function.
 142
 143     [..] I2C_SlaveByteControlCmd() enable Slave byte control that allow user to get control of
 144          each byte in slave mode when NBYTES is set to 0x01.
 145
 146 @endverbatim
 147   * @{
 148   */
 149
 150 /**
 151   * @brief  Deinitializes the I2Cx peripheral registers to their default reset values.
 152   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 153   * @retval None
 154   */
 155 void I2C_DeInit(I2C_TypeDef* I2Cx)
 156 {
 157   /* Check the parameters */
 158   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 159
 160   if (I2Cx == I2C1)
 161   {
 162     /* Enable I2C1 reset state */
 163     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
 164     /* Release I2C1 from reset state */
 165     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
 166   }
 167   else
 168   {
 169     /* Enable I2C2 reset state */
 170     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
 171     /* Release I2C2 from reset state */
 172     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
 173   }
 174 }
 175
 176 /**
 177   * @brief  Initializes the I2Cx peripheral according to the specified
 178   *         parameters in the I2C_InitStruct.
 179   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 180   * @param  I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
 181   *         contains the configuration information for the specified I2C peripheral.
 182   * @retval None
 183   */
 184 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
 185 {
 186   uint32_t tmpreg = 0;
 187
 188   /* Check the parameters */
 189   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 190   assert_param(IS_I2C_ANALOG_FILTER(I2C_InitStruct->I2C_AnalogFilter));
 191   assert_param(IS_I2C_DIGITAL_FILTER(I2C_InitStruct->I2C_DigitalFilter));
 192   assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
 193   assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
 194   assert_param(IS_I2C_ACK(I2C_InitStruct->I2C_Ack));
 195   assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
 196
 197   /* Disable I2Cx Peripheral */
 198   I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
 199
 200   /*---------------------------- I2Cx FILTERS Configuration ------------------*/
 201   /* Get the I2Cx CR1 value */
 202   tmpreg = I2Cx->CR1;
 203   /* Clear I2Cx CR1 register */
 204   tmpreg &= CR1_CLEAR_MASK;
 205   /* Configure I2Cx: analog and digital filter */
 206   /* Set ANFOFF bit according to I2C_AnalogFilter value */
 207   /* Set DFN bits according to I2C_DigitalFilter value */
 208   tmpreg |= (uint32_t)I2C_InitStruct->I2C_AnalogFilter |(I2C_InitStruct->I2C_DigitalFilter << 8);
 209
 210   /* Write to I2Cx CR1 */
 211   I2Cx->CR1 = tmpreg;
 212
 213   /*---------------------------- I2Cx TIMING Configuration -------------------*/
 214   /* Configure I2Cx: Timing */
 215   /* Set TIMINGR bits according to I2C_Timing */
 216   /* Write to I2Cx TIMING */
 217   I2Cx->TIMINGR = I2C_InitStruct->I2C_Timing & TIMING_CLEAR_MASK;
 218
 219   /* Enable I2Cx Peripheral */
 220   I2Cx->CR1 |= I2C_CR1_PE;
 221
 222   /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
 223   /* Clear tmpreg local variable */
 224   tmpreg = 0;
 225   /* Clear OAR1 register */
 226   I2Cx->OAR1 = (uint32_t)tmpreg;
 227   /* Clear OAR2 register */
 228   I2Cx->OAR2 = (uint32_t)tmpreg;
 229   /* Configure I2Cx: Own Address1 and acknowledged address */
 230   /* Set OA1MODE bit according to I2C_AcknowledgedAddress value */
 231   /* Set OA1 bits according to I2C_OwnAddress1 value */
 232   tmpreg = (uint32_t)((uint32_t)I2C_InitStruct->I2C_AcknowledgedAddress | \
 233                       (uint32_t)I2C_InitStruct->I2C_OwnAddress1);
 234   /* Write to I2Cx OAR1 */
 235   I2Cx->OAR1 = tmpreg;
 236   /* Enable Own Address1 acknowledgement */
 237   I2Cx->OAR1 |= I2C_OAR1_OA1EN;
 238
 239   /*---------------------------- I2Cx MODE Configuration ---------------------*/
 240   /* Configure I2Cx: mode */
 241   /* Set SMBDEN and SMBHEN bits according to I2C_Mode value */
 242   tmpreg = I2C_InitStruct->I2C_Mode;
 243   /* Write to I2Cx CR1 */
 244   I2Cx->CR1 |= tmpreg;
 245
 246   /*---------------------------- I2Cx ACK Configuration ----------------------*/
 247   /* Get the I2Cx CR2 value */
 248   tmpreg = I2Cx->CR2;
 249   /* Clear I2Cx CR2 register */
 250   tmpreg &= CR2_CLEAR_MASK;
 251   /* Configure I2Cx: acknowledgement */
 252   /* Set NACK bit according to I2C_Ack value */
 253   tmpreg |= I2C_InitStruct->I2C_Ack;
 254   /* Write to I2Cx CR2 */
 255   I2Cx->CR2 = tmpreg;
 256 }
 257
 258 /**
 259   * @brief  Fills each I2C_InitStruct member with its default value.
 260   * @param  I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
 261   * @retval None
 262   */
 263 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
 264 {
 265   /*---------------- Reset I2C init structure parameters values --------------*/
 266   /* Initialize the I2C_Timing member */
 267   I2C_InitStruct->I2C_Timing = 0;
 268   /* Initialize the I2C_AnalogFilter member */
 269   I2C_InitStruct->I2C_AnalogFilter = I2C_AnalogFilter_Enable;
 270   /* Initialize the I2C_DigitalFilter member */
 271   I2C_InitStruct->I2C_DigitalFilter = 0;
 272   /* Initialize the I2C_Mode member */
 273   I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
 274   /* Initialize the I2C_OwnAddress1 member */
 275   I2C_InitStruct->I2C_OwnAddress1 = 0;
 276   /* Initialize the I2C_Ack member */
 277   I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
 278   /* Initialize the I2C_AcknowledgedAddress member */
 279   I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
 280 }
 281
 282 /**
 283   * @brief  Enables or disables the specified I2C peripheral.
 284   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 285   * @param  NewState: new state of the I2Cx peripheral.
 286   *   This parameter can be: ENABLE or DISABLE.
 287   * @retval None
 288   */
 289 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 290 {
 291   /* Check the parameters */
 292   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 293   assert_param(IS_FUNCTIONAL_STATE(NewState));
 294   if (NewState != DISABLE)
 295   {
 296     /* Enable the selected I2C peripheral */
 297     I2Cx->CR1 |= I2C_CR1_PE;
 298   }
 299   else
 300   {
 301     /* Disable the selected I2C peripheral */
 302     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
 303   }
 304 }
 305
 306
 307 /**
 308   * @brief  Enables or disables the specified I2C software reset.
 309   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 310   * @retval None
 311   */
 312 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx)
 313 {
 314   /* Check the parameters */
 315   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 316
 317   /* Disable peripheral */
 318   I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
 319
 320   /* Perform a dummy read to delay the disable of peripheral for minimum
 321      3 APB clock cycles to perform the software reset functionality */
 322   *(__IO uint32_t *)(uint32_t)I2Cx;
 323
 324   /* Enable peripheral */
 325   I2Cx->CR1 |= I2C_CR1_PE;
 326 }
 327
 328 /**
 329   * @brief  Enables or disables the specified I2C interrupts.
 330   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 331   * @param  I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
 332   *   This parameter can be any combination of the following values:
 333   *     @arg I2C_IT_ERRI: Error interrupt mask
 334   *     @arg I2C_IT_TCI: Transfer Complete interrupt mask
 335   *     @arg I2C_IT_STOPI: Stop Detection interrupt mask
 336   *     @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask
 337   *     @arg I2C_IT_ADDRI: Address Match interrupt mask
 338   *     @arg I2C_IT_RXI: RX interrupt mask
 339   *     @arg I2C_IT_TXI: TX interrupt mask
 340   * @param  NewState: new state of the specified I2C interrupts.
 341   *   This parameter can be: ENABLE or DISABLE.
 342   * @retval None
 343   */
 344 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
 345 {
 346   /* Check the parameters */
 347   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 348   assert_param(IS_FUNCTIONAL_STATE(NewState));
 349   assert_param(IS_I2C_CONFIG_IT(I2C_IT));
 350
 351   if (NewState != DISABLE)
 352   {
 353     /* Enable the selected I2C interrupts */
 354     I2Cx->CR1 |= I2C_IT;
 355   }
 356   else
 357   {
 358     /* Disable the selected I2C interrupts */
 359     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_IT);
 360   }
 361 }
 362
 363 /**
 364   * @brief  Enables or disables the I2C Clock stretching.
 365   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 366   * @param  NewState: new state of the I2Cx Clock stretching.
 367   *   This parameter can be: ENABLE or DISABLE.
 368   * @retval None
 369   */
 370 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 371 {
 372   /* Check the parameters */
 373   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 374   assert_param(IS_FUNCTIONAL_STATE(NewState));
 375
 376   if (NewState != DISABLE)
 377   {
 378     /* Enable clock stretching */
 379     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_NOSTRETCH);
 380   }
 381   else
 382   {
 383     /* Disable clock stretching  */
 384     I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
 385   }
 386 }
 387
 388 /**
 389   * @brief  Enables or disables I2C wakeup from stop mode.
 390   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 391   * @param  NewState: new state of the I2Cx stop mode.
 392   *   This parameter can be: ENABLE or DISABLE.
 393   * @retval None
 394   */
 395 void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 396 {
 397   /* Check the parameters */
 398   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 399   assert_param(IS_FUNCTIONAL_STATE(NewState));
 400
 401   if (NewState != DISABLE)
 402   {
 403     /* Enable wakeup from stop mode */
 404     I2Cx->CR1 |= I2C_CR1_WUPEN;
 405   }
 406   else
 407   {
 408     /* Disable wakeup from stop mode */
 409     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_WUPEN);
 410   }
 411 }
 412
 413 /**
 414   * @brief  Enables or disables the I2C own address 2.
 415   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 416   * @param  NewState: new state of the I2C own address 2.
 417   *   This parameter can be: ENABLE or DISABLE.
 418   * @retval None
 419   */
 420 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 421 {
 422   /* Check the parameters */
 423   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 424   assert_param(IS_FUNCTIONAL_STATE(NewState));
 425
 426   if (NewState != DISABLE)
 427   {
 428     /* Enable own address 2 */
 429     I2Cx->OAR2 |= I2C_OAR2_OA2EN;
 430   }
 431   else
 432   {
 433     /* Disable own address 2 */
 434     I2Cx->OAR2 &= (uint32_t)~((uint32_t)I2C_OAR2_OA2EN);
 435   }
 436 }
 437
 438 /**
 439   * @brief  Configures the I2C slave own address 2 and mask.
 440   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 441   * @param  Address: specifies the slave address to be programmed.
 442   * @param  Mask: specifies own address 2 mask to be programmed.
 443   *   This parameter can be one of the following values:
 444   *     @arg I2C_OA2_NoMask: no mask.
 445   *     @arg I2C_OA2_Mask01: OA2[1] is masked and don't care.
 446   *     @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care.
 447   *     @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care.
 448   *     @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care.
 449   *     @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care.
 450   *     @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care.
 451   *     @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care.
 452   * @retval None
 453   */
 454 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask)
 455 {
 456   uint32_t tmpreg = 0;
 457
 458   /* Check the parameters */
 459   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 460   assert_param(IS_I2C_OWN_ADDRESS2(Address));
 461   assert_param(IS_I2C_OWN_ADDRESS2_MASK(Mask));
 462
 463   /* Get the old register value */
 464   tmpreg = I2Cx->OAR2;
 465
 466   /* Reset I2Cx OA2 bit [7:1] and OA2MSK bit [1:0]  */
 467   tmpreg &= (uint32_t)~((uint32_t)(I2C_OAR2_OA2 | I2C_OAR2_OA2MSK));
 468
 469   /* Set I2Cx SADD */
 470   tmpreg |= (uint32_t)(((uint32_t)Address & I2C_OAR2_OA2) | \
 471             (((uint32_t)Mask << 8) & I2C_OAR2_OA2MSK)) ;
 472
 473   /* Store the new register value */
 474   I2Cx->OAR2 = tmpreg;
 475 }
 476
 477 /**
 478   * @brief  Enables or disables the I2C general call mode.
 479   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 480   * @param  NewState: new state of the I2C general call mode.
 481   *   This parameter can be: ENABLE or DISABLE.
 482   * @retval None
 483   */
 484 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 485 {
 486   /* Check the parameters */
 487   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 488   assert_param(IS_FUNCTIONAL_STATE(NewState));
 489
 490   if (NewState != DISABLE)
 491   {
 492     /* Enable general call mode */
 493     I2Cx->CR1 |= I2C_CR1_GCEN;
 494   }
 495   else
 496   {
 497     /* Disable general call mode */
 498     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_GCEN);
 499   }
 500 }
 501
 502 /**
 503   * @brief  Enables or disables the I2C slave byte control.
 504   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 505   * @param  NewState: new state of the I2C slave byte control.
 506   *   This parameter can be: ENABLE or DISABLE.
 507   * @retval None
 508   */
 509 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 510 {
 511   /* Check the parameters */
 512   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 513   assert_param(IS_FUNCTIONAL_STATE(NewState));
 514
 515   if (NewState != DISABLE)
 516   {
 517     /* Enable slave byte control */
 518     I2Cx->CR1 |= I2C_CR1_SBC;
 519   }
 520   else
 521   {
 522     /* Disable slave byte control */
 523     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SBC);
 524   }
 525 }
 526
 527 /**
 528   * @brief  Configures the slave address to be transmitted after start generation.
 529   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 530   * @param  Address: specifies the slave address to be programmed.
 531   * @note   This function should be called before generating start condition.
 532   * @retval None
 533   */
 534 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address)
 535 {
 536   uint32_t tmpreg = 0;
 537
 538   /* Check the parameters */
 539   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 540   assert_param(IS_I2C_SLAVE_ADDRESS(Address));
 541
 542   /* Get the old register value */
 543   tmpreg = I2Cx->CR2;
 544
 545   /* Reset I2Cx SADD bit [9:0] */
 546   tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_SADD);
 547
 548   /* Set I2Cx SADD */
 549   tmpreg |= (uint32_t)((uint32_t)Address & I2C_CR2_SADD);
 550
 551   /* Store the new register value */
 552   I2Cx->CR2 = tmpreg;
 553 }
 554
 555 /**
 556   * @brief  Enables or disables the I2C 10-bit addressing mode for the master.
 557   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 558   * @param  NewState: new state of the I2C 10-bit addressing mode.
 559   *   This parameter can be: ENABLE or DISABLE.
 560   * @note   This function should be called before generating start condition.
 561   * @retval None
 562   */
 563 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 564 {
 565   /* Check the parameters */
 566   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 567   assert_param(IS_FUNCTIONAL_STATE(NewState));
 568
 569   if (NewState != DISABLE)
 570   {
 571     /* Enable 10-bit addressing mode */
 572     I2Cx->CR2 |= I2C_CR2_ADD10;
 573   }
 574   else
 575   {
 576     /* Disable 10-bit addressing mode */
 577     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_ADD10);
 578   }
 579 }
 580
 581 /**
 582   * @}
 583   */
 584
 585
 586 /** @defgroup I2C_Group2 Communications handling functions
 587  *  @brief   Communications handling functions
 588  *
 589 @verbatim
 590  ===============================================================================
 591                   ##### Communications handling functions #####
 592  ===============================================================================
 593     [..] This section provides a set of functions that handles I2C communication.
 594
 595     [..] Automatic End mode is enabled using I2C_AutoEndCmd() function. When Reload
 596          mode is enabled via I2C_ReloadCmd() AutoEnd bit has no effect.
 597
 598     [..] I2C_NumberOfBytesConfig() function set the number of bytes to be transferred,
 599          this configuration should be done before generating start condition in master
 600          mode.
 601
 602     [..] When switching from master write operation to read operation in 10Bit addressing
 603          mode, master can only sends the 1st 7 bits of the 10 bit address, followed by
 604          Read direction by enabling HEADR bit using I2C_10BitAddressHeader() function.
 605
 606     [..] In master mode, when transferring more than 255 bytes Reload mode should be used
 607          to handle communication. In the first phase of transfer, Nbytes should be set to
 608          255. After transferring these bytes TCR flag is set and I2C_TransferHandling()
 609          function should be called to handle remaining communication.
 610
 611     [..] In master mode, when software end mode is selected when all data is transferred
 612          TC flag is set I2C_TransferHandling() function should be called to generate STOP
 613          or generate ReStart.
 614
 615 @endverbatim
 616   * @{
 617   */
 618
 619 /**
 620   * @brief  Enables or disables the I2C automatic end mode (stop condition is
 621   *         automatically sent when nbytes data are transferred).
 622   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 623   * @param  NewState: new state of the I2C automatic end mode.
 624   *   This parameter can be: ENABLE or DISABLE.
 625   * @note   This function has effect if Reload mode is disabled.
 626   * @retval None
 627   */
 628 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 629 {
 630   /* Check the parameters */
 631   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 632   assert_param(IS_FUNCTIONAL_STATE(NewState));
 633
 634   if (NewState != DISABLE)
 635   {
 636     /* Enable Auto end mode */
 637     I2Cx->CR2 |= I2C_CR2_AUTOEND;
 638   }
 639   else
 640   {
 641     /* Disable Auto end mode */
 642     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_AUTOEND);
 643   }
 644 }
 645
 646 /**
 647   * @brief  Enables or disables the I2C nbytes reload mode.
 648   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 649   * @param  NewState: new state of the nbytes reload mode.
 650   *   This parameter can be: ENABLE or DISABLE.
 651   * @retval None
 652   */
 653 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 654 {
 655   /* Check the parameters */
 656   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 657   assert_param(IS_FUNCTIONAL_STATE(NewState));
 658
 659   if (NewState != DISABLE)
 660   {
 661     /* Enable Auto Reload mode */
 662     I2Cx->CR2 |= I2C_CR2_RELOAD;
 663   }
 664   else
 665   {
 666     /* Disable Auto Reload mode */
 667     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RELOAD);
 668   }
 669 }
 670
 671 /**
 672   * @brief  Configures the number of bytes to be transmitted/received.
 673   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 674   * @param  Number_Bytes: specifies the number of bytes to be programmed.
 675   * @retval None
 676   */
 677 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes)
 678 {
 679   uint32_t tmpreg = 0;
 680
 681   /* Check the parameters */
 682   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 683
 684   /* Get the old register value */
 685   tmpreg = I2Cx->CR2;
 686
 687   /* Reset I2Cx Nbytes bit [7:0] */
 688   tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_NBYTES);
 689
 690   /* Set I2Cx Nbytes */
 691   tmpreg |= (uint32_t)(((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES);
 692
 693   /* Store the new register value */
 694   I2Cx->CR2 = tmpreg;
 695 }
 696
 697 /**
 698   * @brief  Configures the type of transfer request for the master.
 699   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 700   * @param  I2C_Direction: specifies the transfer request direction to be programmed.
 701   *    This parameter can be one of the following values:
 702   *     @arg I2C_Direction_Transmitter: Master request a write transfer
 703   *     @arg I2C_Direction_Receiver: Master request a read transfer
 704   * @retval None
 705   */
 706 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction)
 707 {
 708 /* Check the parameters */
 709   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 710   assert_param(IS_I2C_DIRECTION(I2C_Direction));
 711
 712   /* Test on the direction to set/reset the read/write bit */
 713   if (I2C_Direction == I2C_Direction_Transmitter)
 714   {
 715     /* Request a write Transfer */
 716     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RD_WRN);
 717   }
 718   else
 719   {
 720     /* Request a read Transfer */
 721     I2Cx->CR2 |= I2C_CR2_RD_WRN;
 722   }
 723 }
 724
 725 /**
 726   * @brief  Generates I2Cx communication START condition.
 727   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 728   * @param  NewState: new state of the I2C START condition generation.
 729   *   This parameter can be: ENABLE or DISABLE.
 730   * @retval None
 731   */
 732 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
 733 {
 734   /* Check the parameters */
 735   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 736   assert_param(IS_FUNCTIONAL_STATE(NewState));
 737
 738   if (NewState != DISABLE)
 739   {
 740     /* Generate a START condition */
 741     I2Cx->CR2 |= I2C_CR2_START;
 742   }
 743   else
 744   {
 745     /* Disable the START condition generation */
 746     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_START);
 747   }
 748 }
 749
 750 /**
 751   * @brief  Generates I2Cx communication STOP condition.
 752   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 753   * @param  NewState: new state of the I2C STOP condition generation.
 754   *   This parameter can be: ENABLE or DISABLE.
 755   * @retval None
 756   */
 757 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
 758 {
 759   /* Check the parameters */
 760   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 761   assert_param(IS_FUNCTIONAL_STATE(NewState));
 762
 763   if (NewState != DISABLE)
 764   {
 765     /* Generate a STOP condition */
 766     I2Cx->CR2 |= I2C_CR2_STOP;
 767   }
 768   else
 769   {
 770     /* Disable the STOP condition generation */
 771     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_STOP);
 772   }
 773 }
 774
 775 /**
 776   * @brief  Enables or disables the I2C 10-bit header only mode with read direction.
 777   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 778   * @param  NewState: new state of the I2C 10-bit header only mode.
 779   *   This parameter can be: ENABLE or DISABLE.
 780   * @note   This mode can be used only when switching from master transmitter mode
 781   *         to master receiver mode.
 782   * @retval None
 783   */
 784 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 785 {
 786   /* Check the parameters */
 787   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 788   assert_param(IS_FUNCTIONAL_STATE(NewState));
 789
 790   if (NewState != DISABLE)
 791   {
 792     /* Enable 10-bit header only mode */
 793     I2Cx->CR2 |= I2C_CR2_HEAD10R;
 794   }
 795   else
 796   {
 797     /* Disable 10-bit header only mode */
 798     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_HEAD10R);
 799   }
 800 }
 801
 802 /**
 803   * @brief  Generates I2C communication Acknowledge.
 804   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 805   * @param  NewState: new state of the Acknowledge.
 806   *   This parameter can be: ENABLE or DISABLE.
 807   * @retval None
 808   */
 809 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
 810 {
 811   /* Check the parameters */
 812   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 813   assert_param(IS_FUNCTIONAL_STATE(NewState));
 814
 815   if (NewState != DISABLE)
 816   {
 817     /* Enable ACK generation */
 818     I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_NACK);
 819   }
 820   else
 821   {
 822     /* Enable NACK generation */
 823     I2Cx->CR2 |= I2C_CR2_NACK;
 824   }
 825 }
 826
 827 /**
 828   * @brief  Returns the I2C slave matched address .
 829   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 830   * @retval The value of the slave matched address .
 831   */
 832 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx)
 833 {
 834   /* Check the parameters */
 835   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 836
 837   /* Return the slave matched address in the SR1 register */
 838   return (uint8_t)(((uint32_t)I2Cx->ISR & I2C_ISR_ADDCODE) >> 16) ;
 839 }
 840
 841 /**
 842   * @brief  Returns the I2C slave received request.
 843   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 844   * @retval The value of the received request.
 845   */
 846 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx)
 847 {
 848   uint32_t tmpreg = 0;
 849   uint16_t direction = 0;
 850
 851   /* Check the parameters */
 852   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 853
 854   /* Return the slave matched address in the SR1 register */
 855   tmpreg = (uint32_t)(I2Cx->ISR & I2C_ISR_DIR);
 856
 857   /* If write transfer is requested */
 858   if (tmpreg == 0)
 859   {
 860     /* write transfer is requested */
 861     direction = I2C_Direction_Transmitter;
 862   }
 863   else
 864   {
 865     /* Read transfer is requested */
 866     direction = I2C_Direction_Receiver;
 867   }
 868   return direction;
 869 }
 870
 871 /**
 872   * @brief  Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
 873   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 874   * @param  Address: specifies the slave address to be programmed.
 875   * @param  Number_Bytes: specifies the number of bytes to be programmed.
 876   *   This parameter must be a value between 0 and 255.
 877   * @param  ReloadEndMode: new state of the I2C START condition generation.
 878   *   This parameter can be one of the following values:
 879   *     @arg I2C_Reload_Mode: Enable Reload mode .
 880   *     @arg I2C_AutoEnd_Mode: Enable Automatic end mode.
 881   *     @arg I2C_SoftEnd_Mode: Enable Software end mode.
 882   * @param  StartStopMode: new state of the I2C START condition generation.
 883   *   This parameter can be one of the following values:
 884   *     @arg I2C_No_StartStop: Don't Generate stop and start condition.
 885   *     @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
 886   *     @arg I2C_Generate_Start_Read: Generate Restart for read request.
 887   *     @arg I2C_Generate_Start_Write: Generate Restart for write request.
 888   * @retval None
 889   */
 890 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode)
 891 {
 892   uint32_t tmpreg = 0;
 893
 894   /* Check the parameters */
 895   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 896   assert_param(IS_I2C_SLAVE_ADDRESS(Address));
 897   assert_param(IS_RELOAD_END_MODE(ReloadEndMode));
 898   assert_param(IS_START_STOP_MODE(StartStopMode));
 899
 900   /* Get the CR2 register value */
 901   tmpreg = I2Cx->CR2;
 902
 903   /* clear tmpreg specific bits */
 904   tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
 905
 906   /* update tmpreg */
 907   tmpreg |= (uint32_t)(((uint32_t)Address & I2C_CR2_SADD) | (((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES) | \
 908             (uint32_t)ReloadEndMode | (uint32_t)StartStopMode);
 909
 910   /* update CR2 register */
 911   I2Cx->CR2 = tmpreg;
 912 }
 913
 914 /**
 915   * @}
 916   */
 917
 918
 919 /** @defgroup I2C_Group3 SMBUS management functions
 920  *  @brief   SMBUS management functions
 921  *
 922 @verbatim
 923  ===============================================================================
 924                       ##### SMBUS management functions #####
 925  ===============================================================================
 926     [..] This section provides a set of functions that handles SMBus communication
 927          and timeouts detection.
 928
 929     [..] The SMBus Device default address (0b1100 001) is enabled by calling I2C_Init()
 930          function and setting I2C_Mode member of I2C_InitTypeDef() structure to
 931          I2C_Mode_SMBusDevice.
 932
 933     [..] The SMBus Host address (0b0001 000) is enabled by calling I2C_Init()
 934          function and setting I2C_Mode member of I2C_InitTypeDef() structure to
 935          I2C_Mode_SMBusHost.
 936
 937     [..] The Alert Response Address (0b0001 100) is enabled using I2C_SMBusAlertCmd()
 938          function.
 939
 940     [..] To detect cumulative SCL stretch in master and slave mode, TIMEOUTB should be
 941          configured (in accordance to SMBus specification) using I2C_TimeoutBConfig()
 942          function then I2C_ExtendedClockTimeoutCmd() function should be called to enable
 943          the detection.
 944
 945     [..] SCL low timeout is detected by configuring TIMEOUTB using I2C_TimeoutBConfig()
 946          function followed by the call of I2C_ClockTimeoutCmd(). When adding to this
 947          procedure the call of I2C_IdleClockTimeoutCmd() function, Bus Idle condition
 948          (both SCL and SDA high) is detected also.
 949
 950 @endverbatim
 951   * @{
 952   */
 953
 954 /**
 955   * @brief  Enables or disables I2C SMBus alert.
 956   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 957   * @param  NewState: new state of the I2Cx SMBus alert.
 958   *   This parameter can be: ENABLE or DISABLE.
 959   * @retval None
 960   */
 961 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 962 {
 963   /* Check the parameters */
 964   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 965   assert_param(IS_FUNCTIONAL_STATE(NewState));
 966
 967   if (NewState != DISABLE)
 968   {
 969     /* Enable SMBus alert */
 970     I2Cx->CR1 |= I2C_CR1_ALERTEN;
 971   }
 972   else
 973   {
 974     /* Disable SMBus alert */
 975     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_ALERTEN);
 976   }
 977 }
 978
 979 /**
 980   * @brief  Enables or disables I2C Clock Timeout (SCL Timeout detection).
 981   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
 982   * @param  NewState: new state of the I2Cx clock Timeout.
 983   *   This parameter can be: ENABLE or DISABLE.
 984   * @retval None
 985   */
 986 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
 987 {
 988   /* Check the parameters */
 989   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
 990   assert_param(IS_FUNCTIONAL_STATE(NewState));
 991
 992   if (NewState != DISABLE)
 993   {
 994     /* Enable Clock Timeout */
 995     I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIMOUTEN;
 996   }
 997   else
 998   {
 999     /* Disable Clock Timeout */
1000     I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMOUTEN);
1001   }
1002 }
1003
1004 /**
1005   * @brief  Enables or disables I2C Extended Clock Timeout (SCL cumulative Timeout detection).
1006   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1007   * @param  NewState: new state of the I2Cx Extended clock Timeout.
1008   *   This parameter can be: ENABLE or DISABLE.
1009   * @retval None
1010   */
1011 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
1012 {
1013   /* Check the parameters */
1014   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1015   assert_param(IS_FUNCTIONAL_STATE(NewState));
1016
1017   if (NewState != DISABLE)
1018   {
1019     /* Enable Clock Timeout */
1020     I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TEXTEN;
1021   }
1022   else
1023   {
1024     /* Disable Clock Timeout */
1025     I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TEXTEN);
1026   }
1027 }
1028
1029 /**
1030   * @brief  Enables or disables I2C Idle Clock Timeout (Bus idle SCL and SDA
1031   *         high detection).
1032   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1033   * @param  NewState: new state of the I2Cx Idle clock Timeout.
1034   *   This parameter can be: ENABLE or DISABLE.
1035   * @retval None
1036   */
1037 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
1038 {
1039   /* Check the parameters */
1040   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1041   assert_param(IS_FUNCTIONAL_STATE(NewState));
1042
1043   if (NewState != DISABLE)
1044   {
1045     /* Enable Clock Timeout */
1046     I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIDLE;
1047   }
1048   else
1049   {
1050     /* Disable Clock Timeout */
1051     I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIDLE);
1052   }
1053 }
1054
1055 /**
1056   * @brief  Configures the I2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus
1057   *   idle SCL and SDA high when TIDLE = 1).
1058   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1059   * @param  Timeout: specifies the TimeoutA to be programmed.
1060   * @retval None
1061   */
1062 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
1063 {
1064   uint32_t tmpreg = 0;
1065
1066   /* Check the parameters */
1067   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1068   assert_param(IS_I2C_TIMEOUT(Timeout));
1069
1070   /* Get the old register value */
1071   tmpreg = I2Cx->TIMEOUTR;
1072
1073   /* Reset I2Cx TIMEOUTA bit [11:0] */
1074   tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTA);
1075
1076   /* Set I2Cx TIMEOUTA */
1077   tmpreg |= (uint32_t)((uint32_t)Timeout & I2C_TIMEOUTR_TIMEOUTA) ;
1078
1079   /* Store the new register value */
1080   I2Cx->TIMEOUTR = tmpreg;
1081 }
1082
1083 /**
1084   * @brief  Configures the I2C Bus Timeout B (SCL cumulative Timeout).
1085   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1086   * @param  Timeout: specifies the TimeoutB to be programmed.
1087   * @retval None
1088   */
1089 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
1090 {
1091   uint32_t tmpreg = 0;
1092
1093   /* Check the parameters */
1094   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1095   assert_param(IS_I2C_TIMEOUT(Timeout));
1096
1097   /* Get the old register value */
1098   tmpreg = I2Cx->TIMEOUTR;
1099
1100   /* Reset I2Cx TIMEOUTB bit [11:0] */
1101   tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTB);
1102
1103   /* Set I2Cx TIMEOUTB */
1104   tmpreg |= (uint32_t)(((uint32_t)Timeout << 16) & I2C_TIMEOUTR_TIMEOUTB) ;
1105
1106   /* Store the new register value */
1107   I2Cx->TIMEOUTR = tmpreg;
1108 }
1109
1110 /**
1111   * @brief  Enables or disables I2C PEC calculation.
1112   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1113   * @param  NewState: new state of the I2Cx PEC calculation.
1114   *   This parameter can be: ENABLE or DISABLE.
1115   * @retval None
1116   */
1117 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
1118 {
1119   /* Check the parameters */
1120   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1121   assert_param(IS_FUNCTIONAL_STATE(NewState));
1122
1123   if (NewState != DISABLE)
1124   {
1125     /* Enable PEC calculation */
1126     I2Cx->CR1 |= I2C_CR1_PECEN;
1127   }
1128   else
1129   {
1130     /* Disable PEC calculation */
1131     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PECEN);
1132   }
1133 }
1134
1135 /**
1136   * @brief  Enables or disables I2C PEC transmission/reception request.
1137   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1138   * @param  NewState: new state of the I2Cx PEC request.
1139   *   This parameter can be: ENABLE or DISABLE.
1140   * @retval None
1141   */
1142 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
1143 {
1144   /* Check the parameters */
1145   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1146   assert_param(IS_FUNCTIONAL_STATE(NewState));
1147
1148   if (NewState != DISABLE)
1149   {
1150     /* Enable PEC transmission/reception request */
1151     I2Cx->CR1 |= I2C_CR2_PECBYTE;
1152   }
1153   else
1154   {
1155     /* Disable PEC transmission/reception request */
1156     I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR2_PECBYTE);
1157   }
1158 }
1159
1160 /**
1161   * @brief  Returns the I2C PEC.
1162   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1163   * @retval The value of the PEC .
1164   */
1165 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
1166 {
1167   /* Check the parameters */
1168   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1169
1170   /* Return the slave matched address in the SR1 register */
1171   return (uint8_t)((uint32_t)I2Cx->PECR & I2C_PECR_PEC);
1172 }
1173
1174 /**
1175   * @}
1176   */
1177
1178
1179 /** @defgroup I2C_Group4 I2C registers management functions
1180  *  @brief   I2C registers management functions
1181  *
1182 @verbatim
1183  ===============================================================================
1184                 ##### I2C registers management functions #####
1185  ===============================================================================
1186     [..] This section provides a functions that allow user the management of
1187          I2C registers.
1188
1189 @endverbatim
1190   * @{
1191   */
1192
1193   /**
1194   * @brief  Reads the specified I2C register and returns its value.
1195   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1196   * @param  I2C_Register: specifies the register to read.
1197   *   This parameter can be one of the following values:
1198   *     @arg I2C_Register_CR1: CR1 register.
1199   *     @arg I2C_Register_CR2: CR2 register.
1200   *     @arg I2C_Register_OAR1: OAR1 register.
1201   *     @arg I2C_Register_OAR2: OAR2 register.
1202   *     @arg I2C_Register_TIMINGR: TIMING register.
1203   *     @arg I2C_Register_TIMEOUTR: TIMEOUTR register.
1204   *     @arg I2C_Register_ISR: ISR register.
1205   *     @arg I2C_Register_ICR: ICR register.
1206   *     @arg I2C_Register_PECR: PECR register.
1207   *     @arg I2C_Register_RXDR: RXDR register.
1208   *     @arg I2C_Register_TXDR: TXDR register.
1209   * @retval The value of the read register.
1210   */
1211 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
1212 {
1213   __IO uint32_t tmp = 0;
1214
1215   /* Check the parameters */
1216   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1217   assert_param(IS_I2C_REGISTER(I2C_Register));
1218
1219   tmp = (uint32_t)I2Cx;
1220   tmp += I2C_Register;
1221
1222   /* Return the selected register value */
1223   return (*(__IO uint32_t *) tmp);
1224 }
1225
1226 /**
1227   * @}
1228   */
1229
1230 /** @defgroup I2C_Group5 Data transfers management functions
1231  *  @brief   Data transfers management functions
1232  *
1233 @verbatim
1234  ===============================================================================
1235                 ##### Data transfers management functions #####
1236  ===============================================================================
1237     [..] This subsection provides a set of functions allowing to manage
1238          the I2C data transfers.
1239
1240     [..] The read access of the I2C_RXDR register can be done using
1241          the I2C_ReceiveData() function and returns the received value.
1242          Whereas a write access to the I2C_TXDR can be done using I2C_SendData()
1243          function and stores the written data into TXDR.
1244 @endverbatim
1245   * @{
1246   */
1247
1248 /**
1249   * @brief  Sends a data byte through the I2Cx peripheral.
1250   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1251   * @param  Data: Byte to be transmitted..
1252   * @retval None
1253   */
1254 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
1255 {
1256   /* Check the parameters */
1257   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1258
1259   /* Write in the DR register the data to be sent */
1260   I2Cx->TXDR = (uint8_t)Data;
1261 }
1262
1263 /**
1264   * @brief  Returns the most recent received data by the I2Cx peripheral.
1265   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1266   * @retval The value of the received data.
1267   */
1268 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
1269 {
1270   /* Check the parameters */
1271   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1272
1273   /* Return the data in the DR register */
1274   return (uint8_t)I2Cx->RXDR;
1275 }
1276
1277 /**
1278   * @}
1279   */
1280
1281
1282 /** @defgroup I2C_Group6 DMA transfers management functions
1283  *  @brief   DMA transfers management functions
1284  *
1285 @verbatim
1286  ===============================================================================
1287                ##### DMA transfers management functions #####
1288  ===============================================================================
1289     [..] This section provides two functions that can be used only in DMA mode.
1290     [..] In DMA Mode, the I2C communication can be managed by 2 DMA Channel
1291          requests:
1292          (#) I2C_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
1293          (#) I2C_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
1294     [..] In this Mode it is advised to use the following function:
1295          (+) I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);
1296 @endverbatim
1297   * @{
1298   */
1299
1300 /**
1301   * @brief  Enables or disables the I2C DMA interface.
1302   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1303   * @param  I2C_DMAReq: specifies the I2C DMA transfer request to be enabled or disabled.
1304   *   This parameter can be any combination of the following values:
1305   *     @arg I2C_DMAReq_Tx: Tx DMA transfer request
1306   *     @arg I2C_DMAReq_Rx: Rx DMA transfer request
1307   * @param  NewState: new state of the selected I2C DMA transfer request.
1308   *         This parameter can be: ENABLE or DISABLE.
1309   * @retval None
1310   */
1311 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState)
1312 {
1313   /* Check the parameters */
1314   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1315   assert_param(IS_FUNCTIONAL_STATE(NewState));
1316   assert_param(IS_I2C_DMA_REQ(I2C_DMAReq));
1317
1318   if (NewState != DISABLE)
1319   {
1320     /* Enable the selected I2C DMA requests */
1321     I2Cx->CR1 |= I2C_DMAReq;
1322   }
1323   else
1324   {
1325     /* Disable the selected I2C DMA requests */
1326     I2Cx->CR1 &= (uint32_t)~I2C_DMAReq;
1327   }
1328 }
1329 /**
1330   * @}
1331   */
1332
1333
1334 /** @defgroup I2C_Group7 Interrupts and flags management functions
1335  *  @brief   Interrupts and flags management functions
1336  *
1337 @verbatim
1338  ===============================================================================
1339              ##### Interrupts and flags management functions  #####
1340  ===============================================================================
1341     [..] This section provides functions allowing to configure the I2C Interrupts
1342          sources and check or clear the flags or pending bits status.
1343          The user should identify which mode will be used in his application to manage
1344          the communication: Polling mode, Interrupt mode or DMA mode(refer I2C_Group6) .
1345
1346   *** Polling Mode ***
1347   ====================
1348     [..] In Polling Mode, the I2C communication can be managed by 15 flags:
1349         (#) I2C_FLAG_TXE: to indicate the status of Transmit data register empty flag.
1350         (#) I2C_FLAG_TXIS: to indicate the status of Transmit interrupt status flag .
1351         (#) I2C_FLAG_RXNE: to indicate the status of Receive data register not empty flag.
1352         (#) I2C_FLAG_ADDR: to indicate the status of Address matched flag (slave mode).
1353         (#) I2C_FLAG_NACKF: to indicate the status of NACK received flag.
1354         (#) I2C_FLAG_STOPF: to indicate the status of STOP detection flag.
1355         (#) I2C_FLAG_TC: to indicate the status of Transfer complete flag(master mode).
1356         (#) I2C_FLAG_TCR: to indicate the status of Transfer complete reload flag.
1357         (#) I2C_FLAG_BERR: to indicate the status of Bus error flag.
1358         (#) I2C_FLAG_ARLO: to indicate the status of Arbitration lost flag.
1359         (#) I2C_FLAG_OVR: to indicate the status of Overrun/Underrun flag.
1360         (#) I2C_FLAG_PECERR: to indicate the status of PEC error in reception flag.
1361         (#) I2C_FLAG_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
1362         (#) I2C_FLAG_ALERT: to indicate the status of SMBus Alert flag.
1363         (#) I2C_FLAG_BUSY: to indicate the status of Bus busy flag.
1364
1365     [..] In this Mode it is advised to use the following functions:
1366         (+) FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
1367         (+) void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
1368
1369     [..]
1370         (@)Do not use the BUSY flag to handle each data transmission or reception.It is
1371            better to use the TXIS and RXNE flags instead.
1372
1373   *** Interrupt Mode ***
1374   ======================
1375     [..] In Interrupt Mode, the I2C communication can be managed by 7 interrupt sources
1376          and 15 pending bits:
1377     [..] Interrupt Source:
1378         (#) I2C_IT_ERRI: specifies the interrupt source for the Error interrupt.
1379         (#) I2C_IT_TCI: specifies the interrupt source for the Transfer Complete interrupt.
1380         (#) I2C_IT_STOPI: specifies the interrupt source for the Stop Detection interrupt.
1381         (#) I2C_IT_NACKI: specifies the interrupt source for the Not Acknowledge received interrupt.
1382         (#) I2C_IT_ADDRI: specifies the interrupt source for the Address Match interrupt.
1383         (#) I2C_IT_RXI: specifies the interrupt source for the RX interrupt.
1384         (#) I2C_IT_TXI: specifies the interrupt source for the TX interrupt.
1385
1386     [..] Pending Bits:
1387         (#) I2C_IT_TXIS: to indicate the status of Transmit interrupt status flag.
1388         (#) I2C_IT_RXNE: to indicate the status of Receive data register not empty flag.
1389         (#) I2C_IT_ADDR: to indicate the status of Address matched flag (slave mode).
1390         (#) I2C_IT_NACKF: to indicate the status of NACK received flag.
1391         (#) I2C_IT_STOPF: to indicate the status of STOP detection flag.
1392         (#) I2C_IT_TC: to indicate the status of Transfer complete flag (master mode).
1393         (#) I2C_IT_TCR: to indicate the status of Transfer complete reload flag.
1394         (#) I2C_IT_BERR: to indicate the status of Bus error flag.
1395         (#) I2C_IT_ARLO: to indicate the status of Arbitration lost flag.
1396         (#) I2C_IT_OVR: to indicate the status of Overrun/Underrun flag.
1397         (#) I2C_IT_PECERR: to indicate the status of PEC error in reception flag.
1398         (#) I2C_IT_TIMEOUT: to indicate the status of Timeout or Tlow detection flag.
1399         (#) I2C_IT_ALERT: to indicate the status of SMBus Alert flag.
1400
1401     [..] In this Mode it is advised to use the following functions:
1402          (+) void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
1403          (+) ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
1404
1405 @endverbatim
1406   * @{
1407   */
1408
1409 /**
1410   * @brief  Checks whether the specified I2C flag is set or not.
1411   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1412   * @param  I2C_FLAG: specifies the flag to check.
1413   *   This parameter can be one of the following values:
1414   *     @arg I2C_FLAG_TXE: Transmit data register empty
1415   *     @arg I2C_FLAG_TXIS: Transmit interrupt status
1416   *     @arg I2C_FLAG_RXNE: Receive data register not empty
1417   *     @arg I2C_FLAG_ADDR: Address matched (slave mode)
1418   *     @arg I2C_FLAG_NACKF: NACK received flag
1419   *     @arg I2C_FLAG_STOPF: STOP detection flag
1420   *     @arg I2C_FLAG_TC: Transfer complete (master mode)
1421   *     @arg I2C_FLAG_TCR: Transfer complete reload
1422   *     @arg I2C_FLAG_BERR: Bus error
1423   *     @arg I2C_FLAG_ARLO: Arbitration lost
1424   *     @arg I2C_FLAG_OVR: Overrun/Underrun
1425   *     @arg I2C_FLAG_PECERR: PEC error in reception
1426   *     @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
1427   *     @arg I2C_FLAG_ALERT: SMBus Alert
1428   *     @arg I2C_FLAG_BUSY: Bus busy
1429   * @retval The new state of I2C_FLAG (SET or RESET).
1430   */
1431 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
1432 {
1433   uint32_t tmpreg = 0;
1434   FlagStatus bitstatus = RESET;
1435
1436   /* Check the parameters */
1437   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1438   assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
1439
1440   /* Get the ISR register value */
1441   tmpreg = I2Cx->ISR;
1442
1443   /* Get flag status */
1444   tmpreg &= I2C_FLAG;
1445
1446   if(tmpreg != 0)
1447   {
1448     /* I2C_FLAG is set */
1449     bitstatus = SET;
1450   }
1451   else
1452   {
1453     /* I2C_FLAG is reset */
1454     bitstatus = RESET;
1455   }
1456   return bitstatus;
1457 }
1458
1459 /**
1460   * @brief  Clears the I2Cx's pending flags.
1461   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1462   * @param  I2C_FLAG: specifies the flag to clear.
1463   *   This parameter can be any combination of the following values:
1464   *     @arg I2C_FLAG_ADDR: Address matched (slave mode)
1465   *     @arg I2C_FLAG_NACKF: NACK received flag
1466   *     @arg I2C_FLAG_STOPF: STOP detection flag
1467   *     @arg I2C_FLAG_BERR: Bus error
1468   *     @arg I2C_FLAG_ARLO: Arbitration lost
1469   *     @arg I2C_FLAG_OVR: Overrun/Underrun
1470   *     @arg I2C_FLAG_PECERR: PEC error in reception
1471   *     @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
1472   *     @arg I2C_FLAG_ALERT: SMBus Alert
1473   * @retval The new state of I2C_FLAG (SET or RESET).
1474   */
1475 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
1476 {
1477   /* Check the parameters */
1478   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1479   assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
1480
1481   /* Clear the selected flag */
1482   I2Cx->ICR = I2C_FLAG;
1483   }
1484
1485 /**
1486   * @brief  Checks whether the specified I2C interrupt has occurred or not.
1487   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1488   * @param  I2C_IT: specifies the interrupt source to check.
1489   *   This parameter can be one of the following values:
1490   *     @arg I2C_IT_TXIS: Transmit interrupt status
1491   *     @arg I2C_IT_RXNE: Receive data register not empty
1492   *     @arg I2C_IT_ADDR: Address matched (slave mode)
1493   *     @arg I2C_IT_NACKF: NACK received flag
1494   *     @arg I2C_IT_STOPF: STOP detection flag
1495   *     @arg I2C_IT_TC: Transfer complete (master mode)
1496   *     @arg I2C_IT_TCR: Transfer complete reload
1497   *     @arg I2C_IT_BERR: Bus error
1498   *     @arg I2C_IT_ARLO: Arbitration lost
1499   *     @arg I2C_IT_OVR: Overrun/Underrun
1500   *     @arg I2C_IT_PECERR: PEC error in reception
1501   *     @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
1502   *     @arg I2C_IT_ALERT: SMBus Alert
1503   * @retval The new state of I2C_IT (SET or RESET).
1504   */
1505 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
1506 {
1507   uint32_t tmpreg = 0;
1508   ITStatus bitstatus = RESET;
1509   uint32_t enablestatus = 0;
1510
1511   /* Check the parameters */
1512   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1513   assert_param(IS_I2C_GET_IT(I2C_IT));
1514
1515   /* Check if the interrupt source is enabled or not */
1516   /* If Error interrupt */
1517   if((uint32_t)(I2C_IT & ERROR_IT_MASK))
1518   {
1519     enablestatus = (uint32_t)((I2C_CR1_ERRIE) & (I2Cx->CR1));
1520   }
1521   /* If TC interrupt */
1522   else if((uint32_t)(I2C_IT & TC_IT_MASK))
1523   {
1524     enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1));
1525   }
1526   else
1527   {
1528     enablestatus = (uint32_t)((I2C_IT) & (I2Cx->CR1));
1529   }
1530
1531   /* Get the ISR register value */
1532   tmpreg = I2Cx->ISR;
1533
1534   /* Get flag status */
1535   tmpreg &= I2C_IT;
1536
1537   /* Check the status of the specified I2C flag */
1538   if((tmpreg != RESET) && enablestatus)
1539   {
1540     /* I2C_IT is set */
1541     bitstatus = SET;
1542   }
1543   else
1544   {
1545     /* I2C_IT is reset */
1546     bitstatus = RESET;
1547   }
1548
1549   /* Return the I2C_IT status */
1550   return bitstatus;
1551 }
1552
1553 /**
1554   * @brief  Clears the I2Cx's interrupt pending bits.
1555   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1556   * @param  I2C_IT: specifies the interrupt pending bit to clear.
1557   *   This parameter can be any combination of the following values:
1558   *     @arg I2C_IT_ADDR: Address matched (slave mode)
1559   *     @arg I2C_IT_NACKF: NACK received flag
1560   *     @arg I2C_IT_STOPF: STOP detection flag
1561   *     @arg I2C_IT_BERR: Bus error
1562   *     @arg I2C_IT_ARLO: Arbitration lost
1563   *     @arg I2C_IT_OVR: Overrun/Underrun
1564   *     @arg I2C_IT_PECERR: PEC error in reception
1565   *     @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
1566   *     @arg I2C_IT_ALERT: SMBus Alert
1567   * @retval The new state of I2C_IT (SET or RESET).
1568   */
1569 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
1570 {
1571   /* Check the parameters */
1572   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1573   assert_param(IS_I2C_CLEAR_IT(I2C_IT));
1574
1575   /* Clear the selected flag */
1576   I2Cx->ICR = I2C_IT;
1577 }
1578
1579 /**
1580   * @}
1581   */
1582
1583 /**
1584   * @}
1585   */
1586
1587 /**
1588   * @}
1589   */
1590
1591 /**
1592   * @}
1593   */
1594
1595 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/