tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_wwdg.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f30x_wwdg.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    27-February-2014
   7   * @brief   This file provides firmware functions to manage the following
   8   *          functionalities of the Window watchdog (WWDG) peripheral:
   9   *           + Prescaler, Refresh window and Counter configuration
  10   *           + WWDG activation
  11   *           + Interrupts and flags management
  12   *
  13   *  @verbatim
  14   *
  15   ==============================================================================
  16                            ##### WWDG features #####
  17   ==============================================================================
  18
  19     [..] Once enabled the WWDG generates a system reset on expiry of a programmed
  20         time period, unless the program refreshes the counter (downcounter)
  21         before to reach 0x3F value (i.e. a reset is generated when the counter
  22         value rolls over from 0x40 to 0x3F).
  23     [..] An MCU reset is also generated if the counter value is refreshed
  24         before the counter has reached the refresh window value. This
  25         implies that the counter must be refreshed in a limited window.
  26
  27     [..] Once enabled the WWDG cannot be disabled except by a system reset.
  28
  29     [..] WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
  30         reset occurs.
  31
  32     [..] The WWDG counter input clock is derived from the APB clock divided
  33         by a programmable prescaler.
  34
  35     [..] WWDG counter clock = PCLK1 / Prescaler.
  36     [..] WWDG timeout = (WWDG counter clock) * (counter value).
  37
  38     [..] Min-max timeout value @36MHz (PCLK1): ~114us / ~58.3ms.
  39
  40                      ##### How to use this driver #####
  41   ==============================================================================
  42     [..]
  43           (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE)
  44               function.
  45
  46           (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function.
  47
  48           (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function.
  49
  50           (#) Set the WWDG counter value and start it using WWDG_Enable() function.
  51              When the WWDG is enabled the counter value should be configured to
  52              a value greater than 0x40 to prevent generating an immediate reset.
  53
  54           (#) Optionally you can enable the Early wakeup interrupt which is
  55              generated when the counter reach 0x40.
  56              Once enabled this interrupt cannot be disabled except by a system reset.
  57
  58           (#) Then the application program must refresh the WWDG counter at regular
  59              intervals during normal operation to prevent an MCU reset, using
  60              WWDG_SetCounter() function. This operation must occur only when
  61              the counter value is lower than the refresh window value,
  62              programmed using WWDG_SetWindowValue().
  63
  64   @endverbatim
  65
  66   ******************************************************************************
  67   * @attention
  68   *
  69   * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
  70   *
  71   * Redistribution and use in source and binary forms, with or without modification,
  72   * are permitted provided that the following conditions are met:
  73   *   1. Redistributions of source code must retain the above copyright notice,
  74   *      this list of conditions and the following disclaimer.
  75   *   2. Redistributions in binary form must reproduce the above copyright notice,
  76   *      this list of conditions and the following disclaimer in the documentation
  77   *      and/or other materials provided with the distribution.
  78   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  79   *      may be used to endorse or promote products derived from this software
  80   *      without specific prior written permission.
  81   *
  82   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  83   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  84   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  85   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  86   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  87   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  88   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  89   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  90   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  91   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  92   *
  93   ******************************************************************************
  94   */
  95
  96 /* Includes ------------------------------------------------------------------*/
  97 #include "stm32f30x_wwdg.h"
  98 #include "stm32f30x_rcc.h"
  99
 100 /** @addtogroup STM32F30x_StdPeriph_Driver
 101   * @{
 102   */
 103
 104 /** @defgroup WWDG
 105   * @brief WWDG driver modules
 106   * @{
 107   */
 108
 109 /* Private typedef -----------------------------------------------------------*/
 110 /* Private define ------------------------------------------------------------*/
 111 /* --------------------- WWDG registers bit mask ---------------------------- */
 112 /* CFR register bit mask */
 113 #define CFR_WDGTB_MASK    ((uint32_t)0xFFFFFE7F)
 114 #define CFR_W_MASK        ((uint32_t)0xFFFFFF80)
 115 #define BIT_MASK          ((uint8_t)0x7F)
 116
 117 /* Private macro -------------------------------------------------------------*/
 118 /* Private variables ---------------------------------------------------------*/
 119 /* Private function prototypes -----------------------------------------------*/
 120 /* Private functions ---------------------------------------------------------*/
 121
 122 /** @defgroup WWDG_Private_Functions
 123   * @{
 124   */
 125
 126 /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
 127  *  @brief   Prescaler, Refresh window and Counter configuration functions
 128  *
 129 @verbatim
 130   ==============================================================================
 131     ##### Prescaler, Refresh window and Counter configuration functions #####
 132   ==============================================================================
 133
 134 @endverbatim
 135   * @{
 136   */
 137
 138 /**
 139   * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
 140   * @param  None
 141   * @retval None
 142   */
 143 void WWDG_DeInit(void)
 144 {
 145   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
 146   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
 147 }
 148
 149 /**
 150   * @brief  Sets the WWDG Prescaler.
 151   * @param  WWDG_Prescaler: specifies the WWDG Prescaler.
 152   *   This parameter can be one of the following values:
 153   *     @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
 154   *     @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
 155   *     @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
 156   *     @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
 157   * @retval None
 158   */
 159 void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
 160 {
 161   uint32_t tmpreg = 0;
 162   /* Check the parameters */
 163   assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
 164   /* Clear WDGTB[1:0] bits */
 165   tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
 166   /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
 167   tmpreg |= WWDG_Prescaler;
 168   /* Store the new value */
 169   WWDG->CFR = tmpreg;
 170 }
 171
 172 /**
 173   * @brief  Sets the WWDG window value.
 174   * @param  WindowValue: specifies the window value to be compared to the downcounter.
 175   *   This parameter value must be lower than 0x80.
 176   * @retval None
 177   */
 178 void WWDG_SetWindowValue(uint8_t WindowValue)
 179 {
 180   __IO uint32_t tmpreg = 0;
 181
 182   /* Check the parameters */
 183   assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
 184   /* Clear W[6:0] bits */
 185
 186   tmpreg = WWDG->CFR & CFR_W_MASK;
 187
 188   /* Set W[6:0] bits according to WindowValue value */
 189   tmpreg |= WindowValue & (uint32_t) BIT_MASK;
 190
 191   /* Store the new value */
 192   WWDG->CFR = tmpreg;
 193 }
 194
 195 /**
 196   * @brief  Enables the WWDG Early Wakeup interrupt(EWI).
 197   * @note   Once enabled this interrupt cannot be disabled except by a system reset.
 198   * @param  None
 199   * @retval None
 200   */
 201 void WWDG_EnableIT(void)
 202 {
 203   WWDG->CFR |= WWDG_CFR_EWI;
 204 }
 205
 206 /**
 207   * @brief  Sets the WWDG counter value.
 208   * @param  Counter: specifies the watchdog counter value.
 209   *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
 210   *   an immediate reset).
 211   * @retval None
 212   */
 213 void WWDG_SetCounter(uint8_t Counter)
 214 {
 215   /* Check the parameters */
 216   assert_param(IS_WWDG_COUNTER(Counter));
 217   /* Write to T[6:0] bits to configure the counter value, no need to do
 218      a read-modify-write; writing a 0 to WDGA bit does nothing */
 219   WWDG->CR = Counter & BIT_MASK;
 220 }
 221
 222 /**
 223   * @}
 224   */
 225
 226 /** @defgroup WWDG_Group2 WWDG activation functions
 227  *  @brief   WWDG activation functions
 228  *
 229 @verbatim
 230   ==============================================================================
 231                     ##### WWDG activation function #####
 232   ==============================================================================
 233
 234 @endverbatim
 235   * @{
 236   */
 237
 238 /**
 239   * @brief  Enables WWDG and load the counter value.
 240   * @param  Counter: specifies the watchdog counter value.
 241   *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
 242   *   an immediate reset).
 243   * @retval None
 244   */
 245 void WWDG_Enable(uint8_t Counter)
 246 {
 247   /* Check the parameters */
 248   assert_param(IS_WWDG_COUNTER(Counter));
 249   WWDG->CR = WWDG_CR_WDGA | Counter;
 250 }
 251
 252 /**
 253   * @}
 254   */
 255
 256 /** @defgroup WWDG_Group3 Interrupts and flags management functions
 257  *  @brief   Interrupts and flags management functions
 258  *
 259 @verbatim
 260   ==============================================================================
 261               ##### Interrupts and flags management functions #####
 262   ==============================================================================
 263
 264 @endverbatim
 265   * @{
 266   */
 267
 268 /**
 269   * @brief  Checks whether the Early Wakeup interrupt flag is set or not.
 270   * @param  None
 271   * @retval The new state of the Early Wakeup interrupt flag (SET or RESET).
 272   */
 273 FlagStatus WWDG_GetFlagStatus(void)
 274 {
 275   FlagStatus bitstatus = RESET;
 276
 277   if ((WWDG->SR) != (uint32_t)RESET)
 278   {
 279     bitstatus = SET;
 280   }
 281   else
 282   {
 283     bitstatus = RESET;
 284   }
 285   return bitstatus;
 286 }
 287
 288 /**
 289   * @brief  Clears Early Wakeup interrupt flag.
 290   * @param  None
 291   * @retval None
 292   */
 293 void WWDG_ClearFlag(void)
 294 {
 295   WWDG->SR = (uint32_t)RESET;
 296 }
 297
 298 /**
 299   * @}
 300   */
 301
 302 /**
 303   * @}
 304   */
 305
 306 /**
 307   * @}
 308   */
 309
 310 /**
 311   * @}
 312   */
 313
 314 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/