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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/adc_iodefine.h
1 /*******************************************************************************
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer*
21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : adc_iodefine.h
27 * Description : Definition of I/O Register (V1.00a)
28 ******************************************************************************/
29 #ifndef ADC_IODEFINE_H
30 #define ADC_IODEFINE_H
31 /* ->SEC M1.10.1 : Not magic number */
35 volatile uint16_t ADDRA
; /* ADDRA */
36 volatile uint16_t ADDRB
; /* ADDRB */
37 volatile uint16_t ADDRC
; /* ADDRC */
38 volatile uint16_t ADDRD
; /* ADDRD */
39 volatile uint16_t ADDRE
; /* ADDRE */
40 volatile uint16_t ADDRF
; /* ADDRF */
41 volatile uint16_t ADDRG
; /* ADDRG */
42 volatile uint16_t ADDRH
; /* ADDRH */
43 volatile uint8_t dummy32
[16]; /* */
44 volatile uint16_t ADCMPHA
; /* ADCMPHA */
45 volatile uint16_t ADCMPLA
; /* ADCMPLA */
46 volatile uint16_t ADCMPHB
; /* ADCMPHB */
47 volatile uint16_t ADCMPLB
; /* ADCMPLB */
48 volatile uint16_t ADCMPHC
; /* ADCMPHC */
49 volatile uint16_t ADCMPLC
; /* ADCMPLC */
50 volatile uint16_t ADCMPHD
; /* ADCMPHD */
51 volatile uint16_t ADCMPLD
; /* ADCMPLD */
52 volatile uint16_t ADCMPHE
; /* ADCMPHE */
53 volatile uint16_t ADCMPLE
; /* ADCMPLE */
54 volatile uint16_t ADCMPHF
; /* ADCMPHF */
55 volatile uint16_t ADCMPLF
; /* ADCMPLF */
56 volatile uint16_t ADCMPHG
; /* ADCMPHG */
57 volatile uint16_t ADCMPLG
; /* ADCMPLG */
58 volatile uint16_t ADCMPHH
; /* ADCMPHH */
59 volatile uint16_t ADCMPLH
; /* ADCMPLH */
60 volatile uint8_t dummy33
[32]; /* */
61 volatile uint16_t ADCSR
; /* ADCSR */
62 volatile uint16_t ADCMPER
; /* ADCMPER */
63 volatile uint16_t ADCMPSR
; /* ADCMPSR */
67 #define ADC (*(struct st_adc *)0xE8005800uL) /* ADC */
70 #define ADCADDRA ADC.ADDRA
71 #define ADCADDRB ADC.ADDRB
72 #define ADCADDRC ADC.ADDRC
73 #define ADCADDRD ADC.ADDRD
74 #define ADCADDRE ADC.ADDRE
75 #define ADCADDRF ADC.ADDRF
76 #define ADCADDRG ADC.ADDRG
77 #define ADCADDRH ADC.ADDRH
78 #define ADCADCMPHA ADC.ADCMPHA
79 #define ADCADCMPLA ADC.ADCMPLA
80 #define ADCADCMPHB ADC.ADCMPHB
81 #define ADCADCMPLB ADC.ADCMPLB
82 #define ADCADCMPHC ADC.ADCMPHC
83 #define ADCADCMPLC ADC.ADCMPLC
84 #define ADCADCMPHD ADC.ADCMPHD
85 #define ADCADCMPLD ADC.ADCMPLD
86 #define ADCADCMPHE ADC.ADCMPHE
87 #define ADCADCMPLE ADC.ADCMPLE
88 #define ADCADCMPHF ADC.ADCMPHF
89 #define ADCADCMPLF ADC.ADCMPLF
90 #define ADCADCMPHG ADC.ADCMPHG
91 #define ADCADCMPLG ADC.ADCMPLG
92 #define ADCADCMPHH ADC.ADCMPHH
93 #define ADCADCMPLH ADC.ADCMPLH
94 #define ADCADCSR ADC.ADCSR
95 #define ADCADCMPER ADC.ADCMPER
96 #define ADCADCMPSR ADC.ADCMPSR