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1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *
16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
17 */
18 #include "mbed_assert.h"
19 #include "analogin_api.h"
20 #include "cmsis.h"
21 #include "pinmap.h"
22 #include "mbed_error.h"
23 #include "gpio_api.h"
24
25 #define ANALOGIN_MEDIAN_FILTER 1
26
27 static inline int div_round_up(int x, int y) {
28 return (x + (y - 1)) / y;
29 }
30
31 static const PinMap PinMap_ADC[] = {
32 {P4_3, ADC0_0, 0},
33 {P4_1, ADC0_1, 0},
34 {PF_8, ADC0_2, 0},
35 {P7_5, ADC0_3, 0},
36 {P7_4, ADC0_4, 0},
37 {PF_10, ADC0_5, 0},
38 {PB_6, ADC0_6, 0},
39 {PC_3, ADC1_0, 0},
40 {PC_0, ADC1_1, 0},
41 {PF_9, ADC1_2, 0},
42 {PF_6, ADC1_3, 0},
43 {PF_5, ADC1_4, 0},
44 {PF_11, ADC1_5, 0},
45 {P7_7, ADC1_6, 0},
46 {PF_7, ADC1_7, 0},
47 {NC, NC, 0 }
48 };
49
50 void analogin_init(analogin_t *obj, PinName pin) {
51 ADCName name;
52
53 name = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
54 MBED_ASSERT(obj->adc != (LPC_ADC_T *)NC);
55
56 // Set ADC register, number and channel
57 obj->num = (name >> ADC0_7) ? 1 : 0;
58 obj->ch = name % (ADC0_7 + 1);
59 obj->adc = (LPC_ADC_T *) (obj->num > 0) ? LPC_ADC1 : LPC_ADC0;
60
61 // Reset pin function to GPIO
62 gpio_set(pin);
63 // Select ADC on analog function select register in SCU
64 LPC_SCU->ENAIO[obj->num] |= (1 << obj->ch);
65
66 // Calculate minimum clock divider
67 // clkdiv = divider - 1
68 uint32_t PCLK = SystemCoreClock;
69 uint32_t adcRate = 400000;
70 uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1;
71
72 // Set the generic software-controlled ADC settings
73 obj->adc->CR = (0 << 0) // SEL: 0 = no channels selected
74 | (clkdiv << 8) // CLKDIV:
75 | (0 << 16) // BURST: 0 = software control
76 | (1 << 21) // PDN: 1 = operational
77 | (0 << 24) // START: 0 = no start
78 | (0 << 27); // EDGE: not applicable
79 }
80
81 static inline uint32_t adc_read(analogin_t *obj) {
82 uint32_t temp;
83 uint8_t channel = obj->ch;
84 LPC_ADC_T *pADC = obj->adc;
85
86 // Select the appropriate channel and start conversion
87 pADC->CR |= ADC_CR_CH_SEL(channel);
88 temp = pADC->CR & ~ADC_CR_START_MASK;
89 pADC->CR = temp | (ADC_CR_START_MODE_SEL(ADC_START_NOW));
90
91 // Wait for DONE bit and read data
92 while (!(pADC->STAT & ADC_CR_CH_SEL(channel)));
93 temp = pADC->DR[channel];
94
95 // Deselect channel and return result
96 pADC->CR &= ~ADC_CR_START_MASK;
97 pADC->CR &= ~ADC_CR_CH_SEL(channel);
98 return ADC_DR_RESULT(temp);
99 }
100
101 static inline void order(uint32_t *a, uint32_t *b) {
102 if (*a > *b) {
103 uint32_t t = *a;
104 *a = *b;
105 *b = t;
106 }
107 }
108
109 static inline uint32_t adc_read_u32(analogin_t *obj) {
110 uint32_t value;
111 #if ANALOGIN_MEDIAN_FILTER
112 uint32_t v1 = adc_read(obj);
113 uint32_t v2 = adc_read(obj);
114 uint32_t v3 = adc_read(obj);
115 order(&v1, &v2);
116 order(&v2, &v3);
117 order(&v1, &v2);
118 value = v2;
119 #else
120 value = adc_read(obj);
121 #endif
122 return value;
123 }
124
125 uint16_t analogin_read_u16(analogin_t *obj) {
126 uint32_t value = adc_read_u32(obj);
127
128 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
129 }
130
131 float analogin_read(analogin_t *obj) {
132 uint32_t value = adc_read_u32(obj);
133 return (float)value * (1.0f / (float)ADC_RANGE);
134 }
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