tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/analogin_api.c

   1 /* mbed Microcontroller Library
   2  * Copyright (c) 2006-2013 ARM Limited
   3  *
   4  * Licensed under the Apache License, Version 2.0 (the "License");
   5  * you may not use this file except in compliance with the License.
   6  * You may obtain a copy of the License at
   7  *
   8  *     http://www.apache.org/licenses/LICENSE-2.0
   9  *
  10  * Unless required by applicable law or agreed to in writing, software
  11  * distributed under the License is distributed on an "AS IS" BASIS,
  12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13  * See the License for the specific language governing permissions and
  14  * limitations under the License.
  15  */
  16 #include "mbed_assert.h"
  17 #include "analogin_api.h"
  18 #include "cmsis.h"
  19 #include "pinmap.h"
  20 #include "PeripheralNames.h"
  21
  22 #if DEVICE_ANALOGIN
  23
  24 #define ANALOGIN_MEDIAN_FILTER      1
  25
  26 #define ADC_RANGE    0xFFF
  27
  28 static const PinMap PinMap_ADC[] = {
  29     {P0_7 , ADC_0, 0},
  30     {P0_6 , ADC_1, 0},
  31     {P0_14, ADC_2, 0},
  32     {P0_23, ADC_3, 0},
  33     {P0_22, ADC_4, 0},
  34     {P0_21, ADC_5, 0},
  35     {P0_20, ADC_6, 0},
  36     {P0_19, ADC_7, 0},
  37     {P0_18, ADC_8, 0},
  38     {P0_17, ADC_9, 0},
  39     {P0_13, ADC_10,0},
  40     {P0_4 , ADC_11,0},
  41 };
  42
  43 void analogin_init(analogin_t *obj, PinName pin)
  44 {
  45     obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
  46     MBED_ASSERT(obj->adc != (ADCName)NC);
  47
  48     LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6);
  49     // pin enable
  50     LPC_SWM->PINENABLE0 &= ~(1UL << (13 + obj->adc));
  51     // configure GPIO as input
  52     LPC_GPIO_PORT->DIR0 &= ~(1UL << (pin >> PIN_SHIFT));
  53
  54     LPC_SYSCON->PDRUNCFG &= ~(1 << 4);
  55     LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 24);
  56
  57     __IO LPC_ADC_Type *adc_reg = LPC_ADC;
  58
  59     // determine the system clock divider for a 500kHz ADC clock during calibration
  60     uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
  61
  62     // perform a self-calibration
  63     adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
  64     while ((adc_reg->CTRL & (1UL << 30)) != 0);
  65 }
  66
  67 static inline uint32_t adc_read(analogin_t *obj)
  68 {
  69     uint32_t channels;
  70     __IO LPC_ADC_Type *adc_reg = LPC_ADC;
  71
  72     channels = (obj->adc & 0x1F);
  73
  74     // select channel
  75     adc_reg->SEQA_CTRL &= ~(0xFFF);
  76     adc_reg->SEQA_CTRL |= (1UL << channels);
  77
  78     // start conversion and sequence enable
  79     adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
  80
  81     // Repeatedly get the sample data until DONE bit
  82     volatile uint32_t data;
  83     do {
  84         data = adc_reg->SEQA_GDAT;
  85     } while ((data & (1UL << 31)) == 0);
  86
  87     // Stop conversion
  88     adc_reg->SEQA_CTRL &= ~(1UL << 31);
  89
  90     return ((data >> 4) & ADC_RANGE);
  91 }
  92
  93 static inline void order(uint32_t *a, uint32_t *b)
  94 {
  95     if (*a > *b) {
  96         uint32_t t = *a;
  97         *a = *b;
  98         *b = t;
  99     }
 100 }
 101
 102 static inline uint32_t adc_read_u32(analogin_t *obj)
 103 {
 104     uint32_t value;
 105 #if ANALOGIN_MEDIAN_FILTER
 106     uint32_t v1 = adc_read(obj);
 107     uint32_t v2 = adc_read(obj);
 108     uint32_t v3 = adc_read(obj);
 109     order(&v1, &v2);
 110     order(&v2, &v3);
 111     order(&v1, &v2);
 112     value = v2;
 113 #else
 114     value = adc_read(obj);
 115 #endif
 116     return value;
 117 }
 118
 119 uint16_t analogin_read_u16(analogin_t *obj)
 120 {
 121     uint32_t value = adc_read_u32(obj);
 122     return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
 123 }
 124
 125 float analogin_read(analogin_t *obj)
 126 {
 127     uint32_t value = adc_read_u32(obj);
 128     return (float)value * (1.0f / (float)ADC_RANGE);
 129 }
 130
 131 #endif