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git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/HAL_CM3.c
1 /*----------------------------------------------------------------------------
3 *----------------------------------------------------------------------------
5 * Purpose: Hardware Abstraction Layer for Cortex-M3
7 *----------------------------------------------------------------------------
9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
10 * All rights reserved.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 * - Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * - Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * - Neither the name of ARM nor the names of its contributors may be used
19 * to endorse or promote products derived from this software without
20 * specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 *---------------------------------------------------------------------------*/
35 #include "rt_TypeDef.h"
37 #include "rt_System.h"
38 #include "rt_HAL_CM.h"
40 #include "rt_MemBox.h"
43 /*----------------------------------------------------------------------------
45 *---------------------------------------------------------------------------*/
48 /*--------------------------- rt_set_PSP ------------------------------------*/
50 __asm
void rt_set_PSP (U32 stack
) {
56 /*--------------------------- rt_get_PSP ------------------------------------*/
58 __asm U32
rt_get_PSP (void) {
64 /*--------------------------- os_set_env ------------------------------------*/
66 __asm
void os_set_env (void) {
67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
70 LDR R0
,=__cpp(&os_flags
)
73 MOVNE R0
,#0x02 ; Privileged Thread mode, use PSP
74 MOVEQ R0
,#0x03 ; Unprivileged Thread mode, use PSP
82 /*--------------------------- _alloc_box ------------------------------------*/
84 __asm
void *_alloc_box (void *box_mem
) {
85 /* Function wrapper for Unprivileged/Privileged mode. */
86 LDR R12
,=__cpp(rt_alloc_box
)
100 /*--------------------------- _free_box -------------------------------------*/
102 __asm
int _free_box (void *box_mem
, void *box
) {
103 /* Function wrapper for Unprivileged/Privileged mode. */
104 LDR R12
,=__cpp(rt_free_box
)
118 /*-------------------------- SVC_Handler ------------------------------------*/
120 __asm
void SVC_Handler (void) {
127 MRS R0
,PSP
; Read PSP
128 LDR R1
,[R0
,#24] ; Read Saved PC from Stack
129 LDRB R1
,[R1
,#-2] ; Load SVC Number
132 LDM R0
,{R0
-R3
,R12
} ; Read R0
-R3
,R12 from stack
133 BLX R12
; Call SVC Function
135 MRS R12
,PSP
; Read PSP
136 STM R12
,{R0
-R2
} ; Store
return values
138 LDR R3
,=__cpp(&os_tsk
)
139 LDM R3
,{R1
,R2
} ; os_tsk
.run
, os_tsk
.new
141 BEQ SVC_Exit
; no task
switch
143 CBZ R1
,SVC_Next
; Runtask deleted
?
144 STMDB R12
!,{R4
-R11
} ; Save Old context
145 STR R12
,[R1
,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
148 BL rt_stk_check
; Check
for Stack overflow
152 STR R2
,[R3
] ; os_tsk
.run
= os_tsk
.new
154 LDR R12
,[R2
,#TCB_TSTACK] ; os_tsk.new->tsk_stack
155 LDMIA R12
!,{R4
-R11
} ; Restore New Context
156 MSR PSP
,R12
; Write PSP
159 MVN LR
,#:NOT:0xFFFFFFFD ; set EXC_RETURN value
162 /*------------------- User SVC ------------------------------*/
165 PUSH
{R4
,LR
} ; Save Registers
169 BHI SVC_Done
; Overflow
172 LDR R4
,[R4
,R1
,LSL
#2] ; Load SVC Function Address
174 LDM R0
,{R0
-R3
,R12
} ; Read R0
-R3
,R12 from stack
175 BLX R4
; Call SVC Function
178 STM R12
,{R0
-R3
} ; Function
return values
186 /*-------------------------- PendSV_Handler ---------------------------------*/
188 __asm
void PendSV_Handler (void) {
194 LDR R3
,=__cpp(&os_tsk
)
195 LDM R3
,{R1
,R2
} ; os_tsk
.run
, os_tsk
.new
199 MRS R12
,PSP
; Read PSP
200 STMDB R12
!,{R4
-R11
} ; Save Old context
201 STR R12
,[R1
,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
204 BL rt_stk_check
; Check
for Stack overflow
207 STR R2
,[R3
] ; os_tsk
.run
= os_tsk
.new
209 LDR R12
,[R2
,#TCB_TSTACK] ; os_tsk.new->tsk_stack
210 LDMIA R12
!,{R4
-R11
} ; Restore New Context
211 MSR PSP
,R12
; Write PSP
214 MVN LR
,#:NOT:0xFFFFFFFD ; set EXC_RETURN value
215 BX LR
; Return to Thread Mode
221 /*-------------------------- SysTick_Handler --------------------------------*/
223 __asm
void SysTick_Handler (void) {
233 /*-------------------------- OS_Tick_Handler --------------------------------*/
235 __asm
void OS_Tick_Handler (void) {
238 BL
__cpp(os_tick_irqack
)
246 /*----------------------------------------------------------------------------
248 *---------------------------------------------------------------------------*/