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Merge commit '1fe4406f374291ab2e86e95a97341fd9c475fcb8'
[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / USBHost / USBHost / TARGET_RENESAS / TARGET_RZ_A1H / usb1 / src / common / usb1_host_dataio.c
1 /*******************************************************************************
2 * DISCLAIMER
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
19 * following link:
20 * http://www.renesas.com/disclaimer
21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : usb1_host_dataio.c
25 * $Rev: 1116 $
26 * $Date:: 2014-07-09 16:29:19 +0900#$
27 * Device(s) : RZ/A1H
28 * Tool-Chain :
29 * OS : None
30 * H/W Platform :
31 * Description : RZ/A1H R7S72100 USB Sample Program
32 * Operation :
33 * Limitations :
34 *******************************************************************************/
35
36
37 /*******************************************************************************
38 Includes <System Includes> , "Project Includes"
39 *******************************************************************************/
40 #include "usb1_host.h"
41
42
43 /*******************************************************************************
44 Typedef definitions
45 *******************************************************************************/
46
47
48 /*******************************************************************************
49 Macro definitions
50 *******************************************************************************/
51
52
53 /*******************************************************************************
54 Imported global variables and functions (from other files)
55 *******************************************************************************/
56
57
58 /*******************************************************************************
59 Exported global variables and functions (to be accessed by other files)
60 *******************************************************************************/
61
62
63 /*******************************************************************************
64 Private global variables and functions
65 *******************************************************************************/
66 static uint16_t g_usb1_host_mbw[(USB_HOST_MAX_PIPE_NO + 1)];
67
68 static void usb1_host_start_receive_trns_c(uint16_t pipe, uint32_t size, uint8_t *data);
69 static void usb1_host_start_receive_trns_d0(uint16_t pipe, uint32_t size, uint8_t *data);
70 static void usb1_host_start_receive_trns_d1(uint16_t pipe, uint32_t size, uint8_t *data);
71 static void usb1_host_start_receive_dma_d0(uint16_t pipe, uint32_t size, uint8_t *data);
72 static void usb1_host_start_receive_dma_d1(uint16_t pipe, uint32_t size, uint8_t *data);
73 static uint16_t usb1_host_read_dma_d0(uint16_t pipe);
74 static uint16_t usb1_host_read_dma_d1(uint16_t pipe);
75 static uint16_t usb1_host_write_dma_d0(uint16_t pipe);
76 static uint16_t usb1_host_write_dma_d1(uint16_t pipe);
77
78 static void usb1_host_read_c_fifo(uint16_t pipe, uint16_t count);
79 static void usb1_host_write_c_fifo(uint16_t Pipe, uint16_t count);
80 static void usb1_host_read_d0_fifo(uint16_t pipe, uint16_t count);
81 static void usb1_host_write_d0_fifo(uint16_t pipe, uint16_t count);
82 static void usb1_host_read_d1_fifo(uint16_t pipe, uint16_t count);
83 static void usb1_host_write_d1_fifo(uint16_t pipe, uint16_t count);
84
85 static void usb1_host_clear_transaction_counter(uint16_t pipe);
86 static void usb1_host_set_transaction_counter(uint16_t pipe, uint32_t count);
87
88 static uint32_t usb1_host_com_get_dmasize(uint32_t trncount, uint32_t dtptr);
89
90 static uint16_t usb1_host_set_dfacc_d0(uint16_t mbw, uint32_t count);
91 static uint16_t usb1_host_set_dfacc_d1(uint16_t mbw, uint32_t count);
92
93
94 /*******************************************************************************
95 * Function Name: usb1_host_start_send_transfer
96 * Description : Starts the USB data communication using pipe specified by the argument.
97 * Arguments : uint16_t pipe ; Pipe Number
98 * : uint32_t size ; Data Size
99 * : uint8_t *data ; Data data Address
100 * Return Value : USB_HOST_WRITEEND ; Write end
101 * : USB_HOST_WRITESHRT ; short data
102 * : USB_HOST_WRITING ; Continue of data write
103 * : USB_HOST_WRITEDMA ; Write DMA
104 * : USB_HOST_FIFOERROR ; FIFO status
105 *******************************************************************************/
106 uint16_t usb1_host_start_send_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
107 {
108 uint16_t status;
109 uint16_t usefifo;
110 uint16_t mbw;
111
112 g_usb1_host_data_count[pipe] = size;
113 g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
114 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
115
116 usb1_host_clear_bemp_sts(pipe);
117 usb1_host_clear_brdy_sts(pipe);
118 usb1_host_clear_nrdy_sts(pipe);
119
120 mbw = usb1_host_get_mbw(size, (uint32_t)data);
121
122 usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
123
124 switch (usefifo)
125 {
126 case USB_HOST_D0FIFO_USE:
127 case USB_HOST_D0FIFO_DMA:
128 usefifo = USB_HOST_D0USE;
129 break;
130
131 case USB_HOST_D1FIFO_USE:
132 case USB_HOST_D1FIFO_DMA:
133 usefifo = USB_HOST_D1USE;
134 break;
135
136 default:
137 usefifo = USB_HOST_CUSE;
138 break;
139 };
140
141 usb1_host_set_curpipe(USB_HOST_PIPE0, usefifo, USB_HOST_NO, mbw);
142
143 usb1_host_clear_transaction_counter(pipe);
144
145 #if(1) /* ohci_wrapp */
146 #else
147 usb1_host_aclrm(pipe);
148 #endif
149
150 status = usb1_host_write_buffer(pipe);
151
152 if (status != USB_HOST_FIFOERROR)
153 {
154 usb1_host_set_pid_buf(pipe);
155 }
156
157 return status;
158 }
159
160 /*******************************************************************************
161 * Function Name: usb1_host_write_buffer
162 * Description : Writes data in the buffer allocated in the pipe specified by
163 * : the argument. The FIFO for using is set in the pipe definition table.
164 * Arguments : uint16_t pipe ; Pipe Number
165 * Return Value : USB_HOST_WRITEEND ; Write end
166 * : USB_HOST_WRITESHRT ; short data
167 * : USB_HOST_WRITING ; Continue of data write
168 * : USB_HOST_WRITEDMA ; Write DMA
169 * : USB_HOST_FIFOERROR ; FIFO status
170 *******************************************************************************/
171 uint16_t usb1_host_write_buffer (uint16_t pipe)
172 {
173 uint16_t status;
174 uint16_t usefifo;
175
176 g_usb1_host_PipeIgnore[pipe] = 0;
177 usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
178
179 switch (usefifo)
180 {
181 case USB_HOST_D0FIFO_USE:
182 status = usb1_host_write_buffer_d0(pipe);
183 break;
184
185 case USB_HOST_D1FIFO_USE:
186 status = usb1_host_write_buffer_d1(pipe);
187 break;
188
189 case USB_HOST_D0FIFO_DMA:
190 status = usb1_host_write_dma_d0(pipe);
191 break;
192
193 case USB_HOST_D1FIFO_DMA:
194 status = usb1_host_write_dma_d1(pipe);
195 break;
196
197 default:
198 status = usb1_host_write_buffer_c(pipe);
199 break;
200 };
201
202 switch (status)
203 {
204 case USB_HOST_WRITING: /* Continue of data write */
205 usb1_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
206 usb1_host_enable_brdy_int(pipe); /* Enable Ready Interrupt */
207 break;
208
209 case USB_HOST_WRITEEND: /* End of data write */
210 case USB_HOST_WRITESHRT: /* End of data write */
211 usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
212
213 usb1_host_clear_nrdy_sts(pipe);
214 usb1_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
215
216 /* for last transfer */
217 usb1_host_enable_bemp_int(pipe); /* Enable Empty Interrupt */
218 break;
219
220 case USB_HOST_WRITEDMA: /* DMA write */
221 usb1_host_clear_nrdy_sts(pipe);
222 usb1_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
223 break;
224
225 case USB_HOST_FIFOERROR: /* FIFO access status */
226 default:
227 usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
228 usb1_host_disable_bemp_int(pipe); /* Disable Empty Interrupt */
229 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
230 break;
231 }
232
233 return status; /* End or Err or Continue */
234 }
235
236 /*******************************************************************************
237 * Function Name: usb1_host_write_buffer_c
238 * Description : Writes data in the buffer allocated in the pipe specified in
239 * : the argument. Writes data by CPU transfer using CFIFO.
240 * Arguments : uint16_t pipe ; Pipe Number
241 * Return Value : USB_HOST_WRITEEND ; Write end
242 * : USB_HOST_WRITESHRT ; short data
243 * : USB_HOST_WRITING ; Continue of data write
244 * : USB_HOST_WRITEDMA ; Write DMA
245 * : USB_HOST_FIFOERROR ; FIFO status
246 *******************************************************************************/
247 uint16_t usb1_host_write_buffer_c (uint16_t pipe)
248 {
249 uint32_t count;
250 uint16_t size;
251 uint16_t buffer;
252 uint16_t mxps;
253 uint16_t status;
254 uint16_t mbw;
255
256 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
257
258 if (pipe == USB_HOST_PIPE0)
259 {
260 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_CFIFO_WRITE, mbw);
261 }
262 else
263 {
264 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
265 }
266
267 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
268 {
269 return USB_HOST_FIFOERROR;
270 }
271
272 size = usb1_host_get_buf_size(pipe); /* Data buffer size */
273 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
274
275 if (g_usb1_host_data_count[pipe] <= (uint32_t)size)
276 {
277 status = USB_HOST_WRITEEND; /* write continues */
278 count = g_usb1_host_data_count[pipe];
279
280 if (count == 0)
281 {
282 status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
283 }
284
285 if ((count % mxps) != 0)
286 {
287 status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
288 }
289 }
290 else
291 {
292 status = USB_HOST_WRITING; /* write continues */
293 count = (uint32_t)size;
294 }
295
296 usb1_host_write_c_fifo(pipe, (uint16_t)count);
297
298 if (g_usb1_host_data_count[pipe] < (uint32_t)size)
299 {
300 g_usb1_host_data_count[pipe] = 0;
301
302 if (RZA_IO_RegRead_16(&USB201.CFIFOCTR,
303 USB_CFIFOCTR_BVAL_SHIFT,
304 USB_CFIFOCTR_BVAL) == 0)
305 {
306 USB201.CFIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
307 }
308 }
309 else
310 {
311 g_usb1_host_data_count[pipe] -= count;
312 }
313
314 return status; /* End or Err or Continue */
315 }
316
317 /*******************************************************************************
318 * Function Name: usb1_host_write_buffer_d0
319 * Description : Writes data in the buffer allocated in the pipe specified in the argument.
320 * : Writes data by CPU transfer using D0FIFO.
321 * Arguments : uint16_t pipe ; Pipe Number
322 * Return Value : USB_HOST_WRITEEND ; Write end
323 * : USB_HOST_WRITESHRT ; short data
324 * : USB_HOST_WRITING ; Continue of data write
325 * : USB_HOST_WRITEDMA ; Write DMA
326 * : USB_HOST_FIFOERROR ; FIFO status
327 *******************************************************************************/
328 uint16_t usb1_host_write_buffer_d0 (uint16_t pipe)
329 {
330 uint32_t count;
331 uint16_t size;
332 uint16_t buffer;
333 uint16_t mxps;
334 uint16_t status;
335 uint16_t mbw;
336
337 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
338 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
339
340 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
341 {
342 return USB_HOST_FIFOERROR;
343 }
344
345 size = usb1_host_get_buf_size(pipe); /* Data buffer size */
346 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
347
348 if (g_usb1_host_data_count[pipe] <= (uint32_t)size)
349 {
350 status = USB_HOST_WRITEEND; /* write continues */
351 count = g_usb1_host_data_count[pipe];
352
353 if (count == 0)
354 {
355 status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
356 }
357
358 if ((count % mxps) != 0)
359 {
360 status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
361 }
362 }
363 else
364 {
365 status = USB_HOST_WRITING; /* write continues */
366 count = (uint32_t)size;
367 }
368
369 usb1_host_write_d0_fifo(pipe, (uint16_t)count);
370
371 if (g_usb1_host_data_count[pipe] < (uint32_t)size)
372 {
373 g_usb1_host_data_count[pipe] = 0;
374
375 if (RZA_IO_RegRead_16(&USB201.D0FIFOCTR,
376 USB_DnFIFOCTR_BVAL_SHIFT,
377 USB_DnFIFOCTR_BVAL) == 0)
378 {
379 USB201.D0FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
380 }
381 }
382 else
383 {
384 g_usb1_host_data_count[pipe] -= count;
385 }
386
387 return status; /* End or Err or Continue */
388 }
389
390 /*******************************************************************************
391 * Function Name: usb1_host_write_buffer_d1
392 * Description : Writes data in the buffer allocated in the pipe specified in the argument.
393 * : Writes data by CPU transfer using D1FIFO.
394 * Arguments : uint16_t pipe ; Pipe Number
395 * Return Value : USB_HOST_WRITEEND ; Write end
396 * : USB_HOST_WRITESHRT ; short data
397 * : USB_HOST_WRITING ; Continue of data write
398 * : USB_HOST_WRITEDMA ; Write DMA
399 * : USB_HOST_FIFOERROR ; FIFO status
400 *******************************************************************************/
401 uint16_t usb1_host_write_buffer_d1 (uint16_t pipe)
402 {
403 uint32_t count;
404 uint16_t size;
405 uint16_t buffer;
406 uint16_t mxps;
407 uint16_t status;
408 uint16_t mbw;
409
410 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
411 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
412
413 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
414 {
415 return USB_HOST_FIFOERROR;
416 }
417
418 size = usb1_host_get_buf_size(pipe); /* Data buffer size */
419 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
420
421 if (g_usb1_host_data_count[pipe] <= (uint32_t)size)
422 {
423 status = USB_HOST_WRITEEND; /* write continues */
424 count = g_usb1_host_data_count[pipe];
425
426 if (count == 0)
427 {
428 status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
429 }
430
431 if ((count % mxps) != 0)
432 {
433 status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
434 }
435 }
436 else
437 {
438 status = USB_HOST_WRITING; /* write continues */
439 count = (uint32_t)size;
440 }
441
442 usb1_host_write_d1_fifo(pipe, (uint16_t)count);
443
444 if (g_usb1_host_data_count[pipe] < (uint32_t)size)
445 {
446 g_usb1_host_data_count[pipe] = 0;
447
448 if (RZA_IO_RegRead_16(&USB201.D1FIFOCTR,
449 USB_DnFIFOCTR_BVAL_SHIFT,
450 USB_DnFIFOCTR_BVAL) == 0)
451 {
452 USB201.D1FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
453 }
454 }
455 else
456 {
457 g_usb1_host_data_count[pipe] -= count;
458 }
459
460 return status; /* End or Err or Continue */
461 }
462
463 /*******************************************************************************
464 * Function Name: usb1_host_write_dma_d0
465 * Description : Writes data in the buffer allocated in the pipe specified in the argument.
466 * : Writes data by DMA transfer using D0FIFO.
467 * : The DMA-ch for using is specified by Userdef_USB_usb1_host_start_dma().
468 * Arguments : uint16_t pipe ; Pipe Number
469 * Return Value : USB_HOST_WRITEEND : Write end
470 * : USB_HOST_WRITESHRT : short data
471 * : USB_HOST_WRITING : Continue of data write
472 * : USB_HOST_WRITEDMA : Write DMA
473 * : USB_HOST_FIFOERROR : FIFO status
474 *******************************************************************************/
475 static uint16_t usb1_host_write_dma_d0 (uint16_t pipe)
476 {
477 uint32_t count;
478 uint16_t size;
479 uint16_t buffer;
480 uint16_t status;
481 uint16_t mbw;
482 uint16_t dfacc = 0;
483
484 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
485 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
486
487 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
488 {
489 return USB_HOST_FIFOERROR;
490 }
491
492 size = usb1_host_get_buf_size(pipe); /* Data buffer size */
493 count = g_usb1_host_data_count[pipe];
494
495 if (count != 0)
496 {
497 g_usb1_host_DmaPipe[USB_HOST_D0FIFO] = pipe;
498
499 if ((count % size) != 0)
500 {
501 g_usb1_host_DmaBval[USB_HOST_D0FIFO] = 1;
502 }
503 else
504 {
505 g_usb1_host_DmaBval[USB_HOST_D0FIFO] = 0;
506 }
507
508 dfacc = usb1_host_set_dfacc_d0(mbw, count);
509
510 if (mbw == USB_HOST_BITMBW_32)
511 {
512 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
513 }
514 else if (mbw == USB_HOST_BITMBW_16)
515 {
516 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
517 }
518 else
519 {
520 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
521 }
522
523 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
524 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_BUF2FIFO;
525 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
526 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
527
528 Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
529
530 usb1_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw, dfacc);
531
532 RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
533 1,
534 USB_DnFIFOSEL_DREQE_SHIFT,
535 USB_DnFIFOSEL_DREQE);
536
537 g_usb1_host_data_count[pipe] = 0;
538 g_usb1_host_data_pointer[pipe] += count;
539
540 status = USB_HOST_WRITEDMA; /* DMA write */
541 }
542 else
543 {
544 if (RZA_IO_RegRead_16(&USB201.D0FIFOCTR,
545 USB_DnFIFOCTR_BVAL_SHIFT,
546 USB_DnFIFOCTR_BVAL) == 0)
547 {
548 RZA_IO_RegWrite_16(&USB201.D0FIFOCTR,
549 1,
550 USB_DnFIFOCTR_BVAL_SHIFT,
551 USB_DnFIFOCTR_BVAL); /* Short Packet */
552 }
553 status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
554 }
555
556 return status; /* End or Err or Continue */
557 }
558
559 /*******************************************************************************
560 * Function Name: usb1_host_write_dma_d1
561 * Description : Writes data in the buffer allocated in the pipe specified in the argument.
562 * : Writes data by DMA transfer using D1FIFO.
563 * : The DMA-ch for using is specified by Userdef_USB_usb1_host_start_dma().
564 * Arguments : uint16_t pipe ; Pipe Number
565 * Return Value : USB_HOST_WRITEEND : Write end
566 * : USB_HOST_WRITESHRT : short data
567 * : USB_HOST_WRITING : Continue of data write
568 * : USB_HOST_WRITEDMA : Write DMA
569 * : USB_HOST_FIFOERROR : FIFO status
570 *******************************************************************************/
571 static uint16_t usb1_host_write_dma_d1 (uint16_t pipe)
572 {
573 uint32_t count;
574 uint16_t size;
575 uint16_t buffer;
576 uint16_t status;
577 uint16_t mbw;
578 uint16_t dfacc = 0;
579
580 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
581 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
582
583 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
584 {
585 return USB_HOST_FIFOERROR;
586 }
587
588 size = usb1_host_get_buf_size(pipe); /* Data buffer size */
589 count = g_usb1_host_data_count[pipe];
590
591 if (count != 0)
592 {
593 g_usb1_host_DmaPipe[USB_HOST_D1FIFO] = pipe;
594
595 if ((count % size) != 0)
596 {
597 g_usb1_host_DmaBval[USB_HOST_D1FIFO] = 1;
598 }
599 else
600 {
601 g_usb1_host_DmaBval[USB_HOST_D1FIFO] = 0;
602 }
603
604 dfacc = usb1_host_set_dfacc_d1(mbw, count);
605
606 if (mbw == USB_HOST_BITMBW_32)
607 {
608 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
609 }
610 else if (mbw == USB_HOST_BITMBW_16)
611 {
612 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
613 }
614 else
615 {
616 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
617 }
618
619 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
620 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_BUF2FIFO;
621 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
622 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
623
624 Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
625
626 usb1_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw , dfacc);
627
628 RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
629 1,
630 USB_DnFIFOSEL_DREQE_SHIFT,
631 USB_DnFIFOSEL_DREQE);
632
633 g_usb1_host_data_count[pipe] = 0;
634 g_usb1_host_data_pointer[pipe] += count;
635
636 status = USB_HOST_WRITEDMA; /* DMA write */
637 }
638 else
639 {
640 if (RZA_IO_RegRead_16(&USB201.D1FIFOCTR,
641 USB_DnFIFOCTR_BVAL_SHIFT,
642 USB_DnFIFOCTR_BVAL) == 0)
643 {
644 RZA_IO_RegWrite_16(&USB201.D1FIFOCTR,
645 1,
646 USB_DnFIFOCTR_BVAL_SHIFT,
647 USB_DnFIFOCTR_BVAL); /* Short Packet */
648 }
649 status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
650 }
651
652 return status; /* End or Err or Continue */
653 }
654
655 /*******************************************************************************
656 * Function Name: usb1_host_start_receive_transfer
657 * Description : Starts USB data reception using the pipe specified in the argument.
658 * : The FIFO for using is set in the pipe definition table.
659 * Arguments : uint16_t pipe ; Pipe Number
660 * : uint32_t size ; Data Size
661 * : uint8_t *data ; Data Address
662 * Return Value : none
663 *******************************************************************************/
664 void usb1_host_start_receive_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
665 {
666 uint16_t usefifo;
667
668 usb1_host_clear_bemp_sts(pipe);
669 usb1_host_clear_brdy_sts(pipe);
670 usb1_host_clear_nrdy_sts(pipe);
671
672 usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
673
674 switch (usefifo)
675 {
676 case USB_HOST_D0FIFO_USE:
677 usb1_host_start_receive_trns_d0(pipe, size, data);
678 break;
679
680 case USB_HOST_D1FIFO_USE:
681 usb1_host_start_receive_trns_d1(pipe, size, data);
682 break;
683
684 case USB_HOST_D0FIFO_DMA:
685 usb1_host_start_receive_dma_d0(pipe, size, data);
686 break;
687
688 case USB_HOST_D1FIFO_DMA:
689 usb1_host_start_receive_dma_d1(pipe, size, data);
690 break;
691
692 default:
693 usb1_host_start_receive_trns_c(pipe, size, data);
694 break;
695 }
696 }
697
698 /*******************************************************************************
699 * Function Name: usb1_host_start_receive_trns_c
700 * Description : Reads data from the buffer allocated in the pipe specified in the argument.
701 * : Reads data by CPU transfer using CFIFO.
702 * : When storing data in the buffer allocated in the pipe specified in the
703 * : argument, BRDY interrupt is generated to read data
704 * : in the interrupt.
705 * Arguments : uint16_t pipe ; Pipe Number
706 * : uint32_t size ; Data Size
707 * : uint8_t *data ; Data Address
708 * Return Value : none
709 *******************************************************************************/
710 static void usb1_host_start_receive_trns_c (uint16_t pipe, uint32_t size, uint8_t * data)
711 {
712 uint16_t mbw;
713
714 usb1_host_set_pid_nak(pipe);
715 g_usb1_host_data_count[pipe] = size;
716 g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
717 g_usb1_host_PipeIgnore[pipe] = 0;
718
719 g_usb1_host_PipeDataSize[pipe] = size;
720 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
721
722 mbw = usb1_host_get_mbw(size, (uint32_t)data);
723 usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_CFIFO_READ, mbw);
724 USB201.CFIFOCTR = USB_HOST_BITBCLR;
725
726 usb1_host_set_transaction_counter(pipe, size);
727
728 #if(1) /* ohci_wrapp */
729 #else
730 usb1_host_aclrm(pipe);
731 #endif
732
733 usb1_host_enable_nrdy_int(pipe);
734 usb1_host_enable_brdy_int(pipe);
735
736 usb1_host_set_pid_buf(pipe);
737 }
738
739 /*******************************************************************************
740 * Function Name: usb1_host_start_receive_trns_d0
741 * Description : Reads data from the buffer allocated in the pipe specified in the argument.
742 * : Reads data by CPU transfer using D0FIFO.
743 * : This function does not read data from the buffer.
744 * : When storing data in the buffer allocated in the pipe specified
745 * : in the argument, BRDY interrupt is generated to read data in the
746 * : interrupt.
747 * Arguments : uint16_t pipe ; Pipe Number
748 * : uint32_t size ; Data Size
749 * : uint8_t *data ; Data Address
750 * Return Value : none
751 *******************************************************************************/
752 static void usb1_host_start_receive_trns_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
753 {
754 uint16_t mbw;
755
756 usb1_host_set_pid_nak(pipe);
757 g_usb1_host_data_count[pipe] = size;
758 g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
759 g_usb1_host_PipeIgnore[pipe] = 0;
760
761 g_usb1_host_PipeDataSize[pipe] = size;
762 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
763
764 mbw = usb1_host_get_mbw(size, (uint32_t)data);
765 usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
766
767 usb1_host_set_transaction_counter(pipe, size);
768
769 #if(1) /* ohci_wrapp */
770 #else
771 usb1_host_aclrm(pipe);
772 #endif
773
774 usb1_host_enable_nrdy_int(pipe);
775 usb1_host_enable_brdy_int(pipe);
776
777 usb1_host_set_pid_buf(pipe);
778 }
779
780 /*******************************************************************************
781 * Function Name: usb1_host_start_receive_trns_d1
782 * Description : Reads data from the buffer allocated in the pipe specified in the argument.
783 * : Reads data by CPU transfer using D1FIFO.
784 * : This function does not read data from the buffer.
785 * : When storing data in the buffer allocated in the pipe specified
786 * : in the argument, BRDY interrupt is generated to read data.
787 * Arguments : uint16_t pipe ; Pipe Number
788 * : uint32_t size ; Data Size
789 * : uint8_t *data ; Data Address
790 * Return Value : none
791 *******************************************************************************/
792 static void usb1_host_start_receive_trns_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
793 {
794 uint16_t mbw;
795
796 usb1_host_set_pid_nak(pipe);
797 g_usb1_host_data_count[pipe] = size;
798 g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
799 g_usb1_host_PipeIgnore[pipe] = 0;
800
801 g_usb1_host_PipeDataSize[pipe] = size;
802 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
803
804 mbw = usb1_host_get_mbw(size, (uint32_t)data);
805 usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
806
807 usb1_host_set_transaction_counter(pipe, size);
808
809 #if(1) /* ohci_wrapp */
810 #else
811 usb1_host_aclrm(pipe);
812 #endif
813
814 usb1_host_enable_nrdy_int(pipe);
815 usb1_host_enable_brdy_int(pipe);
816
817 usb1_host_set_pid_buf(pipe);
818 }
819
820 /*******************************************************************************
821 * Function Name: usb1_host_start_receive_dma_d0
822 * Description : Reads data from the buffer allocated in the pipe specified in the argument.
823 * : Reads data by DMA transfer using D0FIFO.
824 * : This function does not read data from the buffer.
825 * : When storing data in the buffer allocated in the pipe specified
826 * : in the argument, delivered read request to DMAC to read data from
827 * : the buffer by DMAC.
828 * Arguments : uint16_t pipe ; Pipe Number
829 * : uint32_t size ; Data Size
830 * : uint8_t *data ; Data Address
831 * Return Value : none
832 *******************************************************************************/
833 static void usb1_host_start_receive_dma_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
834 {
835 uint16_t mbw;
836
837 usb1_host_set_pid_nak(pipe);
838 g_usb1_host_data_count[pipe] = size;
839 g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
840 g_usb1_host_PipeIgnore[pipe] = 0;
841
842 g_usb1_host_PipeDataSize[pipe] = 0;
843 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
844
845 mbw = usb1_host_get_mbw(size, (uint32_t)data);
846 usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
847
848 usb1_host_set_transaction_counter(pipe, size);
849
850 #if(1) /* ohci_wrapp */
851 #else
852 usb1_host_aclrm(pipe);
853 #endif
854
855 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
856 {
857 usb1_host_read_dma(pipe);
858
859 usb1_host_enable_nrdy_int(pipe);
860 usb1_host_enable_brdy_int(pipe);
861 }
862 else
863 {
864 usb1_host_enable_nrdy_int(pipe);
865 usb1_host_enable_brdy_int(pipe);
866 }
867
868 usb1_host_set_pid_buf(pipe);
869 }
870
871 /*******************************************************************************
872 * Function Name: usb1_host_start_receive_dma_d1
873 * Description : Read data from the buffer allocated in the pipe specified in the argument.
874 * : Reads data by DMA transfer using D0FIFO.
875 * : This function does not read data from the buffer.
876 * : When storing data in the buffer allocated in the pipe specified
877 * : in the argument, delivered read request to DMAC to read data from
878 * : the buffer by DMAC.
879 * Arguments : uint16_t pipe ; Pipe Number
880 * : uint32_t size ; Data Size
881 * : uint8_t *data ; Data Address
882 * Return Value : none
883 *******************************************************************************/
884 static void usb1_host_start_receive_dma_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
885 {
886 uint16_t mbw;
887
888 usb1_host_set_pid_nak(pipe);
889 g_usb1_host_data_count[pipe] = size;
890 g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
891 g_usb1_host_PipeIgnore[pipe] = 0;
892
893 g_usb1_host_PipeDataSize[pipe] = 0;
894 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
895
896 mbw = usb1_host_get_mbw(size, (uint32_t)data);
897 usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
898
899 usb1_host_set_transaction_counter(pipe, size);
900
901 #if(1) /* ohci_wrapp */
902 #else
903 usb1_host_aclrm(pipe);
904 #endif
905
906 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
907 {
908 usb1_host_read_dma(pipe);
909
910 usb1_host_enable_nrdy_int(pipe);
911 usb1_host_enable_brdy_int(pipe);
912 }
913 else
914 {
915 usb1_host_enable_nrdy_int(pipe);
916 usb1_host_enable_brdy_int(pipe);
917 }
918
919 usb1_host_set_pid_buf(pipe);
920 }
921
922 /*******************************************************************************
923 * Function Name: usb1_host_read_buffer
924 * Description : Reads data from the buffer allocated in the pipe specified
925 * : in the argument.
926 * : Uses FIF0 set in the pipe definition table.
927 * Arguments : uint16_t pipe ; Pipe Number
928 * Return Value : USB_HOST_READEND ; Read end
929 * : USB_HOST_READSHRT ; short data
930 * : USB_HOST_READING ; Continue of data read
931 * : USB_HOST_READOVER ; buffer over
932 * : USB_HOST_FIFOERROR ; FIFO status
933 *******************************************************************************/
934 uint16_t usb1_host_read_buffer (uint16_t pipe)
935 {
936 uint16_t status;
937
938 g_usb1_host_PipeIgnore[pipe] = 0;
939
940 if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
941 {
942 status = usb1_host_read_buffer_d0(pipe);
943 }
944 else if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
945 {
946 status = usb1_host_read_buffer_d1(pipe);
947 }
948 else
949 {
950 status = usb1_host_read_buffer_c(pipe);
951 }
952
953 switch (status)
954 {
955 case USB_HOST_READING: /* Continue of data read */
956 break;
957
958 case USB_HOST_READEND: /* End of data read */
959 case USB_HOST_READSHRT: /* End of data read */
960 usb1_host_disable_brdy_int(pipe);
961 g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
962 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
963 break;
964
965 case USB_HOST_READOVER: /* buffer over */
966 if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
967 {
968 USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
969 }
970 else if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
971 {
972 USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
973 }
974 else
975 {
976 USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
977 }
978 usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
979 #if(1) /* ohci_wrapp */
980 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
981 #else
982 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
983 #endif
984 g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
985 break;
986
987 case USB_HOST_FIFOERROR: /* FIFO access status */
988 default:
989 usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
990 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
991 break;
992 }
993
994 return status; /* End or Err or Continue */
995 }
996
997 /*******************************************************************************
998 * Function Name: usb1_host_read_buffer_c
999 * Description : Reads data from the buffer allocated in the pipe specified in the argument.
1000 * : Reads data by CPU transfer using CFIFO.
1001 * Arguments : uint16_t pipe ; Pipe Number
1002 * Return Value : USB_HOST_READEND ; Read end
1003 * : USB_HOST_READSHRT ; short data
1004 * : USB_HOST_READING ; Continue of data read
1005 * : USB_HOST_READOVER ; buffer over
1006 * : USB_HOST_FIFOERROR ; FIFO status
1007 *******************************************************************************/
1008 uint16_t usb1_host_read_buffer_c (uint16_t pipe)
1009 {
1010 uint32_t count;
1011 uint32_t dtln;
1012 uint16_t buffer;
1013 uint16_t mxps;
1014 uint16_t status;
1015 uint16_t mbw;
1016
1017 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
1018 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
1019
1020 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
1021 {
1022 return USB_HOST_FIFOERROR;
1023 }
1024
1025 dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
1026 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
1027
1028 if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
1029 {
1030 status = USB_HOST_READOVER;
1031 usb1_host_set_pid_nak(pipe); /* Set NAK */
1032 count = g_usb1_host_data_count[pipe];
1033 }
1034 else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
1035 {
1036 status = USB_HOST_READEND;
1037 usb1_host_set_pid_nak(pipe); /* Set NAK */
1038 count = dtln;
1039
1040 if (count == 0)
1041 {
1042 status = USB_HOST_READSHRT; /* Null Packet receive */
1043 }
1044
1045 if ((count % mxps) != 0)
1046 {
1047 status = USB_HOST_READSHRT; /* Short Packet receive */
1048 }
1049 }
1050 else /* continue Receive data */
1051 {
1052 status = USB_HOST_READING;
1053 count = dtln;
1054
1055 if (count == 0)
1056 {
1057 status = USB_HOST_READSHRT; /* Null Packet receive */
1058 usb1_host_set_pid_nak(pipe); /* Set NAK */
1059 }
1060
1061 if ((count % mxps) != 0)
1062 {
1063 status = USB_HOST_READSHRT; /* Short Packet receive */
1064 usb1_host_set_pid_nak(pipe); /* Set NAK */
1065 }
1066 }
1067
1068 if (count == 0) /* 0 length packet */
1069 {
1070 USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
1071 }
1072 else
1073 {
1074 usb1_host_read_c_fifo(pipe, (uint16_t)count);
1075 }
1076
1077 g_usb1_host_data_count[pipe] -= count;
1078
1079 return status; /* End or Err or Continue */
1080 }
1081
1082 /*******************************************************************************
1083 * Function Name: usb1_host_read_buffer_d0
1084 * Description : Reads data from the buffer allocated in the pipe specified in
1085 * : the argument.
1086 * : Reads data by CPU transfer using D0FIFO.
1087 * Arguments : uint16_t pipe ; Pipe Number
1088 * Return Value : USB_HOST_READEND ; Read end
1089 * : USB_HOST_READSHRT ; short data
1090 * : USB_HOST_READING ; Continue of data read
1091 * : USB_HOST_READOVER ; buffer over
1092 * : USB_HOST_FIFOERROR ; FIFO status
1093 *******************************************************************************/
1094 uint16_t usb1_host_read_buffer_d0 (uint16_t pipe)
1095 {
1096 uint32_t count;
1097 uint32_t dtln;
1098 uint16_t buffer;
1099 uint16_t mxps;
1100 uint16_t status;
1101 uint16_t mbw;
1102 uint16_t pipebuf_size;
1103
1104 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
1105 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
1106
1107 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
1108 {
1109 return USB_HOST_FIFOERROR;
1110 }
1111
1112 dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
1113 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
1114
1115 if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
1116 {
1117 status = USB_HOST_READOVER;
1118 usb1_host_set_pid_nak(pipe); /* Set NAK */
1119 count = g_usb1_host_data_count[pipe];
1120 }
1121 else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
1122 {
1123 status = USB_HOST_READEND;
1124 usb1_host_set_pid_nak(pipe); /* Set NAK */
1125 count = dtln;
1126
1127 if (count == 0)
1128 {
1129 status = USB_HOST_READSHRT; /* Null Packet receive */
1130 }
1131
1132 if ((count % mxps) != 0)
1133 {
1134 status = USB_HOST_READSHRT; /* Short Packet receive */
1135 }
1136 }
1137 else /* continue Receive data */
1138 {
1139 status = USB_HOST_READING;
1140 count = dtln;
1141
1142 if (count == 0)
1143 {
1144 status = USB_HOST_READSHRT; /* Null Packet receive */
1145 usb1_host_set_pid_nak(pipe); /* Set NAK */
1146 }
1147
1148 if ((count % mxps) != 0)
1149 {
1150 status = USB_HOST_READSHRT; /* Short Packet receive */
1151 usb1_host_set_pid_nak(pipe); /* Set NAK */
1152 }
1153 else
1154 {
1155 pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
1156
1157 if (count != pipebuf_size)
1158 {
1159 status = USB_HOST_READSHRT; /* Short Packet receive */
1160 usb1_host_set_pid_nak(pipe); /* Set NAK */
1161 }
1162 }
1163 }
1164
1165 if (count == 0) /* 0 length packet */
1166 {
1167 USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
1168 }
1169 else
1170 {
1171 usb1_host_read_d0_fifo(pipe, (uint16_t)count);
1172 }
1173
1174 g_usb1_host_data_count[pipe] -= count;
1175
1176 return status; /* End or Err or Continue */
1177 }
1178
1179 /*******************************************************************************
1180 * Function Name: usb1_host_read_buffer_d1
1181 * Description : Reads data from the buffer allocated in the pipe specified
1182 * : in the argument.
1183 * : Reads data by CPU transfer using D1FIFO.
1184 * Arguments : uint16_t pipe ; Pipe Number
1185 * Return Value : USB_HOST_READEND ; Read end
1186 * : USB_HOST_READSHRT ; short data
1187 * : USB_HOST_READING ; Continue of data read
1188 * : USB_HOST_READOVER ; buffer over
1189 * : USB_HOST_FIFOERROR ; FIFO status
1190 *******************************************************************************/
1191 uint16_t usb1_host_read_buffer_d1 (uint16_t pipe)
1192 {
1193 uint32_t count;
1194 uint32_t dtln;
1195 uint16_t buffer;
1196 uint16_t mxps;
1197 uint16_t status;
1198 uint16_t mbw;
1199 uint16_t pipebuf_size;
1200
1201 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
1202 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
1203
1204 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
1205 {
1206 return USB_HOST_FIFOERROR;
1207 }
1208
1209 dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
1210 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
1211
1212 if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
1213 {
1214 status = USB_HOST_READOVER;
1215 usb1_host_set_pid_nak(pipe); /* Set NAK */
1216 count = g_usb1_host_data_count[pipe];
1217 }
1218 else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
1219 {
1220 status = USB_HOST_READEND;
1221 usb1_host_set_pid_nak(pipe); /* Set NAK */
1222 count = dtln;
1223
1224 if (count == 0)
1225 {
1226 status = USB_HOST_READSHRT; /* Null Packet receive */
1227 }
1228
1229 if ((count % mxps) !=0)
1230 {
1231 status = USB_HOST_READSHRT; /* Short Packet receive */
1232 }
1233 }
1234 else /* continue Receive data */
1235 {
1236 status = USB_HOST_READING;
1237 count = dtln;
1238
1239 if (count == 0)
1240 {
1241 status = USB_HOST_READSHRT; /* Null Packet receive */
1242 usb1_host_set_pid_nak(pipe); /* Set NAK */
1243 }
1244
1245 if ((count % mxps) != 0)
1246 {
1247 status = USB_HOST_READSHRT; /* Short Packet receive */
1248 usb1_host_set_pid_nak(pipe); /* Set NAK */
1249 }
1250 else
1251 {
1252 pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
1253 if (count != pipebuf_size)
1254 {
1255 status = USB_HOST_READSHRT; /* Short Packet receive */
1256 usb1_host_set_pid_nak(pipe); /* Set NAK */
1257 }
1258 }
1259 }
1260
1261 if (count == 0) /* 0 length packet */
1262 {
1263 USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
1264 }
1265 else
1266 {
1267 usb1_host_read_d1_fifo(pipe, (uint16_t)count);
1268 }
1269
1270 g_usb1_host_data_count[pipe] -= count;
1271
1272 return status; /* End or Err or Continue */
1273 }
1274
1275 /*******************************************************************************
1276 * Function Name: usb1_host_read_dma
1277 * Description : Reads data from the buffer allocated in the pipe specified
1278 * : in the argument.
1279 * : Reads data by DMA transfer using D0FIFO or D1FIFO.
1280 * Arguments : uint16_t pipe ; Pipe Number
1281 * Return Value : USB_HOST_READEND ; Read end
1282 * : USB_HOST_READSHRT ; short data
1283 * : USB_HOST_READZERO ; zero data
1284 * : USB_HOST_READING ; Continue of data read
1285 * : USB_HOST_READOVER ; buffer over
1286 * : USB_HOST_FIFOERROR ; FIFO status
1287 *******************************************************************************/
1288 uint16_t usb1_host_read_dma (uint16_t pipe)
1289 {
1290 uint16_t status;
1291
1292 g_usb1_host_PipeIgnore[pipe] = 0;
1293
1294 if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
1295 {
1296 status = usb1_host_read_dma_d0(pipe);
1297 }
1298 else
1299 {
1300 status = usb1_host_read_dma_d1(pipe);
1301 }
1302
1303 switch (status)
1304 {
1305 case USB_HOST_READING: /* Continue of data read */
1306 break;
1307
1308 case USB_HOST_READZERO: /* End of data read */
1309 usb1_host_disable_brdy_int(pipe);
1310 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
1311 break;
1312
1313 case USB_HOST_READEND: /* End of data read */
1314 case USB_HOST_READSHRT: /* End of data read */
1315 usb1_host_disable_brdy_int(pipe);
1316
1317 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
1318 {
1319 g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
1320 }
1321 break;
1322
1323 case USB_HOST_READOVER: /* buffer over */
1324 usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
1325
1326 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
1327 {
1328 g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
1329 }
1330 #if(1) /* ohci_wrapp */
1331 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
1332 #else
1333 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
1334 #endif
1335 break;
1336
1337 case USB_HOST_FIFOERROR: /* FIFO access status */
1338 default:
1339 usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
1340 g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
1341 break;
1342 }
1343
1344 return status; /* End or Err or Continue */
1345 }
1346
1347 /*******************************************************************************
1348 * Function Name: usb1_host_read_dma_d0
1349 * Description : Writes data in the buffer allocated in the pipe specified
1350 * : in the argument.
1351 * : Reads data by DMA transfer using D0FIFO.
1352 * Arguments : uint16_t pipe ; Pipe Number
1353 * Return Value : USB_HOST_READEND ; Read end
1354 * : USB_HOST_READSHRT ; short data
1355 * : USB_HOST_READZERO ; zero data
1356 * : USB_HOST_READING ; Continue of data read
1357 * : USB_HOST_READOVER ; buffer over
1358 * : USB_HOST_FIFOERROR ; FIFO status
1359 *******************************************************************************/
1360 static uint16_t usb1_host_read_dma_d0 (uint16_t pipe)
1361 {
1362 uint32_t count;
1363 uint32_t dtln;
1364 uint16_t buffer;
1365 uint16_t mxps;
1366 uint16_t status;
1367 uint16_t mbw;
1368 uint16_t dfacc = 0;
1369 uint16_t pipebuf_size;
1370
1371 g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
1372
1373 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
1374
1375 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
1376 {
1377 count = g_usb1_host_data_count[pipe];
1378 status = USB_HOST_READING;
1379 }
1380 else
1381 {
1382 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
1383
1384 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
1385 {
1386 return USB_HOST_FIFOERROR;
1387 }
1388
1389 dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
1390 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
1391
1392 if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
1393 {
1394 status = USB_HOST_READOVER;
1395 count = g_usb1_host_data_count[pipe];
1396 }
1397 else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
1398 {
1399 status = USB_HOST_READEND;
1400 count = dtln;
1401
1402 if (count == 0)
1403 {
1404 status = USB_HOST_READSHRT; /* Null Packet receive */
1405 }
1406
1407 if ((count % mxps) != 0)
1408 {
1409 status = USB_HOST_READSHRT; /* Short Packet receive */
1410 }
1411 }
1412 else /* continue Receive data */
1413 {
1414 status = USB_HOST_READING;
1415 count = dtln;
1416
1417 if (count == 0)
1418 {
1419 status = USB_HOST_READSHRT; /* Null Packet receive */
1420 }
1421
1422 if ((count % mxps) != 0)
1423 {
1424 status = USB_HOST_READSHRT; /* Short Packet receive */
1425 }
1426 else
1427 {
1428 pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
1429
1430 if (count != pipebuf_size)
1431 {
1432 status = USB_HOST_READSHRT; /* Short Packet receive */
1433 }
1434 }
1435 }
1436 }
1437
1438 if (count == 0) /* 0 length packet */
1439 {
1440 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
1441 {
1442 USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
1443 status = USB_HOST_READZERO; /* Null Packet receive */
1444 }
1445 else
1446 {
1447 usb1_host_set_curpipe(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
1448 /* transaction counter No set */
1449 /* FRDY = 1, DTLN = 0 -> BRDY */
1450 }
1451 }
1452 else
1453 {
1454 dfacc = usb1_host_set_dfacc_d0(mbw, count);
1455
1456 if (mbw == USB_HOST_BITMBW_32)
1457 {
1458 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
1459 }
1460 else if (mbw == USB_HOST_BITMBW_16)
1461 {
1462 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
1463 }
1464 else
1465 {
1466 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
1467 }
1468
1469 g_usb1_host_DmaPipe[USB_HOST_D0FIFO] = pipe; /* not use in read operation */
1470 g_usb1_host_DmaBval[USB_HOST_D0FIFO] = 0; /* not use in read operation */
1471
1472 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
1473 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_FIFO2BUF;
1474 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
1475 g_usb1_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
1476
1477 if (status == USB_HOST_READING)
1478 {
1479 g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSY;
1480 }
1481 else
1482 {
1483 g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSYEND;
1484 }
1485
1486 Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
1487
1488 usb1_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw , dfacc);
1489
1490 RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
1491 1,
1492 USB_DnFIFOSEL_DREQE_SHIFT,
1493 USB_DnFIFOSEL_DREQE);
1494 }
1495
1496 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
1497 {
1498 g_usb1_host_data_count[pipe] -= count;
1499 g_usb1_host_data_pointer[pipe] += count;
1500 g_usb1_host_PipeDataSize[pipe] += count;
1501 }
1502
1503 return status; /* End or Err or Continue */
1504 }
1505
1506 /*******************************************************************************
1507 * Function Name: usb1_host_read_dma_d1
1508 * Description : Reads data from the buffer allocated in the pipe specified in
1509 * : the argument.
1510 * : Reads data by DMA transfer using D1FIFO.
1511 * Arguments : uint16_t pipe ; Pipe Number
1512 * Return Value : USB_HOST_READEND ; Read end
1513 * : USB_HOST_READSHRT ; short data
1514 * : USB_HOST_READZERO ; zero data
1515 * : USB_HOST_READING ; Continue of data read
1516 * : USB_HOST_READOVER ; buffer over
1517 * : USB_HOST_FIFOERROR ; FIFO status
1518 *******************************************************************************/
1519 static uint16_t usb1_host_read_dma_d1 (uint16_t pipe)
1520 {
1521 uint32_t count;
1522 uint32_t dtln;
1523 uint16_t buffer;
1524 uint16_t mxps;
1525 uint16_t status;
1526 uint16_t mbw;
1527 uint16_t dfacc = 0;
1528 uint16_t pipebuf_size;
1529
1530 g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
1531
1532 mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
1533
1534 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
1535 {
1536 count = g_usb1_host_data_count[pipe];
1537 status = USB_HOST_READING;
1538 }
1539 else
1540 {
1541 buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
1542
1543 if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
1544 {
1545 return USB_HOST_FIFOERROR;
1546 }
1547
1548 dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
1549 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
1550
1551 if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
1552 {
1553 status = USB_HOST_READOVER;
1554 count = g_usb1_host_data_count[pipe];
1555 }
1556 else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
1557 {
1558 status = USB_HOST_READEND;
1559 count = dtln;
1560
1561 if (count == 0)
1562 {
1563 status = USB_HOST_READSHRT; /* Null Packet receive */
1564 }
1565
1566 if ((count % mxps) != 0)
1567 {
1568 status = USB_HOST_READSHRT; /* Short Packet receive */
1569 }
1570 }
1571 else /* continue Receive data */
1572 {
1573 status = USB_HOST_READING;
1574 count = dtln;
1575
1576 if (count == 0)
1577 {
1578 status = USB_HOST_READSHRT; /* Null Packet receive */
1579 }
1580
1581 if ((count % mxps) != 0)
1582 {
1583 status = USB_HOST_READSHRT; /* Short Packet receive */
1584 }
1585 else
1586 {
1587 pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
1588
1589 if (count != pipebuf_size)
1590 {
1591 status = USB_HOST_READSHRT; /* Short Packet receive */
1592 }
1593 }
1594 }
1595 }
1596
1597 if (count == 0) /* 0 length packet */
1598 {
1599 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
1600 {
1601 USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
1602 status = USB_HOST_READZERO; /* Null Packet receive */
1603 }
1604 else
1605 {
1606 usb1_host_set_curpipe(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
1607 /* transaction counter No set */
1608 /* FRDY = 1, DTLN = 0 -> BRDY */
1609 }
1610 }
1611 else
1612 {
1613 dfacc = usb1_host_set_dfacc_d1(mbw, count);
1614
1615 if (mbw == USB_HOST_BITMBW_32)
1616 {
1617 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
1618 }
1619 else if (mbw == USB_HOST_BITMBW_16)
1620 {
1621 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
1622 }
1623 else
1624 {
1625 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
1626 }
1627
1628 g_usb1_host_DmaPipe[USB_HOST_D1FIFO] = pipe; /* not use in read operation */
1629 g_usb1_host_DmaBval[USB_HOST_D1FIFO] = 0; /* not use in read operation */
1630
1631 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
1632 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_FIFO2BUF;
1633 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
1634 g_usb1_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
1635
1636 if (status == USB_HOST_READING)
1637 {
1638 g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSY;
1639 }
1640 else
1641 {
1642 g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSYEND;
1643 }
1644
1645 Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
1646
1647 usb1_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw , dfacc);
1648
1649 RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
1650 1,
1651 USB_DnFIFOSEL_DREQE_SHIFT,
1652 USB_DnFIFOSEL_DREQE);
1653 }
1654
1655 if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
1656 {
1657 g_usb1_host_data_count[pipe] -= count;
1658 g_usb1_host_data_pointer[pipe] += count;
1659 g_usb1_host_PipeDataSize[pipe] += count;
1660 }
1661
1662 return status; /* End or Err or Continue */
1663 }
1664
1665 /*******************************************************************************
1666 * Function Name: usb1_host_change_fifo_port
1667 * Description : Allocates FIF0 specified by the argument in the pipe assigned
1668 * : by the argument. After allocating FIF0, waits in the software
1669 * : till the corresponding pipe becomes ready.
1670 * Arguments : uint16_t pipe ; Pipe Number
1671 * : uint16_t fifosel ; Select FIFO
1672 * : uint16_t isel ; FIFO Access Direction
1673 * : uint16_t mbw ; FIFO Port Access Bit Width
1674 * Return Value : USB_HOST_FIFOERROR ; Error
1675 * : Others ; CFIFOCTR/D0FIFOCTR/D1FIFOCTR Register Value
1676 *******************************************************************************/
1677 uint16_t usb1_host_change_fifo_port (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
1678 {
1679 uint16_t buffer;
1680 uint32_t loop;
1681 volatile uint32_t loop2;
1682
1683 usb1_host_set_curpipe(pipe, fifosel, isel, mbw);
1684
1685 for (loop = 0; loop < 4; loop++)
1686 {
1687 switch (fifosel)
1688 {
1689 case USB_HOST_CUSE:
1690 buffer = USB201.CFIFOCTR;
1691 break;
1692
1693 case USB_HOST_D0USE:
1694 case USB_HOST_D0DMA:
1695 buffer = USB201.D0FIFOCTR;
1696 break;
1697
1698 case USB_HOST_D1USE:
1699 case USB_HOST_D1DMA:
1700 buffer = USB201.D1FIFOCTR;
1701 break;
1702
1703 default:
1704 buffer = 0;
1705 break;
1706 }
1707
1708 if ((buffer & USB_HOST_BITFRDY) == USB_HOST_BITFRDY)
1709 {
1710 return buffer;
1711 }
1712
1713 loop2 = 25;
1714
1715 while (loop2-- > 0)
1716 {
1717 /* wait */
1718 }
1719 }
1720
1721 return USB_HOST_FIFOERROR;
1722 }
1723
1724 /*******************************************************************************
1725 * Function Name: usb1_host_set_curpipe
1726 * Description : Allocates FIF0 specified by the argument in the pipe assigned
1727 * : by the argument.
1728 * Arguments : uint16_t pipe ; Pipe Number
1729 * : uint16_t fifosel ; Select FIFO
1730 * : uint16_t isel ; FIFO Access Direction
1731 * : uint16_t mbw ; FIFO Port Access Bit Width
1732 * Return Value : none
1733 *******************************************************************************/
1734 void usb1_host_set_curpipe (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
1735 {
1736 uint16_t buffer;
1737 uint32_t loop;
1738 volatile uint32_t loop2;
1739
1740 g_usb1_host_mbw[pipe] = mbw;
1741
1742 switch (fifosel)
1743 {
1744 case USB_HOST_CUSE:
1745 buffer = USB201.CFIFOSEL;
1746 buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
1747 buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
1748 USB201.CFIFOSEL = buffer;
1749
1750 for (loop = 0; loop < 4; loop++)
1751 {
1752 if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
1753 == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
1754 {
1755 break;
1756 }
1757
1758 loop2 = 100;
1759 while (loop2-- > 0)
1760 {
1761 /* wait */
1762 }
1763 }
1764
1765 buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
1766 buffer |= (uint16_t)(isel | pipe | mbw);
1767 USB201.CFIFOSEL = buffer;
1768
1769 for (loop = 0; loop < 4; loop++)
1770 {
1771 if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
1772 == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
1773 {
1774 break;
1775 }
1776
1777 loop2 = 100;
1778 while (loop2-- > 0)
1779 {
1780 /* wait */
1781 }
1782 }
1783 break;
1784
1785 case USB_HOST_D0DMA:
1786 case USB_HOST_D0USE:
1787 buffer = USB201.D0FIFOSEL;
1788 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
1789 USB201.D0FIFOSEL = buffer;
1790
1791 for (loop = 0; loop < 4; loop++)
1792 {
1793 if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
1794 {
1795 break;
1796 }
1797
1798 loop2 = 100;
1799 while (loop2-- > 0)
1800 {
1801 /* wait */
1802 }
1803 }
1804 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
1805 buffer |= (uint16_t)(pipe | mbw);
1806 USB201.D0FIFOSEL = buffer;
1807
1808 for (loop = 0; loop < 4; loop++)
1809 {
1810 if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
1811 {
1812 break;
1813 }
1814
1815 loop2 = 100;
1816 while (loop2-- > 0)
1817 {
1818 /* wait */
1819 }
1820 }
1821 break;
1822
1823 case USB_HOST_D1DMA:
1824 case USB_HOST_D1USE:
1825 buffer = USB201.D1FIFOSEL;
1826 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
1827 USB201.D1FIFOSEL = buffer;
1828
1829 for (loop = 0; loop < 4; loop++)
1830 {
1831 if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
1832 {
1833 break;
1834 }
1835
1836 loop2 = 100;
1837 while (loop2-- > 0)
1838 {
1839 /* wait */
1840 }
1841 }
1842
1843 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
1844 buffer |= (uint16_t)(pipe | mbw);
1845 USB201.D1FIFOSEL = buffer;
1846
1847 for (loop = 0; loop < 4; loop++)
1848 {
1849 if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
1850 {
1851 break;
1852 }
1853
1854 loop2 = 100;
1855 while (loop2-- > 0)
1856 {
1857 /* wait */
1858 }
1859 }
1860 break;
1861
1862 default:
1863 break;
1864 }
1865
1866 /* Cautions !!!
1867 * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
1868 * For details, please look at the data sheet. */
1869 loop2 = 100;
1870
1871 while (loop2-- > 0)
1872 {
1873 /* wait */
1874 }
1875 }
1876
1877 /*******************************************************************************
1878 * Function Name: usb1_host_set_curpipe2
1879 * Description : Allocates FIF0 specified by the argument in the pipe assigned
1880 * : by the argument.(DFACC)
1881 * Arguments : uint16_t pipe ; Pipe Number
1882 * : uint16_t fifosel ; Select FIFO
1883 * : uint16_t isel ; FIFO Access Direction
1884 * : uint16_t mbw ; FIFO Port Access Bit Width
1885 * : uint16_t dfacc ; DFACC Access mode
1886 * Return Value : none
1887 *******************************************************************************/
1888 void usb1_host_set_curpipe2 (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc)
1889 {
1890 uint16_t buffer;
1891 uint32_t loop;
1892 #ifdef __USB_HOST_DF_ACC_ENABLE__
1893 uint32_t dummy;
1894 #endif
1895 volatile uint32_t loop2;
1896
1897 g_usb1_host_mbw[pipe] = mbw;
1898
1899 switch (fifosel)
1900 {
1901 case USB_HOST_CUSE:
1902 buffer = USB201.CFIFOSEL;
1903 buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
1904 buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
1905 USB201.CFIFOSEL = buffer;
1906
1907 for (loop = 0; loop < 4; loop++)
1908 {
1909 if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
1910 == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
1911 {
1912 break;
1913 }
1914
1915 loop2 = 100;
1916 while (loop2-- > 0)
1917 {
1918 /* wait */
1919 }
1920 }
1921
1922 buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
1923 buffer |= (uint16_t)(isel | pipe | mbw);
1924 USB201.CFIFOSEL = buffer;
1925
1926 for (loop = 0; loop < 4; loop++)
1927 {
1928 if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
1929 == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
1930 {
1931 break;
1932 }
1933
1934 loop2 = 100;
1935 while (loop2-- > 0)
1936 {
1937 /* wait */
1938 }
1939 }
1940 break;
1941
1942 case USB_HOST_D0DMA:
1943 case USB_HOST_D0USE:
1944 buffer = USB201.D0FIFOSEL;
1945 #ifdef __USB_HOST_DF_ACC_ENABLE__
1946 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
1947
1948 if (dfacc != 0)
1949 {
1950 buffer |= (uint16_t)(USB_HOST_BITMBW_32);
1951 }
1952 #else
1953 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
1954 #endif
1955 USB201.D0FIFOSEL = buffer;
1956
1957 for (loop = 0; loop < 4; loop++)
1958 {
1959 if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
1960 {
1961 break;
1962 }
1963
1964 loop2 = 100;
1965 while (loop2-- > 0)
1966 {
1967 /* wait */
1968 }
1969 }
1970
1971 #ifdef __USB_HOST_DF_ACC_ENABLE__
1972 if (dfacc != 0)
1973 {
1974 dummy = USB201.D0FIFO.UINT32;
1975 }
1976 #endif
1977
1978 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
1979 buffer |= (uint16_t)(pipe | mbw);
1980 USB201.D0FIFOSEL = buffer;
1981
1982 for (loop = 0; loop < 4; loop++)
1983 {
1984 if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
1985 {
1986 break;
1987 }
1988
1989 loop2 = 100;
1990 while (loop2-- > 0)
1991 {
1992 /* wait */
1993 }
1994 }
1995 break;
1996
1997 case USB_HOST_D1DMA:
1998 case USB_HOST_D1USE:
1999 buffer = USB201.D1FIFOSEL;
2000 #ifdef __USB_HOST_DF_ACC_ENABLE__
2001 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
2002
2003 if (dfacc != 0)
2004 {
2005 buffer |= (uint16_t)(USB_HOST_BITMBW_32);
2006 }
2007 #else
2008 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
2009 #endif
2010 USB201.D1FIFOSEL = buffer;
2011
2012 for (loop = 0; loop < 4; loop++)
2013 {
2014 if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
2015 {
2016 break;
2017 }
2018
2019 loop2 = 100;
2020 while (loop2-- > 0)
2021 {
2022 /* wait */
2023 }
2024 }
2025
2026 #ifdef __USB_HOST_DF_ACC_ENABLE__
2027 if (dfacc != 0)
2028 {
2029 dummy = USB201.D1FIFO.UINT32;
2030 loop = dummy; // avoid warning.
2031 }
2032 #endif
2033
2034 buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
2035 buffer |= (uint16_t)(pipe | mbw);
2036 USB201.D1FIFOSEL = buffer;
2037
2038 for (loop = 0; loop < 4; loop++)
2039 {
2040 if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
2041 {
2042 break;
2043 }
2044
2045 loop2 = 100;
2046 while (loop2-- > 0)
2047 {
2048 /* wait */
2049 }
2050 }
2051 break;
2052
2053 default:
2054 break;
2055 }
2056
2057 /* Cautions !!!
2058 * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
2059 * For details, please look at the data sheet. */
2060 loop2 = 100;
2061 while (loop2-- > 0)
2062 {
2063 /* wait */
2064 }
2065 }
2066
2067 /*******************************************************************************
2068 * Function Name: usb1_host_write_c_fifo
2069 * Description : Writes data in CFIFO.
2070 * : Writes data by BYTE/WORD/LONG according to access size
2071 * : to the pipe specified by the arguments.
2072 * : Before executing this function, allocating CFIF0 in the specified pipe
2073 * : should be completed.
2074 * : Before executing this function, access size to the specified pipe
2075 * : should be fixed and set in g_usb1_host_mbw[].
2076 * Arguments : uint16_t pipe ; Pipe Number
2077 * : uint16_t count ; Data Size(Byte)
2078 * Return Value : none
2079 *******************************************************************************/
2080 static void usb1_host_write_c_fifo (uint16_t pipe, uint16_t count)
2081 {
2082 uint16_t even;
2083
2084 if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
2085 {
2086 for (even = count; even; --even)
2087 {
2088 USB201.CFIFO.UINT8[HH] = *g_usb1_host_data_pointer[pipe];
2089 g_usb1_host_data_pointer[pipe] += 1;
2090 }
2091 }
2092 else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
2093 {
2094 for (even = (uint16_t)(count / 2); even; --even)
2095 {
2096 USB201.CFIFO.UINT16[H] = *((uint16_t *)g_usb1_host_data_pointer[pipe]);
2097 g_usb1_host_data_pointer[pipe] += 2;
2098 }
2099 }
2100 else
2101 {
2102 for (even = (uint16_t)(count / 4); even; --even)
2103 {
2104 USB201.CFIFO.UINT32 = *((uint32_t *)g_usb1_host_data_pointer[pipe]);
2105 g_usb1_host_data_pointer[pipe] += 4;
2106 }
2107 }
2108 }
2109
2110 /*******************************************************************************
2111 * Function Name: usb1_host_read_c_fifo
2112 * Description : Reads data from CFIFO.
2113 * : Reads data by BYTE/WORD/LONG according to access size
2114 * : to the pipe specified by the arguments.
2115 * : Before executing this function, allocating CFIF0 in the specified pipe
2116 * : should be completed.
2117 * : Before executing this function, access size to the specified pipe
2118 * : should be fixed and set in g_usb0_host_mbw[].
2119 * Arguments : uint16_t pipe ; Pipe Number
2120 * : uint16_t count ; Data Size(Byte)
2121 * Return Value : none
2122 *******************************************************************************/
2123 static void usb1_host_read_c_fifo (uint16_t pipe, uint16_t count)
2124 {
2125 uint16_t even;
2126
2127 if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
2128 {
2129 for (even = count; even; --even)
2130 {
2131 *g_usb1_host_data_pointer[pipe] = USB201.CFIFO.UINT8[HH];
2132 g_usb1_host_data_pointer[pipe] += 1;
2133 }
2134 }
2135 else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
2136 {
2137 for (even = (uint16_t)((count + 1) / 2); even; --even)
2138 {
2139 *((uint16_t *)g_usb1_host_data_pointer[pipe]) = USB201.CFIFO.UINT16[H];
2140 g_usb1_host_data_pointer[pipe] += 2;
2141 }
2142 }
2143 else
2144 {
2145 for (even = (uint16_t)((count + 3) / 4); even; --even)
2146 {
2147 *((uint32_t *)g_usb1_host_data_pointer[pipe]) = USB201.CFIFO.UINT32;
2148 g_usb1_host_data_pointer[pipe] += 4;
2149 }
2150 }
2151 }
2152
2153 /*******************************************************************************
2154 * Function Name: usb1_host_write_d0_fifo
2155 * Description : Writes data in D0FIFO.
2156 * : Writes data by BYTE/WORD/LONG according to access size
2157 * : to the pipe specified by the arguments.
2158 * : Before executing this function, allocating CFIF0 in the specified pipe
2159 * : should be completed.
2160 * : Before executing this function, access size to the specified pipe
2161 * : should be fixed and set in g_usb0_host_mbw[].
2162 * Arguments : uint16_t pipe ; Pipe Number
2163 * : uint16_t count ; Data Size(Byte)
2164 * Return Value : none
2165 *******************************************************************************/
2166 static void usb1_host_write_d0_fifo (uint16_t pipe, uint16_t count)
2167 {
2168 uint16_t even;
2169
2170 if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
2171 {
2172 for (even = count; even; --even)
2173 {
2174 USB201.D0FIFO.UINT8[HH] = *g_usb1_host_data_pointer[pipe];
2175 g_usb1_host_data_pointer[pipe] += 1;
2176 }
2177 }
2178 else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
2179 {
2180 for (even = (uint16_t)(count / 2); even; --even)
2181 {
2182 USB201.D0FIFO.UINT16[H] = *((uint16_t *)g_usb1_host_data_pointer[pipe]);
2183 g_usb1_host_data_pointer[pipe] += 2;
2184 }
2185 }
2186 else
2187 {
2188 for (even = (uint16_t)(count / 4); even; --even)
2189 {
2190 USB201.D0FIFO.UINT32 = *((uint32_t *)g_usb1_host_data_pointer[pipe]);
2191 g_usb1_host_data_pointer[pipe] += 4;
2192 }
2193 }
2194 }
2195
2196 /*******************************************************************************
2197 * Function Name: usb1_host_read_d0_fifo
2198 * Description : Reads data from D0FIFO.
2199 * : Reads data by BYTE/WORD/LONG according to access size
2200 * : to the pipe specified by the arguments.
2201 * : Before executing this function, allocating DOFIF0 in the specified pipe
2202 * : should be completed.
2203 * : Before executing this function, access size to the specified pipe
2204 * : should be fixed and set in g_usb0_host_mbw[].
2205 * Arguments : uint16_t Pipe ; Pipe Number
2206 * : uint16_t count ; Data Size(Byte)
2207 * Return Value : none
2208 *******************************************************************************/
2209 static void usb1_host_read_d0_fifo (uint16_t pipe, uint16_t count)
2210 {
2211 uint16_t even;
2212
2213 if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
2214 {
2215 for (even = count; even; --even)
2216 {
2217 *g_usb1_host_data_pointer[pipe] = USB201.D0FIFO.UINT8[HH];
2218 g_usb1_host_data_pointer[pipe] += 1;
2219 }
2220 }
2221 else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
2222 {
2223 for (even = (uint16_t)((count + 1) / 2); even; --even)
2224 {
2225 *((uint16_t *)g_usb1_host_data_pointer[pipe]) = USB201.D0FIFO.UINT16[H];
2226 g_usb1_host_data_pointer[pipe] += 2;
2227 }
2228 }
2229 else
2230 {
2231 for (even = (uint16_t)((count + 3) / 4); even; --even)
2232 {
2233 *((uint32_t *)g_usb1_host_data_pointer[pipe]) = USB201.D0FIFO.UINT32;
2234 g_usb1_host_data_pointer[pipe] += 4;
2235 }
2236 }
2237 }
2238
2239 /*******************************************************************************
2240 * Function Name: usb1_host_write_d1_fifo
2241 * Description : Writes data in D1FIFO.
2242 * : Writes data by BYTE/WORD/LONG according to access size
2243 * : to the pipe specified by the arguments.
2244 * : Before executing this function, allocating D1FIF0 in the specified pipe
2245 * : should be completed.
2246 * : Before executing this function, access size to the specified pipe
2247 * : should be fixed and set in g_usb1_host_mbw[].
2248 * Arguments : uint16_t pipe ; Pipe Number
2249 * : uint16_t count ; Data Size(Byte)
2250 * Return Value : none
2251 *******************************************************************************/
2252 static void usb1_host_write_d1_fifo (uint16_t pipe, uint16_t count)
2253 {
2254 uint16_t even;
2255
2256 if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
2257 {
2258 for (even = count; even; --even)
2259 {
2260 USB201.D1FIFO.UINT8[HH] = *g_usb1_host_data_pointer[pipe];
2261 g_usb1_host_data_pointer[pipe] += 1;
2262 }
2263 }
2264 else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
2265 {
2266 for (even = (uint16_t)(count / 2); even; --even)
2267 {
2268 USB201.D1FIFO.UINT16[H] = *((uint16_t *)g_usb1_host_data_pointer[pipe]);
2269 g_usb1_host_data_pointer[pipe] += 2;
2270 }
2271 }
2272 else
2273 {
2274 for (even = (uint16_t)(count / 4); even; --even)
2275 {
2276 USB201.D1FIFO.UINT32 = *((uint32_t *)g_usb1_host_data_pointer[pipe]);
2277 g_usb1_host_data_pointer[pipe] += 4;
2278 }
2279 }
2280 }
2281
2282 /*******************************************************************************
2283 * Function Name: usb1_host_read_d1_fifo
2284 * Description : Reads data from D1FIFO.
2285 * : Reads data by BYTE/WORD/LONG according to access size
2286 * : to the pipe specified by the arguments.
2287 * : Before executing this function, allocating D1FIF0 in the specified pipe
2288 * : should be completed.
2289 * : Before executing this function, access size to the specified pipe
2290 * : should be fixed and set in g_usb1_host_mbw[].
2291 * Arguments : uint16_t pipe ; Pipe Number
2292 * : uint16_t count ; Data Size(Byte)
2293 * Return Value : none
2294 *******************************************************************************/
2295 static void usb1_host_read_d1_fifo (uint16_t pipe, uint16_t count)
2296 {
2297 uint16_t even;
2298
2299 if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
2300 {
2301 for (even = count; even; --even)
2302 {
2303 *g_usb1_host_data_pointer[pipe] = USB201.D1FIFO.UINT8[HH];
2304 g_usb1_host_data_pointer[pipe] += 1;
2305 }
2306 }
2307 else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
2308 {
2309 for (even = (uint16_t)((count + 1) / 2); even; --even)
2310 {
2311 *((uint16_t *)g_usb1_host_data_pointer[pipe]) = USB201.D1FIFO.UINT16[H];
2312 g_usb1_host_data_pointer[pipe] += 2;
2313 }
2314 }
2315 else
2316 {
2317 for (even = (uint16_t)((count + 3) / 4); even; --even)
2318 {
2319 *((uint32_t *)g_usb1_host_data_pointer[pipe]) = USB201.D1FIFO.UINT32;
2320 g_usb1_host_data_pointer[pipe] += 4;
2321 }
2322 }
2323 }
2324
2325 /*******************************************************************************
2326 * Function Name: usb1_host_com_get_dmasize
2327 * Description : Calculates access width of DMA transfer by the argument to
2328 return as the Return Value.
2329 * Arguments : uint32_t trncount : transfer byte
2330 * : uint32_t dtptr : transfer data pointer
2331 * Return Value : DMA transfer size : 0 8bit
2332 * : : 1 16bit
2333 * : : 2 32bit
2334 *******************************************************************************/
2335 static uint32_t usb1_host_com_get_dmasize (uint32_t trncount, uint32_t dtptr)
2336 {
2337 uint32_t size;
2338
2339 if (((trncount & 0x0001) != 0) || ((dtptr & 0x00000001) != 0))
2340 {
2341 /* When transfer byte count is odd */
2342 /* or transfer data area is 8-bit alignment */
2343 size = 0; /* 8bit */
2344 }
2345 else if (((trncount & 0x0003) != 0) || ((dtptr & 0x00000003) != 0))
2346 {
2347 /* When the transfer byte count is multiples of 2 */
2348 /* or the transfer data area is 16-bit alignment */
2349 size = 1; /* 16bit */
2350 }
2351 else
2352 {
2353 /* When the transfer byte count is multiples of 4 */
2354 /* or the transfer data area is 32-bit alignment */
2355 size = 2; /* 32bit */
2356 }
2357
2358 return size;
2359 }
2360
2361 /*******************************************************************************
2362 * Function Name: usb1_host_get_mbw
2363 * Description : Calculates access width of DMA to return the value set in MBW.
2364 * Arguments : uint32_t trncount : transfer byte
2365 * : uint32_t dtptr : transfer data pointer
2366 * Return Value : FIFO transfer size : USB_HOST_BITMBW_8 8bit
2367 * : : USB_HOST_BITMBW_16 16bit
2368 * : : USB_HOST_BITMBW_32 32bit
2369 *******************************************************************************/
2370 uint16_t usb1_host_get_mbw (uint32_t trncount, uint32_t dtptr)
2371 {
2372 uint32_t size;
2373 uint16_t mbw;
2374
2375 size = usb1_host_com_get_dmasize(trncount, dtptr);
2376
2377 if (size == 0)
2378 {
2379 /* 8bit */
2380 mbw = USB_HOST_BITMBW_8;
2381 }
2382 else if (size == 1)
2383 {
2384 /* 16bit */
2385 mbw = USB_HOST_BITMBW_16;
2386 }
2387 else
2388 {
2389 /* 32bit */
2390 mbw = USB_HOST_BITMBW_32;
2391 }
2392
2393 return mbw;
2394 }
2395
2396 /*******************************************************************************
2397 * Function Name: usb1_host_set_transaction_counter
2398 * Description : Sets transaction counter by the argument(PIPEnTRN).
2399 * : Clears transaction before setting to enable transaction counter setting.
2400 * Arguments : uint16_t pipe ; Pipe number
2401 * : uint32_t bsize : Data transfer size
2402 * Return Value : none
2403 *******************************************************************************/
2404 static void usb1_host_set_transaction_counter (uint16_t pipe, uint32_t bsize)
2405 {
2406 uint16_t mxps;
2407 uint16_t cnt;
2408
2409 if (bsize == 0)
2410 {
2411 return;
2412 }
2413
2414 mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
2415
2416 if ((bsize % mxps) == 0)
2417 {
2418 cnt = (uint16_t)(bsize / mxps);
2419 }
2420 else
2421 {
2422 cnt = (uint16_t)((bsize / mxps) + 1);
2423 }
2424
2425 switch (pipe)
2426 {
2427 case USB_HOST_PIPE1:
2428 RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
2429 1,
2430 USB_PIPEnTRE_TRCLR_SHIFT,
2431 USB_PIPEnTRE_TRCLR);
2432 USB201.PIPE1TRN = cnt;
2433 RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
2434 1,
2435 USB_PIPEnTRE_TRENB_SHIFT,
2436 USB_PIPEnTRE_TRENB);
2437 break;
2438
2439 case USB_HOST_PIPE2:
2440 RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
2441 1,
2442 USB_PIPEnTRE_TRCLR_SHIFT,
2443 USB_PIPEnTRE_TRCLR);
2444 USB201.PIPE2TRN = cnt;
2445 RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
2446 1,
2447 USB_PIPEnTRE_TRENB_SHIFT,
2448 USB_PIPEnTRE_TRENB);
2449 break;
2450
2451 case USB_HOST_PIPE3:
2452 RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
2453 1,
2454 USB_PIPEnTRE_TRCLR_SHIFT,
2455 USB_PIPEnTRE_TRCLR);
2456 USB201.PIPE3TRN = cnt;
2457 RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
2458 1,
2459 USB_PIPEnTRE_TRENB_SHIFT,
2460 USB_PIPEnTRE_TRENB);
2461 break;
2462
2463 case USB_HOST_PIPE4:
2464 RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
2465 1,
2466 USB_PIPEnTRE_TRCLR_SHIFT,
2467 USB_PIPEnTRE_TRCLR);
2468 USB201.PIPE4TRN = cnt;
2469 RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
2470 1,
2471 USB_PIPEnTRE_TRENB_SHIFT,
2472 USB_PIPEnTRE_TRENB);
2473 break;
2474
2475 case USB_HOST_PIPE5:
2476 RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
2477 1,
2478 USB_PIPEnTRE_TRCLR_SHIFT,
2479 USB_PIPEnTRE_TRCLR);
2480 USB201.PIPE5TRN = cnt;
2481 RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
2482 1,
2483 USB_PIPEnTRE_TRENB_SHIFT,
2484 USB_PIPEnTRE_TRENB);
2485 break;
2486
2487 case USB_HOST_PIPE9:
2488 RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
2489 1,
2490 USB_PIPEnTRE_TRCLR_SHIFT,
2491 USB_PIPEnTRE_TRCLR);
2492 USB201.PIPE9TRN = cnt;
2493 RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
2494 1,
2495 USB_PIPEnTRE_TRENB_SHIFT,
2496 USB_PIPEnTRE_TRENB);
2497 break;
2498
2499 default:
2500 break;
2501 }
2502 }
2503
2504 /*******************************************************************************
2505 * Function Name: usb1_host_clear_transaction_counter
2506 * Description : Clears the transaction counter by the argument.
2507 * : After executing this function, the transaction counter is invalid.
2508 * Arguments : uint16_t pipe ; Pipe number
2509 * Return Value : none
2510 *******************************************************************************/
2511 void usb1_host_clear_transaction_counter (uint16_t pipe)
2512 {
2513 switch (pipe)
2514 {
2515 case USB_HOST_PIPE1:
2516 RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
2517 0,
2518 USB_PIPEnTRE_TRENB_SHIFT,
2519 USB_PIPEnTRE_TRENB);
2520 RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
2521 1,
2522 USB_PIPEnTRE_TRCLR_SHIFT,
2523 USB_PIPEnTRE_TRCLR);
2524 break;
2525
2526 case USB_HOST_PIPE2:
2527 RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
2528 0,
2529 USB_PIPEnTRE_TRENB_SHIFT,
2530 USB_PIPEnTRE_TRENB);
2531 RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
2532 1,
2533 USB_PIPEnTRE_TRCLR_SHIFT,
2534 USB_PIPEnTRE_TRCLR);
2535 break;
2536
2537 case USB_HOST_PIPE3:
2538 RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
2539 0,
2540 USB_PIPEnTRE_TRENB_SHIFT,
2541 USB_PIPEnTRE_TRENB);
2542 RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
2543 1,
2544 USB_PIPEnTRE_TRCLR_SHIFT,
2545 USB_PIPEnTRE_TRCLR);
2546 break;
2547
2548 case USB_HOST_PIPE4:
2549 RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
2550 0,
2551 USB_PIPEnTRE_TRENB_SHIFT,
2552 USB_PIPEnTRE_TRENB);
2553 RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
2554 1,
2555 USB_PIPEnTRE_TRCLR_SHIFT,
2556 USB_PIPEnTRE_TRCLR);
2557 break;
2558
2559 case USB_HOST_PIPE5:
2560 RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
2561 0,
2562 USB_PIPEnTRE_TRENB_SHIFT,
2563 USB_PIPEnTRE_TRENB);
2564 RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
2565 1,
2566 USB_PIPEnTRE_TRCLR_SHIFT,
2567 USB_PIPEnTRE_TRCLR);
2568 break;
2569
2570 case USB_HOST_PIPE9:
2571 RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
2572 0,
2573 USB_PIPEnTRE_TRENB_SHIFT,
2574 USB_PIPEnTRE_TRENB);
2575 RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
2576 1,
2577 USB_PIPEnTRE_TRCLR_SHIFT,
2578 USB_PIPEnTRE_TRCLR);
2579 break;
2580
2581 default:
2582 break;
2583 }
2584 }
2585
2586 /*******************************************************************************
2587 * Function Name: usb1_host_stop_transfer
2588 * Description : Stops the USB transfer in the pipe specified by the argument.
2589 * : After stopping the USB transfer, clears the buffer allocated in
2590 * : the pipe.
2591 * : After executing this function, allocation in FIF0 becomes USB_HOST_PIPE0;
2592 * : invalid. After executing this function, BRDY/NRDY/BEMP interrupt
2593 * : in the corresponding pipe becomes invalid. Sequence bit is also
2594 * : cleared.
2595 * Arguments : uint16_t pipe ; Pipe Number
2596 * Return Value : none
2597 *******************************************************************************/
2598 void usb1_host_stop_transfer (uint16_t pipe)
2599 {
2600 uint16_t usefifo;
2601 uint32_t remain;
2602
2603 usb1_host_set_pid_nak(pipe);
2604
2605 usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
2606
2607 switch (usefifo)
2608 {
2609 case USB_HOST_D0FIFO_USE:
2610 usb1_host_clear_transaction_counter(pipe);
2611 USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
2612 break;
2613
2614 case USB_HOST_D1FIFO_USE:
2615 usb1_host_clear_transaction_counter(pipe);
2616 USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
2617 break;
2618
2619 case USB_HOST_D0FIFO_DMA:
2620 remain = Userdef_USB_usb1_host_stop_dma0();
2621 usb1_host_dma_stop_d0(pipe, remain);
2622 usb1_host_clear_transaction_counter(pipe);
2623 USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
2624 break;
2625
2626 case USB_HOST_D1FIFO_DMA:
2627 remain = Userdef_USB_usb1_host_stop_dma1();
2628 usb1_host_dma_stop_d1(pipe, remain);
2629 usb1_host_clear_transaction_counter(pipe);
2630 USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
2631 break;
2632
2633 default:
2634 usb1_host_clear_transaction_counter(pipe);
2635 USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
2636 break;
2637 }
2638
2639 /* Interrupt of pipe set is disabled */
2640 usb1_host_disable_brdy_int(pipe);
2641 usb1_host_disable_nrdy_int(pipe);
2642 usb1_host_disable_bemp_int(pipe);
2643
2644 #if(1) /* ohci_wrapp */
2645 #else
2646 usb1_host_aclrm(pipe);
2647 #endif
2648 usb1_host_set_csclr(pipe);
2649 }
2650
2651 /*******************************************************************************
2652 * Function Name: usb1_host_set_dfacc_d0
2653 * Description : Sets the DFACC setting value in D0FIFO using the transfer size.
2654 * Arguments : uint16_t mbw ; MBW
2655 * : uint16_t count ; data count
2656 * Return Value : DFACC Access mode
2657 *******************************************************************************/
2658 static uint16_t usb1_host_set_dfacc_d0 (uint16_t mbw, uint32_t count)
2659 {
2660 uint16_t dfacc = 0;
2661
2662 #ifndef __USB_HOST_DF_ACC_ENABLE__
2663 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2664 0,
2665 USB_DnFBCFG_DFACC_SHIFT,
2666 USB_DnFBCFG_DFACC);
2667 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2668 0,
2669 USB_DnFBCFG_TENDE_SHIFT,
2670 USB_DnFBCFG_TENDE);
2671 dfacc = 0;
2672 #else
2673 if (mbw == USB_HOST_BITMBW_32)
2674 {
2675 if ((count % 32) == 0)
2676 {
2677 /* 32byte transfer */
2678 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2679 2,
2680 USB_DnFBCFG_DFACC_SHIFT,
2681 USB_DnFBCFG_DFACC);
2682 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2683 0,
2684 USB_DnFBCFG_TENDE_SHIFT,
2685 USB_DnFBCFG_TENDE);
2686 dfacc = 2;
2687 }
2688 else if ((count % 16) == 0)
2689 {
2690 /* 16byte transfer */
2691 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2692 1,
2693 USB_DnFBCFG_DFACC_SHIFT,
2694 USB_DnFBCFG_DFACC);
2695 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2696 0,
2697 USB_DnFBCFG_TENDE_SHIFT,
2698 USB_DnFBCFG_TENDE);
2699 dfacc = 1;
2700 }
2701 else
2702 {
2703 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2704 0,
2705 USB_DnFBCFG_DFACC_SHIFT,
2706 USB_DnFBCFG_DFACC);
2707 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2708 0,
2709 USB_DnFBCFG_TENDE_SHIFT,
2710 USB_DnFBCFG_TENDE);
2711 dfacc = 0;
2712 }
2713 }
2714 else if (mbw == USB_HOST_BITMBW_16)
2715 {
2716 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2717 0,
2718 USB_DnFBCFG_DFACC_SHIFT,
2719 USB_DnFBCFG_DFACC);
2720 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2721 0,
2722 USB_DnFBCFG_TENDE_SHIFT,
2723 USB_DnFBCFG_TENDE);
2724 dfacc = 0;
2725 }
2726 else
2727 {
2728 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2729 0,
2730 USB_DnFBCFG_DFACC_SHIFT,
2731 USB_DnFBCFG_DFACC);
2732 RZA_IO_RegWrite_16(&USB201.D0FBCFG,
2733 0,
2734 USB_DnFBCFG_TENDE_SHIFT,
2735 USB_DnFBCFG_TENDE);
2736 dfacc = 0;
2737 }
2738 #endif
2739
2740 return dfacc;
2741 }
2742
2743 /*******************************************************************************
2744 * Function Name: usb1_host_set_dfacc_d1
2745 * Description : Sets the DFACC setting value in D0FIFO using the transfer size.
2746 * Arguments : uint16_t mbw ; MBW
2747 * : uint16_t count ; data count
2748 * Return Value : DFACC Access mode
2749 *******************************************************************************/
2750 static uint16_t usb1_host_set_dfacc_d1 (uint16_t mbw, uint32_t count)
2751 {
2752 uint16_t dfacc = 0;
2753
2754 #ifndef __USB_HOST_DF_ACC_ENABLE__
2755 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2756 0,
2757 USB_DnFBCFG_DFACC_SHIFT,
2758 USB_DnFBCFG_DFACC);
2759 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2760 0,
2761 USB_DnFBCFG_TENDE_SHIFT,
2762 USB_DnFBCFG_TENDE);
2763 dfacc = 0;
2764 #else
2765 if (mbw == USB_HOST_BITMBW_32)
2766 {
2767 if ((count % 32) == 0)
2768 {
2769 /* 32byte transfer */
2770 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2771 2,
2772 USB_DnFBCFG_DFACC_SHIFT,
2773 USB_DnFBCFG_DFACC);
2774 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2775 0,
2776 USB_DnFBCFG_TENDE_SHIFT,
2777 USB_DnFBCFG_TENDE);
2778 dfacc = 2;
2779 }
2780 else if ((count % 16) == 0)
2781 {
2782 /* 16byte transfer */
2783 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2784 1,
2785 USB_DnFBCFG_DFACC_SHIFT,
2786 USB_DnFBCFG_DFACC);
2787 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2788 0,
2789 USB_DnFBCFG_TENDE_SHIFT,
2790 USB_DnFBCFG_TENDE);
2791 dfacc = 1;
2792 }
2793 else
2794 {
2795 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2796 0,
2797 USB_DnFBCFG_DFACC_SHIFT,
2798 USB_DnFBCFG_DFACC);
2799 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2800 0,
2801 USB_DnFBCFG_TENDE_SHIFT,
2802 USB_DnFBCFG_TENDE);
2803 dfacc = 0;
2804 }
2805 }
2806 else if (mbw == USB_HOST_BITMBW_16)
2807 {
2808 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2809 0,
2810 USB_DnFBCFG_DFACC_SHIFT,
2811 USB_DnFBCFG_DFACC);
2812 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2813 0,
2814 USB_DnFBCFG_TENDE_SHIFT,
2815 USB_DnFBCFG_TENDE);
2816 dfacc = 0;
2817 }
2818 else
2819 {
2820 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2821 0,
2822 USB_DnFBCFG_DFACC_SHIFT,
2823 USB_DnFBCFG_DFACC);
2824 RZA_IO_RegWrite_16(&USB201.D1FBCFG,
2825 0,
2826 USB_DnFBCFG_TENDE_SHIFT,
2827 USB_DnFBCFG_TENDE);
2828 dfacc = 0;
2829 }
2830 #endif
2831
2832 return dfacc;
2833 }
2834
2835 /* End of File */
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