tmk_core/tool/mbed/mbed-sdk/libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_controlrw.c

   1 /*******************************************************************************
   2 * DISCLAIMER
   3 * This software is supplied by Renesas Electronics Corporation and is only
   4 * intended for use with Renesas products. No other uses are authorized. This
   5 * software is owned by Renesas Electronics Corporation and is protected under
   6 * all applicable laws, including copyright laws.
   7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
   8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
   9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
  10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
  11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
  12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
  13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
  14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
  15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
  16 * Renesas reserves the right, without notice, to make changes to this software
  17 * and to discontinue the availability of this software. By using this software,
  18 * you agree to the additional terms and conditions found by accessing the
  19 * following link:
  20 * http://www.renesas.com/disclaimer
  21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
  22 *******************************************************************************/
  23 /*******************************************************************************
  24 * File Name    : usb1_host_controlrw.c
  25 * $Rev: 1116 $
  26 * $Date:: 2014-07-09 16:29:19 +0900#$
  27 * Device(s)    : RZ/A1H
  28 * Tool-Chain   :
  29 * OS           : None
  30 * H/W Platform :
  31 * Description  : RZ/A1H R7S72100 USB Sample Program
  32 * Operation    :
  33 * Limitations  :
  34 *******************************************************************************/
  35
  36
  37 /*******************************************************************************
  38 Includes   <System Includes> , "Project Includes"
  39 *******************************************************************************/
  40 #include "usb1_host.h"
  41 #include "dev_drv.h"
  42
  43
  44 /*******************************************************************************
  45 Typedef definitions
  46 *******************************************************************************/
  47
  48
  49 /*******************************************************************************
  50 Macro definitions
  51 *******************************************************************************/
  52
  53
  54 /*******************************************************************************
  55 Imported global variables and functions (from other files)
  56 *******************************************************************************/
  57
  58
  59 /*******************************************************************************
  60 Exported global variables and functions (to be accessed by other files)
  61 *******************************************************************************/
  62
  63
  64 /*******************************************************************************
  65 Private global variables and functions
  66 *******************************************************************************/
  67
  68
  69 /*******************************************************************************
  70 * Function Name: usb1_host_CtrlTransStart
  71 * Description  : Executes USB control transfer.
  72 * Arguments    : uint16_t devadr ; device address
  73 *              : uint16_t Req   ; bmRequestType & bRequest
  74 *              : uint16_t Val   ; wValue
  75 *              : uint16_t Indx  ; wIndex
  76 *              : uint16_t Len   ; wLength
  77 *              : uint8_t  *Buf  ; Data buffer
  78 * Return Value : DEVDRV_SUCCESS     ;   SUCCESS
  79 *              : DEVDRV_ERROR       ;   ERROR
  80 *******************************************************************************/
  81 int32_t usb1_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
  82                             uint16_t Indx, uint16_t Len, uint8_t * Buf)
  83 {
  84     if (g_usb1_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
  85     {
  86         RZA_IO_RegWrite_16(&USB201.SOFCFG,
  87                             1,
  88                             USB_SOFCFG_TRNENSEL_SHIFT,
  89                             USB_SOFCFG_TRNENSEL);
  90     }
  91     else
  92     {
  93         RZA_IO_RegWrite_16(&USB201.SOFCFG,
  94                             0,
  95                             USB_SOFCFG_TRNENSEL_SHIFT,
  96                             USB_SOFCFG_TRNENSEL);
  97     }
  98
  99     USB201.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb1_host_default_max_packet[devadr]);
 100
 101     if (g_usb1_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
 102     {
 103         g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
 104         g_usb1_host_PipeIgnore[USB_HOST_PIPE0]  = 0;                    /* Ignore count clear */
 105         g_usb1_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
 106
 107         if (Len == 0)
 108         {
 109             g_usb1_host_CmdStage |= USB_HOST_MODE_NO_DATA;              /* No-data Control */
 110         }
 111         else
 112         {
 113             if ((Req & 0x0080) != 0)
 114             {
 115                 g_usb1_host_CmdStage |= USB_HOST_MODE_READ;             /* Control Read */
 116             }
 117             else
 118             {
 119                 g_usb1_host_CmdStage |= USB_HOST_MODE_WRITE;            /* Control Write */
 120             }
 121         }
 122
 123         g_usb1_host_SavReq  = Req;                                      /* save request */
 124         g_usb1_host_SavVal  = Val;
 125         g_usb1_host_SavIndx = Indx;
 126         g_usb1_host_SavLen  = Len;
 127     }
 128     else
 129     {
 130         if ((g_usb1_host_SavReq  != Req)  || (g_usb1_host_SavVal != Val)
 131          || (g_usb1_host_SavIndx != Indx) || (g_usb1_host_SavLen != Len))
 132         {
 133             return DEVDRV_ERROR;
 134         }
 135     }
 136
 137     switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
 138     {
 139         /* --------------- SETUP STAGE --------------- */
 140         case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
 141             usb1_host_SetupStage(Req, Val, Indx, Len);
 142         break;
 143
 144         case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
 145             /* do nothing */
 146         break;
 147
 148         case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE):                /* goto next stage */
 149             g_usb1_host_PipeIgnore[USB_HOST_PIPE0]  = 0;                /* Ignore count clear */
 150             switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
 151             {
 152                 case USB_HOST_MODE_WRITE:
 153                     g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
 154                     g_usb1_host_CmdStage |= USB_HOST_STAGE_DATA;
 155                 break;
 156
 157                 case USB_HOST_MODE_READ:
 158                     g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
 159                     g_usb1_host_CmdStage |= USB_HOST_STAGE_DATA;
 160                 break;
 161
 162                 case USB_HOST_MODE_NO_DATA:
 163                     g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
 164                     g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
 165                 break;
 166
 167                 default:
 168                 break;
 169             }
 170             g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 171             g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
 172         break;
 173
 174         case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
 175             if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
 176             {
 177                 g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;  /* exit NORES */
 178             }
 179             else
 180             {
 181                 g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++;                       /* Ignore count */
 182                 g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 183                 g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
 184             }
 185         break;
 186
 187         /* --------------- DATA STAGE --------------- */
 188         case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
 189             switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
 190             {
 191                 case USB_HOST_MODE_WRITE:
 192                     usb1_host_CtrlWriteStart((uint32_t)Len, Buf);
 193                 break;
 194
 195                 case USB_HOST_MODE_READ:
 196                     usb1_host_CtrlReadStart((uint32_t)Len, Buf);
 197                 break;
 198
 199                 default:
 200                 break;
 201             }
 202         break;
 203
 204         case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
 205             /* do nothing */
 206         break;
 207
 208         case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE):                         /* goto next stage */
 209             g_usb1_host_PipeIgnore[USB_HOST_PIPE0]  = 0;                        /* Ignore count clear */
 210             g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
 211             g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
 212             g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 213             g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
 214         break;
 215
 216         case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
 217             if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
 218             {
 219                 g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;  /* exit NORES */
 220             }
 221             else
 222             {
 223                 g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++;                       /* Ignore count */
 224                 g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 225                 g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
 226                 usb1_host_clear_pid_stall(USB_HOST_PIPE0);
 227                 usb1_host_set_pid_buf(USB_HOST_PIPE0);
 228             }
 229         break;
 230
 231         case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
 232             g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;      /* exit STALL */
 233         break;
 234
 235         /* --------------- STATUS STAGE --------------- */
 236         case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
 237             usb1_host_StatusStage();
 238         break;
 239
 240         case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
 241             /* do nothing */
 242         break;
 243
 244         case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE):                       /* end of Control transfer */
 245             usb1_host_set_pid_nak(USB_HOST_PIPE0);
 246             g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE;       /* exit DONE */
 247         break;
 248
 249         case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
 250             if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
 251             {
 252                 g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;  /* exit NORES */
 253             }
 254             else
 255             {
 256                 g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++;                       /* Ignore count */
 257                 g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 258                 g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
 259                 usb1_host_clear_pid_stall(USB_HOST_PIPE0);
 260                 usb1_host_set_pid_buf(USB_HOST_PIPE0);
 261             }
 262         break;
 263
 264         case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
 265             g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;      /* exit STALL */
 266         break;
 267
 268         default:
 269         break;
 270     }
 271
 272     if (g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
 273     {
 274         RZA_IO_RegWrite_16(&USB201.SOFCFG,
 275                             0,
 276                             USB_SOFCFG_TRNENSEL_SHIFT,
 277                             USB_SOFCFG_TRNENSEL);
 278     }
 279
 280     return DEVDRV_SUCCESS;
 281 }
 282
 283 /*******************************************************************************
 284 * Function Name: usb1_host_SetupStage
 285 * Description  : Executes USB control transfer/set up stage.
 286 * Arguments    : uint16_t Req           ; bmRequestType & bRequest
 287 *              : uint16_t Val           ; wValue
 288 *              : uint16_t Indx          ; wIndex
 289 *              : uint16_t Len           ; wLength
 290 * Return Value : none
 291 *******************************************************************************/
 292 void usb1_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
 293 {
 294     g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 295     g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
 296
 297     USB201.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN);  /* Status Clear */
 298     USB201.USBREQ  = Req;
 299     USB201.USBVAL  = Val;
 300     USB201.USBINDX = Indx;
 301     USB201.USBLENG = Len;
 302     USB201.DCPCTR  = USB_HOST_BITSUREQ;                                 /* PID=NAK & Send Setup */
 303 }
 304
 305 /*******************************************************************************
 306 * Function Name: usb1_host_StatusStage
 307 * Description  : Executes USB control transfer/status stage.
 308 * Arguments    : none
 309 * Return Value : none
 310 *******************************************************************************/
 311 void usb1_host_StatusStage (void)
 312 {
 313     uint8_t Buf1[16];
 314
 315     switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
 316     {
 317         case USB_HOST_MODE_READ:
 318             usb1_host_CtrlWriteStart((uint32_t)0, (uint8_t*)&Buf1);
 319         break;
 320
 321         case USB_HOST_MODE_WRITE:
 322             usb1_host_CtrlReadStart((uint32_t)0, (uint8_t*)&Buf1);
 323         break;
 324
 325         case USB_HOST_MODE_NO_DATA:
 326             usb1_host_CtrlReadStart((uint32_t)0, (uint8_t*)&Buf1);
 327         break;
 328
 329         default:
 330         break;
 331     }
 332 }
 333
 334 /*******************************************************************************
 335 * Function Name: usb1_host_CtrlWriteStart
 336 * Description  : Executes USB control transfer/data stage(write).
 337 * Arguments    : uint32_t Bsize     ; Data Size
 338 *              : uint8_t  *Table    ; Data Table Address
 339 * Return Value : USB_HOST_WRITESHRT ; End of data write
 340 *              : USB_HOST_WRITEEND  ; End of data write (not null)
 341 *              : USB_HOST_WRITING   ; Continue of data write
 342 *              : USB_HOST_FIFOERROR ; FIFO access error
 343 *******************************************************************************/
 344 uint16_t usb1_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
 345 {
 346     uint16_t EndFlag_K;
 347     uint16_t mbw;
 348
 349     g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 350     g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
 351
 352     usb1_host_set_pid_nak(USB_HOST_PIPE0);                              /* Set NAK */
 353     g_usb1_host_data_count[USB_HOST_PIPE0]   = Bsize;                   /* Transfer size set */
 354     g_usb1_host_data_pointer[USB_HOST_PIPE0] = Table;                   /* Transfer address set */
 355
 356     USB201.DCPCTR = USB_HOST_BITSQSET;                                  /* SQSET=1, PID=NAK */
 357 #if(1) /* ohci_wrapp */
 358     Userdef_USB_usb1_host_delay_10us(3);
 359 #endif
 360     RZA_IO_RegWrite_16(&USB201.DCPCFG,
 361                         1,
 362                         USB_DCPCFG_DIR_SHIFT,
 363                         USB_DCPCFG_DIR);
 364
 365     mbw = usb1_host_get_mbw(g_usb1_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb1_host_data_pointer[USB_HOST_PIPE0]);
 366     usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
 367     USB201.CFIFOCTR = USB_HOST_BITBCLR;                                 /* Buffer Clear */
 368
 369     usb1_host_clear_pid_stall(USB_HOST_PIPE0);
 370     EndFlag_K = usb1_host_write_buffer_c(USB_HOST_PIPE0);
 371     /* Host Control sequence */
 372     switch (EndFlag_K)
 373     {
 374         case USB_HOST_WRITESHRT:                                        /* End of data write */
 375             g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
 376             g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
 377             usb1_host_enable_nrdy_int(USB_HOST_PIPE0);                  /* Error (NORES or STALL) */
 378             usb1_host_enable_bemp_int(USB_HOST_PIPE0);                  /* Enable Empty Interrupt */
 379         break;
 380
 381         case USB_HOST_WRITEEND:                                         /* End of data write (not null) */
 382         case USB_HOST_WRITING:                                          /* Continue of data write */
 383             usb1_host_enable_nrdy_int(USB_HOST_PIPE0);                  /* Error (NORES or STALL) */
 384             usb1_host_enable_bemp_int(USB_HOST_PIPE0);                  /* Enable Empty Interrupt */
 385         break;
 386
 387         case USB_HOST_FIFOERROR:                                        /* FIFO access error */
 388         break;
 389
 390         default:
 391         break;
 392     }
 393     usb1_host_set_pid_buf(USB_HOST_PIPE0);                              /* Set BUF */
 394     return (EndFlag_K);                                                 /* End or Err or Continue */
 395 }
 396
 397 /*******************************************************************************
 398 * Function Name: usb1_host_CtrlReadStart
 399 * Description  : Executes USB control transfer/data stage(read).
 400 * Arguments    : uint32_t Bsize     ; Data Size
 401 *              : uint8_t  *Table    ; Data Table Address
 402 * Return Value : none
 403 *******************************************************************************/
 404 void usb1_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
 405 {
 406     uint16_t mbw;
 407
 408     g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
 409     g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
 410
 411     usb1_host_set_pid_nak(USB_HOST_PIPE0);                  /* Set NAK */
 412     g_usb1_host_data_count[USB_HOST_PIPE0]   = Bsize;       /* Transfer size set */
 413     g_usb1_host_data_pointer[USB_HOST_PIPE0] = Table;       /* Transfer address set */
 414
 415     USB201.DCPCTR     = USB_HOST_BITSQSET;                  /* SQSET=1, PID=NAK */
 416 #if(1) /* ohci_wrapp */
 417     Userdef_USB_usb1_host_delay_10us(3);
 418 #endif
 419     RZA_IO_RegWrite_16(&USB201.DCPCFG,
 420                         0,
 421                         USB_DCPCFG_DIR_SHIFT,
 422                         USB_DCPCFG_DIR);
 423
 424     mbw = usb1_host_get_mbw(g_usb1_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb1_host_data_pointer[USB_HOST_PIPE0]);
 425     usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
 426     USB201.CFIFOCTR = USB_HOST_BITBCLR;                     /* Buffer Clear */
 427
 428     usb1_host_enable_nrdy_int(USB_HOST_PIPE0);              /* Error (NORES or STALL) */
 429     usb1_host_enable_brdy_int(USB_HOST_PIPE0);              /* Ok */
 430     usb1_host_clear_pid_stall(USB_HOST_PIPE0);
 431     usb1_host_set_pid_buf(USB_HOST_PIPE0);                  /* Set BUF */
 432 }
 433
 434 /* End of File */