]>
git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_usbint.c
1 /*******************************************************************************
3 * This software is supplied by Renesas Electronics Corporation and is only
4 * intended for use with Renesas products. No other uses are authorized. This
5 * software is owned by Renesas Electronics Corporation and is protected under
6 * all applicable laws, including copyright laws.
7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16 * Renesas reserves the right, without notice, to make changes to this software
17 * and to discontinue the availability of this software. By using this software,
18 * you agree to the additional terms and conditions found by accessing the
20 * http://www.renesas.com/disclaimer
21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
22 *******************************************************************************/
23 /*******************************************************************************
24 * File Name : usb1_host_usbint.c
26 * $Date:: 2014-07-09 16:29:19 +0900#$
31 * Description : RZ/A1H R7S72100 USB Sample Program
34 *******************************************************************************/
37 /*******************************************************************************
38 Includes <System Includes> , "Project Includes"
39 *******************************************************************************/
40 #include "usb1_host.h"
41 #if(1) /* ohci_wrapp */
42 #include "ohci_wrapp_RZ_A1_local.h"
46 /*******************************************************************************
48 *******************************************************************************/
51 /*******************************************************************************
53 *******************************************************************************/
56 /*******************************************************************************
57 Imported global variables and functions (from other files)
58 *******************************************************************************/
61 /*******************************************************************************
62 Exported global variables and functions (to be accessed by other files)
63 *******************************************************************************/
64 static void usb1_host_interrupt1(void);
65 static void usb1_host_BRDYInterrupt(uint16_t Status
, uint16_t Int_enbl
);
66 static void usb1_host_NRDYInterrupt(uint16_t Status
, uint16_t Int_enbl
);
67 static void usb1_host_BEMPInterrupt(uint16_t Status
, uint16_t Int_enbl
);
70 /*******************************************************************************
71 Private global variables and functions
72 *******************************************************************************/
75 /*******************************************************************************
76 * Function Name: usb1_host_interrupt
77 * Description : Executes USB interrupt.
78 * : Register this function in the USB interrupt handler.
79 * : Set CFIF0 in the pipe set before the interrupt after executing
81 * Arguments : uint32_t int_sense ; Interrupts detection mode
82 * : ; INTC_LEVEL_SENSITIVE : Level sense
83 * : ; INTC_EDGE_TRIGGER : Edge trigger
85 *******************************************************************************/
86 void usb1_host_interrupt (uint32_t int_sense
)
92 savepipe1
= USB201
.CFIFOSEL
;
93 savepipe2
= USB201
.PIPESEL
;
94 usb1_host_interrupt1();
96 /* Control transmission changes ISEL within interruption processing. */
97 /* For this reason, write return of ISEL cannot be performed. */
98 buffer
= USB201
.CFIFOSEL
;
99 buffer
&= (uint16_t)~(USB_HOST_BITCURPIPE
);
100 buffer
|= (uint16_t)(savepipe1
& USB_HOST_BITCURPIPE
);
101 USB201
.CFIFOSEL
= buffer
;
102 USB201
.PIPESEL
= savepipe2
;
105 /*******************************************************************************
106 * Function Name: usb1_host_interrupt1
107 * Description : Execue the USB interrupt.
109 * Return Value : none
110 *******************************************************************************/
111 void usb1_host_interrupt1 (void)
123 volatile uint16_t dumy_sts
;
125 intsts0
= USB201
.INTSTS0
;
126 intsts1
= USB201
.INTSTS1
;
127 intenb0
= USB201
.INTENB0
;
128 intenb1
= USB201
.INTENB1
;
130 if ((intsts1
& USB_HOST_BITBCHG
) && (intenb1
& USB_HOST_BITBCHGE
))
132 USB201
.INTSTS1
= (uint16_t)~USB_HOST_BITBCHG
;
133 RZA_IO_RegWrite_16(&USB201
.INTENB1
,
135 USB_INTENB1_BCHGE_SHIFT
,
137 g_usb1_host_bchg_flag
= USB_HOST_YES
;
139 else if ((intsts1
& USB_HOST_BITSACK
) && (intenb1
& USB_HOST_BITSACKE
))
141 USB201
.INTSTS1
= (uint16_t)~USB_HOST_BITSACK
;
142 #if(1) /* ohci_wrapp */
143 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_NOERROR
);
145 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
146 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
149 else if ((intsts1
& USB_HOST_BITSIGN
) && (intenb1
& USB_HOST_BITSIGNE
))
151 USB201
.INTSTS1
= (uint16_t)~USB_HOST_BITSIGN
;
152 #if(1) /* ohci_wrapp */
153 g_usb1_host_pipe_status
[USB_HOST_PIPE0
] = USB_HOST_PIPE_NORES
; /* exit NORES */
154 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_STALL
);
156 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
157 g_usb1_host_CmdStage
|= USB_HOST_CMD_NORES
;
160 else if (((intsts1
& USB_HOST_BITDTCH
) == USB_HOST_BITDTCH
)
161 && ((intenb1
& USB_HOST_BITDTCHE
) == USB_HOST_BITDTCHE
))
163 USB201
.INTSTS1
= (uint16_t)~USB_HOST_BITDTCH
;
164 RZA_IO_RegWrite_16(&USB201
.INTENB1
,
166 USB_INTENB1_DTCHE_SHIFT
,
168 g_usb1_host_detach_flag
= USB_HOST_YES
;
170 Userdef_USB_usb1_host_detach();
172 usb1_host_UsbDetach2();
174 else if (((intsts1
& USB_HOST_BITATTCH
) == USB_HOST_BITATTCH
)
175 && ((intenb1
& USB_HOST_BITATTCHE
) == USB_HOST_BITATTCHE
))
177 USB201
.INTSTS1
= (uint16_t)~USB_HOST_BITATTCH
;
178 RZA_IO_RegWrite_16(&USB201
.INTENB1
,
180 USB_INTENB1_ATTCHE_SHIFT
,
182 g_usb1_host_attach_flag
= USB_HOST_YES
;
184 Userdef_USB_usb1_host_attach();
186 usb1_host_UsbAttach();
188 else if ((intsts0
& intenb0
& (USB_HOST_BITBEMP
| USB_HOST_BITNRDY
| USB_HOST_BITBRDY
)))
190 brdysts
= USB201
.BRDYSTS
;
191 nrdysts
= USB201
.NRDYSTS
;
192 bempsts
= USB201
.BEMPSTS
;
193 brdyenb
= USB201
.BRDYENB
;
194 nrdyenb
= USB201
.NRDYENB
;
195 bempenb
= USB201
.BEMPENB
;
197 if ((intsts0
& USB_HOST_BITBRDY
) && (intenb0
& USB_HOST_BITBRDYE
) && (brdysts
& brdyenb
))
199 usb1_host_BRDYInterrupt(brdysts
, brdyenb
);
201 else if ((intsts0
& USB_HOST_BITBEMP
) && (intenb0
& USB_HOST_BITBEMPE
) && (bempsts
& bempenb
))
203 usb1_host_BEMPInterrupt(bempsts
, bempenb
);
205 else if ((intsts0
& USB_HOST_BITNRDY
) && (intenb0
& USB_HOST_BITNRDYE
) && (nrdysts
& nrdyenb
))
207 usb1_host_NRDYInterrupt(nrdysts
, nrdyenb
);
219 /* Three dummy read for clearing interrupt requests */
220 dumy_sts
= USB201
.INTSTS0
;
221 dumy_sts
= USB201
.INTSTS1
;
225 /*******************************************************************************
226 * Function Name: usb1_host_BRDYInterrupt
227 * Description : Executes USB BRDY interrupt.
228 * Arguments : uint16_t Status ; BRDYSTS Register Value
229 * : uint16_t Int_enbl ; BRDYENB Register Value
230 * Return Value : none
231 *******************************************************************************/
232 void usb1_host_BRDYInterrupt (uint16_t Status
, uint16_t Int_enbl
)
235 volatile uint16_t dumy_sts
;
237 if ((Status
& g_usb1_host_bit_set
[USB_HOST_PIPE0
]) && (Int_enbl
& g_usb1_host_bit_set
[USB_HOST_PIPE0
]))
239 USB201
.BRDYSTS
= (uint16_t)~g_usb1_host_bit_set
[USB_HOST_PIPE0
];
241 #if(1) /* ohci_wrapp */
242 switch ((g_usb1_host_CmdStage
& (USB_HOST_STAGE_FIELD
| USB_HOST_CMD_FIELD
)))
244 case (USB_HOST_STAGE_STATUS
| USB_HOST_CMD_DOING
):
245 buffer
= usb1_host_read_buffer_c(USB_HOST_PIPE0
);
246 usb1_host_disable_brdy_int(USB_HOST_PIPE0
);
247 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
248 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
249 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_NOERROR
);
252 case (USB_HOST_STAGE_DATA
| USB_HOST_CMD_DOING
):
253 buffer
= usb1_host_read_buffer_c(USB_HOST_PIPE0
);
256 case USB_HOST_READING
: /* Continue of data read */
259 case USB_HOST_READEND
: /* End of data read */
260 case USB_HOST_READSHRT
: /* End of data read */
261 usb1_host_disable_brdy_int(USB_HOST_PIPE0
);
262 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
263 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
264 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_NOERROR
);
267 case USB_HOST_READOVER
: /* buffer over */
268 USB201
.CFIFOCTR
= USB_HOST_BITBCLR
;
269 usb1_host_disable_brdy_int(USB_HOST_PIPE0
);
270 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
271 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
272 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_NOERROR
);
275 case USB_HOST_FIFOERROR
: /* FIFO access error */
285 switch ((g_usb1_host_CmdStage
& (USB_HOST_MODE_FIELD
| USB_HOST_STAGE_FIELD
| USB_HOST_CMD_FIELD
)))
287 case (USB_HOST_MODE_WRITE
| USB_HOST_STAGE_STATUS
| USB_HOST_CMD_DOING
):
288 case (USB_HOST_MODE_NO_DATA
| USB_HOST_STAGE_STATUS
| USB_HOST_CMD_DOING
):
289 buffer
= usb1_host_read_buffer_c(USB_HOST_PIPE0
);
290 usb1_host_disable_brdy_int(USB_HOST_PIPE0
);
291 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
292 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
295 case (USB_HOST_MODE_READ
| USB_HOST_STAGE_DATA
| USB_HOST_CMD_DOING
):
296 buffer
= usb1_host_read_buffer_c(USB_HOST_PIPE0
);
300 case USB_HOST_READING
: /* Continue of data read */
303 case USB_HOST_READEND
: /* End of data read */
304 case USB_HOST_READSHRT
: /* End of data read */
305 usb1_host_disable_brdy_int(USB_HOST_PIPE0
);
306 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
307 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
310 case USB_HOST_READOVER
: /* buffer over */
311 USB201
.CFIFOCTR
= USB_HOST_BITBCLR
;
312 usb1_host_disable_brdy_int(USB_HOST_PIPE0
);
313 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
314 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
317 case USB_HOST_FIFOERROR
: /* FIFO access error */
330 usb1_host_brdy_int(Status
, Int_enbl
);
333 /* Three dummy reads for clearing interrupt requests */
334 dumy_sts
= USB201
.BRDYSTS
;
337 /*******************************************************************************
338 * Function Name: usb1_host_NRDYInterrupt
339 * Description : Executes USB NRDY interrupt.
340 * Arguments : uint16_t Status ; NRDYSTS Register Value
341 * : uint16_t Int_enbl ; NRDYENB Register Value
342 * Return Value : none
343 *******************************************************************************/
344 void usb1_host_NRDYInterrupt (uint16_t Status
, uint16_t Int_enbl
)
347 volatile uint16_t dumy_sts
;
349 if ((Status
& g_usb1_host_bit_set
[USB_HOST_PIPE0
]) && (Int_enbl
& g_usb1_host_bit_set
[USB_HOST_PIPE0
]))
351 USB201
.NRDYSTS
= (uint16_t)~g_usb1_host_bit_set
[USB_HOST_PIPE0
];
352 pid
= usb1_host_get_pid(USB_HOST_PIPE0
);
354 if ((pid
== USB_HOST_PID_STALL
) || (pid
== USB_HOST_PID_STALL2
))
356 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
357 g_usb1_host_CmdStage
|= USB_HOST_CMD_STALL
;
358 #if(1) /* ohci_wrapp */
359 g_usb1_host_pipe_status
[USB_HOST_PIPE0
] = USB_HOST_PIPE_STALL
;
360 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_STALL
);
364 else if (pid
== USB_HOST_PID_NAK
)
366 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
367 g_usb1_host_CmdStage
|= USB_HOST_CMD_NORES
;
368 #if(1) /* ohci_wrapp */
369 g_usb1_host_pipe_status
[USB_HOST_PIPE0
] = USB_HOST_PIPE_NORES
;
370 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_STALL
);
380 usb1_host_nrdy_int(Status
, Int_enbl
);
383 /* Three dummy reads for clearing interrupt requests */
384 dumy_sts
= USB201
.NRDYSTS
;
387 /*******************************************************************************
388 * Function Name: usb1_host_BEMPInterrupt
389 * Description : Executes USB BEMP interrupt.
390 * Arguments : uint16_t Status ; BEMPSTS Register Value
391 * : uint16_t Int_enbl ; BEMPENB Register Value
392 * Return Value : none
393 *******************************************************************************/
394 void usb1_host_BEMPInterrupt (uint16_t Status
, uint16_t Int_enbl
)
398 volatile uint16_t dumy_sts
;
400 if ((Status
& g_usb1_host_bit_set
[USB_HOST_PIPE0
]) && (Int_enbl
& g_usb1_host_bit_set
[USB_HOST_PIPE0
]))
402 USB201
.BEMPSTS
= (uint16_t)~g_usb1_host_bit_set
[USB_HOST_PIPE0
];
403 pid
= usb1_host_get_pid(USB_HOST_PIPE0
);
405 if ((pid
== USB_HOST_PID_STALL
) || (pid
== USB_HOST_PID_STALL2
))
407 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
408 g_usb1_host_CmdStage
|= USB_HOST_CMD_STALL
;
409 #if(1) /* ohci_wrapp */
410 g_usb1_host_pipe_status
[USB_HOST_PIPE0
] = USB_HOST_PIPE_STALL
; /* exit STALL */
411 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_STALL
);
416 #if(1) /* ohci_wrapp */
417 switch ((g_usb1_host_CmdStage
& (USB_HOST_STAGE_FIELD
| USB_HOST_CMD_FIELD
)))
419 case (USB_HOST_STAGE_STATUS
| USB_HOST_CMD_DOING
):
420 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
421 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
422 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_NOERROR
);
425 case (USB_HOST_STAGE_DATA
| USB_HOST_CMD_DOING
):
426 buffer
= usb1_host_write_buffer(USB_HOST_PIPE0
);
429 case USB_HOST_WRITING
: /* Continue of data write */
430 case USB_HOST_WRITEEND
: /* End of data write (zero-length) */
433 case USB_HOST_WRITESHRT
: /* End of data write */
434 g_usb1_host_CmdStage
&= (~USB_HOST_STAGE_FIELD
);
435 g_usb1_host_CmdStage
|= USB_HOST_STAGE_STATUS
;
436 ohciwrapp_loc_TransEnd(USB_HOST_PIPE0
, TD_CC_NOERROR
);
439 case USB_HOST_FIFOERROR
: /* FIFO access error */
450 switch ((g_usb1_host_CmdStage
& (USB_HOST_MODE_FIELD
| USB_HOST_STAGE_FIELD
| USB_HOST_CMD_FIELD
)))
452 case (USB_HOST_MODE_READ
| USB_HOST_STAGE_STATUS
| USB_HOST_CMD_DOING
):
453 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
454 g_usb1_host_CmdStage
|= USB_HOST_CMD_DONE
;
457 case (USB_HOST_MODE_WRITE
| USB_HOST_STAGE_DATA
| USB_HOST_CMD_DOING
):
458 buffer
= usb1_host_write_buffer(USB_HOST_PIPE0
);
461 case USB_HOST_WRITING
: /* Continue of data write */
462 case USB_HOST_WRITEEND
: /* End of data write (zero-length) */
465 case USB_HOST_WRITESHRT
: /* End of data write */
466 g_usb1_host_CmdStage
&= (~USB_HOST_STAGE_FIELD
);
467 g_usb1_host_CmdStage
|= USB_HOST_STAGE_STATUS
;
470 case USB_HOST_FIFOERROR
: /* FIFO access error */
476 case (USB_HOST_MODE_WRITE
| USB_HOST_STAGE_STATUS
| USB_HOST_CMD_DOING
):
477 g_usb1_host_CmdStage
&= (~USB_HOST_CMD_FIELD
);
478 g_usb1_host_CmdStage
|= USB_HOST_CMD_IDLE
;
490 usb1_host_bemp_int(Status
, Int_enbl
);
493 /* Three dummy reads for clearing interrupt requests */
494 dumy_sts
= USB201
.BEMPSTS
;