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1 ;/* ----------------------------------------------------------------------
2 ;* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 ;*
4 ;* $Date: 17. January 2013
5 ;* $Revision: V1.4.1
6 ;*
7 ;* Project: CMSIS DSP Library
8 ;* Title: arm_bitreversal2.S
9 ;*
10 ;* Description: This is the arm_bitreversal_32 function done in
11 ;* assembly for maximum speed. This function is called
12 ;* after doing an fft to reorder the output. The function
13 ;* is loop unrolled by 2.
14 ;*
15 ;* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
16 ;*
17 ;* Redistribution and use in source and binary forms, with or without
18 ;* modification, are permitted provided that the following conditions
19 ;* are met:
20 ;* - Redistributions of source code must retain the above copyright
21 ;* notice, this list of conditions and the following disclaimer.
22 ;* - Redistributions in binary form must reproduce the above copyright
23 ;* notice, this list of conditions and the following disclaimer in
24 ;* the documentation and/or other materials provided with the
25 ;* distribution.
26 ;* - Neither the name of ARM LIMITED nor the names of its contributors
27 ;* may be used to endorse or promote products derived from this
28 ;* software without specific prior written permission.
29 ;*
30 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 ;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 ;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 ;* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
34 ;* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 ;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
36 ;* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 ;* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 ;* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
40 ;* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 ;* POSSIBILITY OF SUCH DAMAGE.
42 ;* -------------------------------------------------------------------- */
43 #if defined(__CC_ARM) //Keil
44 #define CODESECT AREA ||.text||, CODE, READONLY, ALIGN=2
45 #define LABEL
46 #elif defined(__IASMARM__) //IAR
47 #define CODESECT SECTION `.text`:CODE
48 #define PROC
49 #define LABEL
50 #define ENDP
51 #define EXPORT PUBLIC
52 #elif defined (__GNUC__) //GCC
53 .syntax unified
54 .cpu cortex-m4
55 .fpu softvfp
56 #define THUMB .thumb
57 #define CODESECT .section text
58 #define EXPORT .global
59 #define PROC :
60 #define LABEL :
61 #define ENDP
62 #define END
63 #endif
64
65 CODESECT
66 THUMB
67
68 ;/*
69 ;* @brief In-place bit reversal function.
70 ;* @param[in, out] *pSrc points to the in-place buffer of unknown 32-bit data type.
71 ;* @param[in] bitRevLen bit reversal table length
72 ;* @param[in] *pBitRevTab points to bit reversal table.
73 ;* @return none.
74 ;*/
75 EXPORT arm_bitreversal_32
76
77 #if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS)
78
79 arm_bitreversal_32 PROC
80 ADDS r3,r1,#1
81 PUSH {r4-r6}
82 ADDS r1,r2,#0
83 LSRS r3,r3,#1
84 arm_bitreversal_32_0 LABEL
85 LDRH r2,[r1,#2]
86 LDRH r6,[r1,#0]
87 ADD r2,r0,r2
88 ADD r6,r0,r6
89 LDR r5,[r2,#0]
90 LDR r4,[r6,#0]
91 STR r5,[r6,#0]
92 STR r4,[r2,#0]
93 LDR r5,[r2,#4]
94 LDR r4,[r6,#4]
95 STR r5,[r6,#4]
96 STR r4,[r2,#4]
97 ADDS r1,r1,#4
98 SUBS r3,r3,#1
99 BNE arm_bitreversal_32_0
100 POP {r4-r6}
101 BX lr
102 ENDP
103
104 #else
105
106 arm_bitreversal_32 PROC
107 ADDS r3,r1,#1
108 CMP r3,#1
109 IT LS
110 BXLS lr
111 PUSH {r4-r9}
112 ADDS r1,r2,#2
113 LSRS r3,r3,#2
114 arm_bitreversal_32_0 LABEL ;/* loop unrolled by 2 */
115 LDRH r8,[r1,#4]
116 LDRH r9,[r1,#2]
117 LDRH r2,[r1,#0]
118 LDRH r12,[r1,#-2]
119 ADD r8,r0,r8
120 ADD r9,r0,r9
121 ADD r2,r0,r2
122 ADD r12,r0,r12
123 LDR r7,[r9,#0]
124 LDR r6,[r8,#0]
125 LDR r5,[r2,#0]
126 LDR r4,[r12,#0]
127 STR r6,[r9,#0]
128 STR r7,[r8,#0]
129 STR r5,[r12,#0]
130 STR r4,[r2,#0]
131 LDR r7,[r9,#4]
132 LDR r6,[r8,#4]
133 LDR r5,[r2,#4]
134 LDR r4,[r12,#4]
135 STR r6,[r9,#4]
136 STR r7,[r8,#4]
137 STR r5,[r12,#4]
138 STR r4,[r2,#4]
139 ADDS r1,r1,#8
140 SUBS r3,r3,#1
141 BNE arm_bitreversal_32_0
142 POP {r4-r9}
143 BX lr
144 ENDP
145
146 #endif
147
148 END
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